CA1197623A - Font display and text editing system - Google Patents
Font display and text editing systemInfo
- Publication number
- CA1197623A CA1197623A CA000438050A CA438050A CA1197623A CA 1197623 A CA1197623 A CA 1197623A CA 000438050 A CA000438050 A CA 000438050A CA 438050 A CA438050 A CA 438050A CA 1197623 A CA1197623 A CA 1197623A
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- Prior art keywords
- character
- display
- characters
- memory
- stored
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Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Document Processing Apparatus (AREA)
Abstract
FONT DISPLAY AND TEST EDITING SYSTEM
ABSTRACT OF THE DISCLOSURE
A font display and text editing system is disclosed.
The system includes a display medium on which alphabetical characters may be displayed. A memory stores digital infor-mation describing the shape of each alphabetical character of a plurality of sets of alphabetical characters. Each set of alphabetical characters defines a respective font. A human responsive input device permits the user of the system to elect from the sets of alphabetical characters an alphabe-tical character to be displayed at a specific location on the display medium. The input device generates a signal in-dicative of the alphabetical character selected by the user.
A circuit responsive to the signal generated by the input device causes the selected alphabetical character to be displayed at the location on the display medium.
ABSTRACT OF THE DISCLOSURE
A font display and text editing system is disclosed.
The system includes a display medium on which alphabetical characters may be displayed. A memory stores digital infor-mation describing the shape of each alphabetical character of a plurality of sets of alphabetical characters. Each set of alphabetical characters defines a respective font. A human responsive input device permits the user of the system to elect from the sets of alphabetical characters an alphabe-tical character to be displayed at a specific location on the display medium. The input device generates a signal in-dicative of the alphabetical character selected by the user.
A circuit responsive to the signal generated by the input device causes the selected alphabetical character to be displayed at the location on the display medium.
Description
'7~iZ3 hl-9759 FONT DISPLAY AND TEXT EDITING SYSTEM
BACKGROUND OF THE INVENTION
The present invention is directed towards an elec-tronic text display system such as are commonly used for word processing, text composing, and the like. The present invention is particularly useful in connection with elec-tronic text composing systems wherein text information in-cluding character information defining the text ta be pre-sented, font information defining the style of font in which selected portions of the text are to be presentedl and com-position information such as column spacing, and the like,are all entered into the system and displayed on a display device such as a CRT. The text information is ultimately transferred to an electronic photocomposer which forms photo-graphic negatives which can be used to make printing plates in what is known as the cold-type proc,ess. The photographic negatives contain the characters defining the text to be presented in the desired font style and with the desired composition in accordance with the text information which had been entered into the electronic text composing system.
In prior art text composing systems, such as the Printext Composing System sold by International Business Machines Corporation, the set of characters
BACKGROUND OF THE INVENTION
The present invention is directed towards an elec-tronic text display system such as are commonly used for word processing, text composing, and the like. The present invention is particularly useful in connection with elec-tronic text composing systems wherein text information in-cluding character information defining the text ta be pre-sented, font information defining the style of font in which selected portions of the text are to be presentedl and com-position information such as column spacing, and the like,are all entered into the system and displayed on a display device such as a CRT. The text information is ultimately transferred to an electronic photocomposer which forms photo-graphic negatives which can be used to make printing plates in what is known as the cold-type proc,ess. The photographic negatives contain the characters defining the text to be presented in the desired font style and with the desired composition in accordance with the text information which had been entered into the electronic text composing system.
In prior art text composing systems, such as the Printext Composing System sold by International Business Machines Corporation, the set of characters
- 2 ~19'7623 or symbols ~vhich can be represented on the c1ispl~y medium îs limited to one fon-t style. This is a highly limiting feature slnce the user cannot obtain an accurate representation of the actual font s-tyle which will be ul-timately pro~luced on the printed pave. While special symbols may be displayed on the display medium to indicate the fact that associated cha-racters will ul-timately be presented in a specific font style, the actual characters disla~-ed on the display medit1m will he formed in a single font s-tyle. This requires that the user lo of the systen use his imagination to determine what the final printed page will ac-tually loo like. Often a certain compo-si-tion scheme which appears to be aes-thetically pleasing in the single style fo1lt displayed on the display medium turns out to be quite unsatisfactory when transferrec1 to the printer page uith the nctuæl font style, In an efFort to overcome this drawback, at least one cornposing system manufactured by Compugraphics utilizes a preview screen to provide a detailed an accurate image of different font styles and weights as they will ultimately appear on the printed page. In this system, ho~vever, text clata is initially, edited and composed on a standard CUT
display capable of illustrating only a single font style, Once the user has co~npleted his editing and cornposition of the page oF text, he can display an accurate image of the cornposed da-ta on a separate preview screen for review be-fore electronic phototypese-tting takes place. The informa-tion displayed on the preview screen cannot, however, be edited or recomposed on the preview screen, Accordingly, if the user does not like the composi-tion ol the page he rnust return to the standard CRT display and must recompose the page of clata using the slngle character set. Accordingly>
he cannot be sure that the final composition will be satis-factory until he co,~pletes his editing and again transfers the informatlon to the preview screen.
119'7~23 The present invention overcomes the foregoing deficiencies of the prior ar-t by providing a display screen which provides a detailed and accurate image of different fonts and weigh-ts and which permits the user of the system to interactively edi-t and compose the information displayed on the screen. This resul-t is achieved by storing charac-ters for a plurality of font styles in digital form with the shape of each character being described by a unique character set of digital words. The system may be provided with as many text editing and/or composing capabilities, as is desired.
According to the present invention there is pro-vided a font display and text editing system, comprising:
a display medium; a memory storing digital informa-tion des-cribing the shape of each alphabetical character of a plurality of sets of alphabetical characters, each said set of alphabetical characters defining a respective font; a human responsive input device which permits the user of said system to select from said sets of alphabe-tical characters an alphabetical character to be displayed at a specific location on said display medium, said input device generating a signal indicative of the alphabetical charac- ;
ter selected by said user; and a circuit responsive to said signal for displaying said selected alphabetical character at said location in said display medium, said cir-cuit including a bit mapped RAM which contains an array of g by p storage loca-tion and wherein said display device is divided into g by p pixel locations, said storage 30 locations corresponding to said pixel locations on a one-to- i one basis, g and p being positive integers much greater than l; and means for displaying, on said display device, the information stored in said bit mapped RAM. I;
!
In the preferred embodiment, the display medium forms the deslred character from a plurali-ty of do-ts or 9'7~;23 ,1 .
pixels which are arranged at predetermined locations in a character cell which may be of constant or variable size. The character cell defines a space on-the display medium in which the character may be presented. The character cell is preferably divided into a grid of pixel locations, each of which may contain a single pixel By placing pixels in only selec-ted pixel locations of the grid, the display medium can produce a character having substantially any form desired.
10In the preferred embodiment, the shape of each character is defined by a unique character se-t comprising a plurality of data words. These data words contain in- `~
formation regarding he locations of -the pixels within a character cell which are required to produce the desired character shape. Since the number of characters and font styles which may be reproduced in this manner is limited only by the size and number of pixel elemen-ts in a charac-ter cell and the size of the font memory holding the data words, presentation of the characters in this pixel matrix form provides for great flexibility in the sys-tem.
The text editing and composing capability of the system are made possible primarily through the use of a bit - 3a -'I:
, :
1~'7~i~3 _ mopped ~A~I whlch contains s-tora~e loca-tions ~vhich eorrespontl on a one-to-one basis to the p.ixel locat.ions on the display medium. In the pre~errecl embodiment, the system is run by a mieroprocessOr which constan-tly monltors keyboard instrue-tions generated by a user controlled keyboard. These instrue--tions provide information regarding the particular charaeter and font style whieh -the user wishes to cdisplay on the display ( medlum. The keyboard also provides -the microprocessor with information which enables the microproeessor to determine the loeation on the display medium where the eharacter iden-tified by t`ne character code is to be plaeed. Whenever a - new keyboard ins-truetion is generated by the keyboard, the mieroprocessor removes the charaeter set associated with the charaeter ancl font ident.ified by the eharacter code prom the font memory and stores the data words of that eharaeter set in merr.ory locations o the bit mapped RAM which correspond to tne location on the display medium where the charac-ter is to be displæyed. Since the display mecl.ium reproduces the pixel inIorrnation stored in the bit mapped RAY on its c>~.vl~
sereen, the user can place desired eharacters -rom any se-lected lont at any location on the display rnedium by causinO
the microprocessor to place the appropriate charaeter se-ts in the appropriate storage locations o:E the bit mapped RAY
in response to appropriate entries into t`ne keyboard.
By defining the eharaeter shape in the form of a unique character set which identifies the pixel location with-in a character eell reclu.ired to reproduce that character shape and by placing that in~ormatlon in any desired location of the bit mapped RAPII, the present invent.ion makes it possible to incorporate substantiallY any text editing and composing capability which is used on standarcl text editing and elec-tronic composing systerns. Since these text ecl.itlng ancl com-posit.ion capabil.ities are per se non and clo not themselves define the inven-tive -eatures of the present invention, the following detailed descrlption of -the invention is clirected ~3'~i23 prilnarily to the ~`ont displny eat~lres oE the system. Rela-lively few text edi-ting features have been describe. It should be understood, however, tha-t any presently known or future developed text exiting and/or composlng capabilities Jan be incorporated into the system wi-thout cleparting from the spirit or scope of the present inven-tion.
( BPIEF DESCRIPTION OF TIE DRAWINGS
-- - .
For the purpose o-f illustra-ting the lnvention, there is shown in the drawings an embodiment which is presently referred, it being unclerstood, however, that -the invention is not limited to -the precise arrangements and ins-trumentali-t ies shown. ' Figure 1 is a schematic diagram oi the hardware of he font display and text etliting system of tile present in-ention.
Figure 2 is a schematic representation o- the CUT of Figure 1.
Figure 3A is a schema-t,ic representation illustrating the 2nner in which a character may be formed by a plurality ol pixels located in a character cell.
Figure 3B illustrates -the binary words which may be used Jo define the character illustratecl in Figure 3A.
Figure 4 is a schematic represen-tation Oe the dis-- play R~,l of Figure 1.
Figures 5A, 5B and 5C are flow diagrarns illustrating the main prograrn stored in the program Roil ox Figure 1.
Pigures 6 and 7 are flow diagxams illustrating sub-routines of the prograrn stored in the program Roll O e Figure 1.
DET~IL~D DESCRIPTION OF TIIE INVENTION
Refer}ing now to -the drawinj,s ~vherein like n~l~erals intlicate live elements, there is shown in Fi~llre 1 a font display and text editing system constructed in accordance with the principles of the present inven-tion and designated gener-ally as 10.
The heart of font display and text editing system 10 is a microprocessor 24 which may be an 80~6 microprocessor manufactured by Intel Corporation. A complete descrip-tion of the structure and operation of this microprocessor, as well as various applications thereof, is described in Intel's "iPX 86, 88 User's Manual" dated August 21, 1981.
Throughout the following description, reference will be made to signals which are either active low or active high.
An active low signal will be indicated by the presence of a line over the signal (e.g`., ON). An active low signal will be referred to as being set or generated when it is at the binary "0" level and reset when it is at the binary "1" level.
An active high signal will be referred to as being set or generated when it is at the binary "1" level and being reset when it is at the binary "0" level.
In addition to active low and active high signals, various elements of system 10 have active high and active low inputs and outputs. An active low input or output will be indicated by the presence of a small circle at the input or output of the element. For example, each of the outputs of the 3 to 8 decoder 44 are active low outputs. An active low input will be activated by the presence of a binary "0"
on its input. An active low output will place a binary "0"
on its output when it is activated. Any input or output which is not indicated to be active low is active high.
Microprocessor 12 communicates with the remaining elements of system 10 by writing address information onto address bus 14 and by both writing information onto and read-ing information off of data bus 16. Microprocessor 12 has a common set of input/output ports A0-Al9 which are connected -to both address bus 14 and data bus 16 through address latch ..s ,, ,;
``~ 11~17~23 18 and transceiver 20, respectively. Whenever microprocessor 12 ~vishes to place adAress in~orma-tion on adclress bus l it g~ner~tes a binary signal corresponding to the desired ad-dress on i-ts output ports Al-~l9 (or reasons which will be described below, output port AO is not used for address pur-poses) and generates the address la-tch enable signal ALE which is applied to the strobe input STB of address latch 18. This causes the 19 bi-t address signal generated by microprocessor 12 to be placed on address bus 14. Since the output enable io input OE ox address latch 18 is grounded, the 19 bit address applied to the input of address latch 18 will remain on address bus 14 until a ne~v address is strobecl in-to latch 18, One suitable address latch is ~anu~actured by Intel Corporation uncler the product d~sig~ation 82S2 Octal latch. While a single latch l is shown, it will he apparent to ,those sXilled in the art that three latches mus-t be used in parallel to ' latch all l outputs Oe microprocessor 12.
- The 16 least signiEicant bits ox the address signal ,, ( are co~tainecl on address lines Al-A16 O-e address bus 14 and are used to address the memory elements 22-28 ox system 10. The three most sl~nificant bits of the address signal ære contained on address lines A17-~19 and are applied to a one ox eight decoder 32 which is used to generate chip en-able signals which enable only one o-~ the memory elements 2S 22-28 at any given time. One suitable decoder is manufac--tured by Intel Corporation under the product designation 8205 one of tight decoder. Decoder 32 receives -the t~lree lines A17-Al9 on its address inputs A0-A2, respectively, ancl causes that one of its eight outputs 00-07 (only ou-tputs 00-04 are used in sys-tem 10) to be set. Thus, if the binary signal 000 is applied to the inputs of decoder 32, its out-put 00 Jill be set (Jill be placed at the binary "O" le~rel) while the retaining outputs will be reset (~vill be at the blnaxy "1" level). Similarly, non the binary acldress sig-nal 001 is applied to -the input O:e decoder 3Z, its O~ltpUt Ol - 8 7~Z3 Jill be sot ancl the remaining outputs will be reset. In this rnanner, ~eeoder 32 can genera-te ehip enable slgnals IT, En the 01 output oE decoder 32 is inverted my an invert~r
display capable of illustrating only a single font style, Once the user has co~npleted his editing and cornposition of the page oF text, he can display an accurate image of the cornposed da-ta on a separate preview screen for review be-fore electronic phototypese-tting takes place. The informa-tion displayed on the preview screen cannot, however, be edited or recomposed on the preview screen, Accordingly, if the user does not like the composi-tion ol the page he rnust return to the standard CRT display and must recompose the page of clata using the slngle character set. Accordingly>
he cannot be sure that the final composition will be satis-factory until he co,~pletes his editing and again transfers the informatlon to the preview screen.
119'7~23 The present invention overcomes the foregoing deficiencies of the prior ar-t by providing a display screen which provides a detailed and accurate image of different fonts and weigh-ts and which permits the user of the system to interactively edi-t and compose the information displayed on the screen. This resul-t is achieved by storing charac-ters for a plurality of font styles in digital form with the shape of each character being described by a unique character set of digital words. The system may be provided with as many text editing and/or composing capabilities, as is desired.
According to the present invention there is pro-vided a font display and text editing system, comprising:
a display medium; a memory storing digital informa-tion des-cribing the shape of each alphabetical character of a plurality of sets of alphabetical characters, each said set of alphabetical characters defining a respective font; a human responsive input device which permits the user of said system to select from said sets of alphabe-tical characters an alphabetical character to be displayed at a specific location on said display medium, said input device generating a signal indicative of the alphabetical charac- ;
ter selected by said user; and a circuit responsive to said signal for displaying said selected alphabetical character at said location in said display medium, said cir-cuit including a bit mapped RAM which contains an array of g by p storage loca-tion and wherein said display device is divided into g by p pixel locations, said storage 30 locations corresponding to said pixel locations on a one-to- i one basis, g and p being positive integers much greater than l; and means for displaying, on said display device, the information stored in said bit mapped RAM. I;
!
In the preferred embodiment, the display medium forms the deslred character from a plurali-ty of do-ts or 9'7~;23 ,1 .
pixels which are arranged at predetermined locations in a character cell which may be of constant or variable size. The character cell defines a space on-the display medium in which the character may be presented. The character cell is preferably divided into a grid of pixel locations, each of which may contain a single pixel By placing pixels in only selec-ted pixel locations of the grid, the display medium can produce a character having substantially any form desired.
10In the preferred embodiment, the shape of each character is defined by a unique character se-t comprising a plurality of data words. These data words contain in- `~
formation regarding he locations of -the pixels within a character cell which are required to produce the desired character shape. Since the number of characters and font styles which may be reproduced in this manner is limited only by the size and number of pixel elemen-ts in a charac-ter cell and the size of the font memory holding the data words, presentation of the characters in this pixel matrix form provides for great flexibility in the sys-tem.
The text editing and composing capability of the system are made possible primarily through the use of a bit - 3a -'I:
, :
1~'7~i~3 _ mopped ~A~I whlch contains s-tora~e loca-tions ~vhich eorrespontl on a one-to-one basis to the p.ixel locat.ions on the display medium. In the pre~errecl embodiment, the system is run by a mieroprocessOr which constan-tly monltors keyboard instrue-tions generated by a user controlled keyboard. These instrue--tions provide information regarding the particular charaeter and font style whieh -the user wishes to cdisplay on the display ( medlum. The keyboard also provides -the microprocessor with information which enables the microproeessor to determine the loeation on the display medium where the eharacter iden-tified by t`ne character code is to be plaeed. Whenever a - new keyboard ins-truetion is generated by the keyboard, the mieroprocessor removes the charaeter set associated with the charaeter ancl font ident.ified by the eharacter code prom the font memory and stores the data words of that eharaeter set in merr.ory locations o the bit mapped RAM which correspond to tne location on the display medium where the charac-ter is to be displæyed. Since the display mecl.ium reproduces the pixel inIorrnation stored in the bit mapped RAY on its c>~.vl~
sereen, the user can place desired eharacters -rom any se-lected lont at any location on the display rnedium by causinO
the microprocessor to place the appropriate charaeter se-ts in the appropriate storage locations o:E the bit mapped RAY
in response to appropriate entries into t`ne keyboard.
By defining the eharaeter shape in the form of a unique character set which identifies the pixel location with-in a character eell reclu.ired to reproduce that character shape and by placing that in~ormatlon in any desired location of the bit mapped RAPII, the present invent.ion makes it possible to incorporate substantiallY any text editing and composing capability which is used on standarcl text editing and elec-tronic composing systerns. Since these text ecl.itlng ancl com-posit.ion capabil.ities are per se non and clo not themselves define the inven-tive -eatures of the present invention, the following detailed descrlption of -the invention is clirected ~3'~i23 prilnarily to the ~`ont displny eat~lres oE the system. Rela-lively few text edi-ting features have been describe. It should be understood, however, tha-t any presently known or future developed text exiting and/or composlng capabilities Jan be incorporated into the system wi-thout cleparting from the spirit or scope of the present inven-tion.
( BPIEF DESCRIPTION OF TIE DRAWINGS
-- - .
For the purpose o-f illustra-ting the lnvention, there is shown in the drawings an embodiment which is presently referred, it being unclerstood, however, that -the invention is not limited to -the precise arrangements and ins-trumentali-t ies shown. ' Figure 1 is a schematic diagram oi the hardware of he font display and text etliting system of tile present in-ention.
Figure 2 is a schematic representation o- the CUT of Figure 1.
Figure 3A is a schema-t,ic representation illustrating the 2nner in which a character may be formed by a plurality ol pixels located in a character cell.
Figure 3B illustrates -the binary words which may be used Jo define the character illustratecl in Figure 3A.
Figure 4 is a schematic represen-tation Oe the dis-- play R~,l of Figure 1.
Figures 5A, 5B and 5C are flow diagrarns illustrating the main prograrn stored in the program Roil ox Figure 1.
Pigures 6 and 7 are flow diagxams illustrating sub-routines of the prograrn stored in the program Roll O e Figure 1.
DET~IL~D DESCRIPTION OF TIIE INVENTION
Refer}ing now to -the drawinj,s ~vherein like n~l~erals intlicate live elements, there is shown in Fi~llre 1 a font display and text editing system constructed in accordance with the principles of the present inven-tion and designated gener-ally as 10.
The heart of font display and text editing system 10 is a microprocessor 24 which may be an 80~6 microprocessor manufactured by Intel Corporation. A complete descrip-tion of the structure and operation of this microprocessor, as well as various applications thereof, is described in Intel's "iPX 86, 88 User's Manual" dated August 21, 1981.
Throughout the following description, reference will be made to signals which are either active low or active high.
An active low signal will be indicated by the presence of a line over the signal (e.g`., ON). An active low signal will be referred to as being set or generated when it is at the binary "0" level and reset when it is at the binary "1" level.
An active high signal will be referred to as being set or generated when it is at the binary "1" level and being reset when it is at the binary "0" level.
In addition to active low and active high signals, various elements of system 10 have active high and active low inputs and outputs. An active low input or output will be indicated by the presence of a small circle at the input or output of the element. For example, each of the outputs of the 3 to 8 decoder 44 are active low outputs. An active low input will be activated by the presence of a binary "0"
on its input. An active low output will place a binary "0"
on its output when it is activated. Any input or output which is not indicated to be active low is active high.
Microprocessor 12 communicates with the remaining elements of system 10 by writing address information onto address bus 14 and by both writing information onto and read-ing information off of data bus 16. Microprocessor 12 has a common set of input/output ports A0-Al9 which are connected -to both address bus 14 and data bus 16 through address latch ..s ,, ,;
``~ 11~17~23 18 and transceiver 20, respectively. Whenever microprocessor 12 ~vishes to place adAress in~orma-tion on adclress bus l it g~ner~tes a binary signal corresponding to the desired ad-dress on i-ts output ports Al-~l9 (or reasons which will be described below, output port AO is not used for address pur-poses) and generates the address la-tch enable signal ALE which is applied to the strobe input STB of address latch 18. This causes the 19 bi-t address signal generated by microprocessor 12 to be placed on address bus 14. Since the output enable io input OE ox address latch 18 is grounded, the 19 bit address applied to the input of address latch 18 will remain on address bus 14 until a ne~v address is strobecl in-to latch 18, One suitable address latch is ~anu~actured by Intel Corporation uncler the product d~sig~ation 82S2 Octal latch. While a single latch l is shown, it will he apparent to ,those sXilled in the art that three latches mus-t be used in parallel to ' latch all l outputs Oe microprocessor 12.
- The 16 least signiEicant bits ox the address signal ,, ( are co~tainecl on address lines Al-A16 O-e address bus 14 and are used to address the memory elements 22-28 ox system 10. The three most sl~nificant bits of the address signal ære contained on address lines A17-~19 and are applied to a one ox eight decoder 32 which is used to generate chip en-able signals which enable only one o-~ the memory elements 2S 22-28 at any given time. One suitable decoder is manufac--tured by Intel Corporation under the product designation 8205 one of tight decoder. Decoder 32 receives -the t~lree lines A17-Al9 on its address inputs A0-A2, respectively, ancl causes that one of its eight outputs 00-07 (only ou-tputs 00-04 are used in sys-tem 10) to be set. Thus, if the binary signal 000 is applied to the inputs of decoder 32, its out-put 00 Jill be set (Jill be placed at the binary "O" le~rel) while the retaining outputs will be reset (~vill be at the blnaxy "1" level). Similarly, non the binary acldress sig-nal 001 is applied to -the input O:e decoder 3Z, its O~ltpUt Ol - 8 7~Z3 Jill be sot ancl the remaining outputs will be reset. In this rnanner, ~eeoder 32 can genera-te ehip enable slgnals IT, En the 01 output oE decoder 32 is inverted my an invert~r
3~ nd I.
` Onee the appropriate address has been plaeed on address bus l mieroproeessor 12 ean either write data onto da-ta bus 16 or read data on the data bus 16 into its inter-nal memories, This is aecomplished through the use o-E a transeeiver 20 whieh may be a 82~6 Oetal Bus TranseeiYer rnanufaetured by Intel Corporation.
In the system 10 deseribed herein, ail information is transmit-ted as either an 11 or 16 blt word. For this rea-son, only output lines AO-A15 of microprocessor 12 are applied to transceivex 20. 'transceiver 20 applies the 16 bits ox ala contained on the output ports ~-A15 of mieroproeessor 12 onto data bus 16 ~vhenever the clata enable signal is applied Jo its output enable inpu-t and the data trans-mission signal DT/~ is at the binary "1" level ~hen the data enable signal DEN is generated but the data transmit signal D~/~ is at the binary "O'` level, data eontnined on bus 16 uill be applied to ports ~0-A15 of microprocessor 12 and w-ll thereby be read into the internal memory o-E miero-proeessor 12. Since -the ~286 transceiver is an octal trans-eeiver, two transeeivers must be conneeted in parallel to handle all 16 data bits.
icroprocessor 12 controls the operation ox wont display and text ecliting system 10 by following a software program stored in program ROW 22. The soEtwar~ program, which will be deseribed below with reFerenee to the slow diagrams of Figures 5-7, is stored in program RO~I 22 in machine code as a plurality ox 16 bit words. ~Iicroprocessor 12 will sequence through the various steps oE its program by periodically requestillg new pro~xam instructions prom prograrn R~l 22 at time intervals cletermined by clog pulses venerated by system clock 36. Each t;me mieroprocessor 12 ` _ fl ~7~23 , needs a ne~v program ins-truction, it applles tha-t address slgnal to lines Al-A16 ox address bus l vhieh k1enti~ies -the storage loca-tion ox the desirecl program instrue-tion, causes deeod~r 32 to genera.te the ehlp enable signal l and genera-tes the read signal I. As a r-esult, a 16 bi-t Ford eontainin~ the desired program instruetlon(s) will appear on data bus 16. Microproeessor 12 then reads this ¦ instruetion into its internal memory via transceiver 20.
.While any available memory can be used, one suit-10able program R0~l 22 is an 8Kx8 UV erasable RR0~l sold uncler the product designation 2764 PR0.~l by In-tel Corporation Sinee eaeh PRO`,I ean s-tore only 8 bi-ts oE inormation, two PROWS are eonnected in parallel so that a single address ~enera~ed by microproeessor l is applied to the adclress pUtS ox both PRO~`YIS and -the 8 bit outputs o-E each PR0~l aye eombined to -Eorm a single 16 bi-t word which is applied o data bus 15.
, Following the program instrue-tions eontainecl in ( program P.0~l 22, mieroproeessor 12 will cause system 10 to displav the shape of speciEie font eharacters ~vhieh are identiEied by a eharae-ter eode generated by an input device (preferably an eleetronic keyboard) 38 on a display device (preferably a CRT) 40 with suf~ieient resolution to permit the user ol the system. to view an accura-te representation o-2~ what will appear on the final printed pave. In order toattain satis.Eaetory results, it is pre:Eerable that the CRT
40 hove a resolution o-f hetween 800 to 1~100 lines, eaeh dividecl into between 800 and 1,100 pixel (pictllre element) loeations. ~aeh pixel shoulcl be small, on the order of 0.01 inehes in diameter, so -that the individual eharaeters whieh ore Eormecl by a eombination o:E pixel dots will appear to be smooth ancl continuous.
In the embodi!nent diselosed herein, the CRT 40 is divided into 1,0~ lines each eontainin~ 1,02~ el loea-33 tions. This clivision o:E the CRT is illus-tratecl graphical.ly 1~7~ 3 in Figure 2 where,in each box 42 represents a single pixel location. It will be unders-tood by those silted in the art that the grid lines shown in F,i~ure 2 will no-t ac-tllal'ly appear on the CRT 40 bu-t are rather shown for purposes o-f ex-5 planation. The rid lines merely de-flne areas on the CRT 40 which represent the pixel locations 42. As the electron beam scans the face of the CRT ~0, it is modulated in a manner ( which causes it to excite certain pixel locations ~2 bu-t not others. Those pixel locations 42 excited by the election beam will fluoresce (producing a pixel 44) so as to form the character desired.
In the embodimen-t disclose herein, CRT 40 is divide into 64 rows by 64 columns of character cells 46, each o-which is 16 pixels wide and 16 pixels deep A single charac-ter can be formed in eæch character cell 46 so that the CRT
~0 can display up to 64 x 6-~ = ~,096 characters. This repre-sents a sLngle page of text.
Chile a character cell 46, havinv constant dimensions of 16 16 pixels, is disclosed, it should be understood that the invention is not so limi-ted. Thus, eharacter cells of other slzes may also be used. Additionally, it is not neces-sary that the size of -the character cell remain constant, i.e., one character may be stored in a cell 20 x 16 pixels while a se^ond character may be stored in a cell 28 x 18 pixels. Al-ternatively, the character cell size can remain constant, but characters ean be stored in less than and/or more than one cell. While such variatLons compl;cate the design o-f the sys-tern, such design modi-fications are well within the skill o-f those of ordinary skill in the art.
character may be displayed in any given charaeter c:ell 4~ by energizing selected pixel locations ~2 in that c,ell. The particular pixel locations 42 which must be ener-~izecl to for a desired character are def,ine~l hy a unique set of 16 binary words ('nereina:Eter data words), each 16 bits in 3~ length. Each set of 16 data words describes the shape of the - ll 119~Z3 character to be displayed and ~Yi:l~ be referred tn hereinafter as character set.
The preferred relationship between the inclividual words ox the character set and the individual pixel locations ~2 of a character cell 46 may best be unders-tood wi-th reference to F.igures 3A and 3B. Figure 3A illustrates a slngle character cell 46 containing the letter "S". Figure 3B shows the 16 data words of the charac-ter se-t de-inin~ the letter "S". As , shown in Figure 3A, -the,letter "S" is formed by a plurality of pixels 44, each of whieh is located in a respectiYe pixel location 42. Since pixel row 0 o- the charac-ter cell 46 contains no pixels 44, data word 1 (Figure 3B) ox the eharae-ter set is represented by the binary numbex: oooooooooooonooo.
Since pixel row 1 contains pixels at the four pixel loca-lS tions correspondinv to pixel columns 6, 7, 8 an 9, dataword 2 is stored as: 000000111100000. This sequence continues through to data Ford 16 such that the 16 data ~vords oF the character se-t contain all the informatlon required to produce ( a single character in a single character eell 46. Using this technique, any shape charaeter may be clescribed by a unique character set of 16 data worcls each 16 bits in length.
Since the shape ox a eharacter to be displayed on C~T,40 may be defined by a 16 word character set, the shape of the characters displayed is limited only by the s,ize of the font R0.~ memory 24 in which the character sets are stored and the resolution of a 16 x 16 pixel character cell.' This provides tremendous flexibility ~vhich makes i-t possible to store a large number of font styles and call up any character of any font style onto the CRT ~0 by merely entering appro-priate commands in the input device 3~. Once the user oFsystem 10 has entered the desirecl characters, he may then rearrallge the positlon ox the characters on the CRT ~0 uti-lizing any text editing capabilities available As a result, the user is presentecl ~vi-th an accurate re~)resenta-t,ion of - 35 what will appear on the final printecl page.
.. ... .. ,, , . .. .. .. ., . _ .. , .. ,, .,, . . ,. ,., . . , . . . . . . . I, . . . ..
- 12 ~'6Z3 By Jay oe simple exnmple, the user may call us the characters:
SHEM in ~lebrew is I-In this example, characters from two fonts (a bold Roman font and Hebrew font) have been called up frorn font R0~ 24 onto the CRT 40. After entering this -text data, the user may decide it is desirable to write the word SHEM in a second style of font so as to offset the name from the rest of the sen-tence. In a manner described in retail below, the user will then cause system 10 to replace the bold Roman cha-racters of the word SHE with characters from a different style font, for ex~mle, Roman script. This is done by writ-in the script letters S~E~l over the bolt letters SHEM. As a result, the following words will appear on CRT 12:
S~E~ in Hebrew is W .
In the following descrip-tion of font display and text editing system 10, it will be assumed that three font styles ROAN 1 (a bo]d Roman type), ~O~IAN 2 (a script Roman type) and HEBREW are stored in font ROM 24. It should be recognized, however; that a greater number.of font styles (as well as different font styles) may be stored.
In the presently preferred embodiment, each font style includes 12~ characters comprising the upper and lower case le-tters of the alphabet, punctua-tion marks, a blank space and any other characters which are to he displayed on the CI~T 40. The font style RO~lAN 1 will contain the Roman characters necessary for the English language in a first style, for example, bold. The font RO~lAN 2 will also con-tain the Roman characters for the English langllage, but in a second style, for e~alnple, script. The font ~IEI3REW will contain the various Hebrew letters in a desired style.
_ 13 -Each character ox -the three ~on-ts is assignecl a uni que charac-ter code which iclentlfies the adclress loca-tions of the 16 word character se-t definin~r the character .in fon-t RO~I
24~ Since each font contains 128 characters, 128 x 3 = 384 character codes are required. These codes may be expressed as a 9 bit binary word. For example, the lower case letter "a" of the character font RO~lAN 1 can be accordec' the cha-( rac-ter code 0 binary 000000000) the lower case letter "b"
. of the character font RO.~IA~ 1 can be accorded the character code 1 (binary 000000001), etc. Similarly, the lower case letter "a" of the character font RO~IAN 2 can be accorded the character code 128 (binary 010000000) the lower case letter "b" of character font P.O!~IAN 2 can be accordecl the character code 129 (binary 01~000001) 3 etc. In a similar manner the lower case letter "aleph" of the character font HEBRE~Y can be accordecI the character code 256 (b.inary 100000000~ thç
lower case "bet`' of the character font HEBREW can be ac-corded the character cocle 257 (hinary 100000001), etc.
In accordance with the 'coregoing the 16 words of 2~ each charzcter set are pre-ferably stored in P.O~I mernory 24 in the order determined by the character code identifying tnat character. Thus the 16 word character set definincr the lowe-case letter "a" of the character font RO~IAN 1 is storecl at ad(Iress locations 0-15 of memory 20 Y~hile the l words ox -the 2~ character set deflning the lower case letter `'b" of the cha-racter font ROAN 1 is s-tored at address locations 16-31 of rnemory 20. All 128 character sets of character font ROAN 1 are in the first 12~ x 16 = 2 048 aclclress locations ~nu~bered 0-2 047) o:E ont RO~I 24. The 12$ character sets o character font RO~IS~l 2 are storecl at aclclress locati.ons 2 0~8-~ 0~5 of font RO`I 2~. Particularly the 16 worcl character set ye-scribing the lower case "a" of character KO~IAN 2 fon-t :LS
stored at acldress loca-tions 2 04~-2 053 \Yhile the 16 word cs-Iaracter set describing the lower case `'b" of character ROW N 2 font is stored at address locations 2 054-2 06~t ~1~76Z3 etc. Finally, the 1~8 character sets defining the font ~E~RE~
are stored at address locations 4,096-6,143 of font ROW 24.
Particularly, the character set describing the lower case "aleph" of the font HEBREW is stored at address locations
` Onee the appropriate address has been plaeed on address bus l mieroproeessor 12 ean either write data onto da-ta bus 16 or read data on the data bus 16 into its inter-nal memories, This is aecomplished through the use o-E a transeeiver 20 whieh may be a 82~6 Oetal Bus TranseeiYer rnanufaetured by Intel Corporation.
In the system 10 deseribed herein, ail information is transmit-ted as either an 11 or 16 blt word. For this rea-son, only output lines AO-A15 of microprocessor 12 are applied to transceivex 20. 'transceiver 20 applies the 16 bits ox ala contained on the output ports ~-A15 of mieroproeessor 12 onto data bus 16 ~vhenever the clata enable signal is applied Jo its output enable inpu-t and the data trans-mission signal DT/~ is at the binary "1" level ~hen the data enable signal DEN is generated but the data transmit signal D~/~ is at the binary "O'` level, data eontnined on bus 16 uill be applied to ports ~0-A15 of microprocessor 12 and w-ll thereby be read into the internal memory o-E miero-proeessor 12. Since -the ~286 transceiver is an octal trans-eeiver, two transeeivers must be conneeted in parallel to handle all 16 data bits.
icroprocessor 12 controls the operation ox wont display and text ecliting system 10 by following a software program stored in program ROW 22. The soEtwar~ program, which will be deseribed below with reFerenee to the slow diagrams of Figures 5-7, is stored in program RO~I 22 in machine code as a plurality ox 16 bit words. ~Iicroprocessor 12 will sequence through the various steps oE its program by periodically requestillg new pro~xam instructions prom prograrn R~l 22 at time intervals cletermined by clog pulses venerated by system clock 36. Each t;me mieroprocessor 12 ` _ fl ~7~23 , needs a ne~v program ins-truction, it applles tha-t address slgnal to lines Al-A16 ox address bus l vhieh k1enti~ies -the storage loca-tion ox the desirecl program instrue-tion, causes deeod~r 32 to genera.te the ehlp enable signal l and genera-tes the read signal I. As a r-esult, a 16 bi-t Ford eontainin~ the desired program instruetlon(s) will appear on data bus 16. Microproeessor 12 then reads this ¦ instruetion into its internal memory via transceiver 20.
.While any available memory can be used, one suit-10able program R0~l 22 is an 8Kx8 UV erasable RR0~l sold uncler the product designation 2764 PR0.~l by In-tel Corporation Sinee eaeh PRO`,I ean s-tore only 8 bi-ts oE inormation, two PROWS are eonnected in parallel so that a single address ~enera~ed by microproeessor l is applied to the adclress pUtS ox both PRO~`YIS and -the 8 bit outputs o-E each PR0~l aye eombined to -Eorm a single 16 bi-t word which is applied o data bus 15.
, Following the program instrue-tions eontainecl in ( program P.0~l 22, mieroproeessor 12 will cause system 10 to displav the shape of speciEie font eharacters ~vhieh are identiEied by a eharae-ter eode generated by an input device (preferably an eleetronic keyboard) 38 on a display device (preferably a CRT) 40 with suf~ieient resolution to permit the user ol the system. to view an accura-te representation o-2~ what will appear on the final printed pave. In order toattain satis.Eaetory results, it is pre:Eerable that the CRT
40 hove a resolution o-f hetween 800 to 1~100 lines, eaeh dividecl into between 800 and 1,100 pixel (pictllre element) loeations. ~aeh pixel shoulcl be small, on the order of 0.01 inehes in diameter, so -that the individual eharaeters whieh ore Eormecl by a eombination o:E pixel dots will appear to be smooth ancl continuous.
In the embodi!nent diselosed herein, the CRT 40 is divided into 1,0~ lines each eontainin~ 1,02~ el loea-33 tions. This clivision o:E the CRT is illus-tratecl graphical.ly 1~7~ 3 in Figure 2 where,in each box 42 represents a single pixel location. It will be unders-tood by those silted in the art that the grid lines shown in F,i~ure 2 will no-t ac-tllal'ly appear on the CRT 40 bu-t are rather shown for purposes o-f ex-5 planation. The rid lines merely de-flne areas on the CRT 40 which represent the pixel locations 42. As the electron beam scans the face of the CRT ~0, it is modulated in a manner ( which causes it to excite certain pixel locations ~2 bu-t not others. Those pixel locations 42 excited by the election beam will fluoresce (producing a pixel 44) so as to form the character desired.
In the embodimen-t disclose herein, CRT 40 is divide into 64 rows by 64 columns of character cells 46, each o-which is 16 pixels wide and 16 pixels deep A single charac-ter can be formed in eæch character cell 46 so that the CRT
~0 can display up to 64 x 6-~ = ~,096 characters. This repre-sents a sLngle page of text.
Chile a character cell 46, havinv constant dimensions of 16 16 pixels, is disclosed, it should be understood that the invention is not so limi-ted. Thus, eharacter cells of other slzes may also be used. Additionally, it is not neces-sary that the size of -the character cell remain constant, i.e., one character may be stored in a cell 20 x 16 pixels while a se^ond character may be stored in a cell 28 x 18 pixels. Al-ternatively, the character cell size can remain constant, but characters ean be stored in less than and/or more than one cell. While such variatLons compl;cate the design o-f the sys-tern, such design modi-fications are well within the skill o-f those of ordinary skill in the art.
character may be displayed in any given charaeter c:ell 4~ by energizing selected pixel locations ~2 in that c,ell. The particular pixel locations 42 which must be ener-~izecl to for a desired character are def,ine~l hy a unique set of 16 binary words ('nereina:Eter data words), each 16 bits in 3~ length. Each set of 16 data words describes the shape of the - ll 119~Z3 character to be displayed and ~Yi:l~ be referred tn hereinafter as character set.
The preferred relationship between the inclividual words ox the character set and the individual pixel locations ~2 of a character cell 46 may best be unders-tood wi-th reference to F.igures 3A and 3B. Figure 3A illustrates a slngle character cell 46 containing the letter "S". Figure 3B shows the 16 data words of the charac-ter se-t de-inin~ the letter "S". As , shown in Figure 3A, -the,letter "S" is formed by a plurality of pixels 44, each of whieh is located in a respectiYe pixel location 42. Since pixel row 0 o- the charac-ter cell 46 contains no pixels 44, data word 1 (Figure 3B) ox the eharae-ter set is represented by the binary numbex: oooooooooooonooo.
Since pixel row 1 contains pixels at the four pixel loca-lS tions correspondinv to pixel columns 6, 7, 8 an 9, dataword 2 is stored as: 000000111100000. This sequence continues through to data Ford 16 such that the 16 data ~vords oF the character se-t contain all the informatlon required to produce ( a single character in a single character eell 46. Using this technique, any shape charaeter may be clescribed by a unique character set of 16 data worcls each 16 bits in length.
Since the shape ox a eharacter to be displayed on C~T,40 may be defined by a 16 word character set, the shape of the characters displayed is limited only by the s,ize of the font R0.~ memory 24 in which the character sets are stored and the resolution of a 16 x 16 pixel character cell.' This provides tremendous flexibility ~vhich makes i-t possible to store a large number of font styles and call up any character of any font style onto the CRT ~0 by merely entering appro-priate commands in the input device 3~. Once the user oFsystem 10 has entered the desirecl characters, he may then rearrallge the positlon ox the characters on the CRT ~0 uti-lizing any text editing capabilities available As a result, the user is presentecl ~vi-th an accurate re~)resenta-t,ion of - 35 what will appear on the final printecl page.
.. ... .. ,, , . .. .. .. ., . _ .. , .. ,, .,, . . ,. ,., . . , . . . . . . . I, . . . ..
- 12 ~'6Z3 By Jay oe simple exnmple, the user may call us the characters:
SHEM in ~lebrew is I-In this example, characters from two fonts (a bold Roman font and Hebrew font) have been called up frorn font R0~ 24 onto the CRT 40. After entering this -text data, the user may decide it is desirable to write the word SHEM in a second style of font so as to offset the name from the rest of the sen-tence. In a manner described in retail below, the user will then cause system 10 to replace the bold Roman cha-racters of the word SHE with characters from a different style font, for ex~mle, Roman script. This is done by writ-in the script letters S~E~l over the bolt letters SHEM. As a result, the following words will appear on CRT 12:
S~E~ in Hebrew is W .
In the following descrip-tion of font display and text editing system 10, it will be assumed that three font styles ROAN 1 (a bo]d Roman type), ~O~IAN 2 (a script Roman type) and HEBREW are stored in font ROM 24. It should be recognized, however; that a greater number.of font styles (as well as different font styles) may be stored.
In the presently preferred embodiment, each font style includes 12~ characters comprising the upper and lower case le-tters of the alphabet, punctua-tion marks, a blank space and any other characters which are to he displayed on the CI~T 40. The font style RO~lAN 1 will contain the Roman characters necessary for the English language in a first style, for example, bold. The font RO~lAN 2 will also con-tain the Roman characters for the English langllage, but in a second style, for e~alnple, script. The font ~IEI3REW will contain the various Hebrew letters in a desired style.
_ 13 -Each character ox -the three ~on-ts is assignecl a uni que charac-ter code which iclentlfies the adclress loca-tions of the 16 word character se-t definin~r the character .in fon-t RO~I
24~ Since each font contains 128 characters, 128 x 3 = 384 character codes are required. These codes may be expressed as a 9 bit binary word. For example, the lower case letter "a" of the character font RO~lAN 1 can be accordec' the cha-( rac-ter code 0 binary 000000000) the lower case letter "b"
. of the character font RO.~IA~ 1 can be accorded the character code 1 (binary 000000001), etc. Similarly, the lower case letter "a" of the character font RO~IAN 2 can be accorded the character code 128 (binary 010000000) the lower case letter "b" of character font P.O!~IAN 2 can be accordecl the character code 129 (binary 01~000001) 3 etc. In a similar manner the lower case letter "aleph" of the character font HEBRE~Y can be accordecI the character code 256 (b.inary 100000000~ thç
lower case "bet`' of the character font HEBREW can be ac-corded the character cocle 257 (hinary 100000001), etc.
In accordance with the 'coregoing the 16 words of 2~ each charzcter set are pre-ferably stored in P.O~I mernory 24 in the order determined by the character code identifying tnat character. Thus the 16 word character set definincr the lowe-case letter "a" of the character font RO~IAN 1 is storecl at ad(Iress locations 0-15 of memory 20 Y~hile the l words ox -the 2~ character set deflning the lower case letter `'b" of the cha-racter font ROAN 1 is s-tored at address locations 16-31 of rnemory 20. All 128 character sets of character font ROAN 1 are in the first 12~ x 16 = 2 048 aclclress locations ~nu~bered 0-2 047) o:E ont RO~I 24. The 12$ character sets o character font RO~IS~l 2 are storecl at aclclress locati.ons 2 0~8-~ 0~5 of font RO`I 2~. Particularly the 16 worcl character set ye-scribing the lower case "a" of character KO~IAN 2 fon-t :LS
stored at acldress loca-tions 2 04~-2 053 \Yhile the 16 word cs-Iaracter set describing the lower case `'b" of character ROW N 2 font is stored at address locations 2 054-2 06~t ~1~76Z3 etc. Finally, the 1~8 character sets defining the font ~E~RE~
are stored at address locations 4,096-6,143 of font ROW 24.
Particularly, the character set describing the lower case "aleph" of the font HEBREW is stored at address locations
4,096-4,111; the character set describing the lower case "be-t"
is stored at address locations 4,112-4,127, etc.
The 9 bit character codes identifying the address locations of the 16 word character sets in font Roll 24 are generated by an input device 38 which may take any known form. In the preferred embodiment, input device 38 is an electronic keyboard and will be described as such, It should be recognized, however, that any other input device (-for ex-ample, one utilizing menu selection techniques or one respon-sive to voice actuation) could also be used.
The keyboard 38 preferably takes the form described in copending Canadian application Serial No. 438,066, filed September 30, 19832, and entitled FONT DISPIAY AND TEXT EDITING
SYSTE~I WIT CHARACTER OVERLAY FEATURE. This application is assigned to the assignee of the present invention. This key-board includes both character and command keys. The character keys may be used to identify the characters to be displayed on CRT 40 while the command keys will identify both the font style in which the character is to be displayed as well as standard command functions such as cursor left, cursor right, carriage return and backspace, etc. Keyboard 38 responds to the depression of the character and command keys by generating a keyboard instruction representative of either a character code identifying the character in font JAM 24 to be displayed on CRT 40 or a command code identifying the command instruc-tion to be carried out. The keyboard instruction is prefer-ably an 11 bit word which includes a 2 bit format block followed by a 9 bit data block. The format block identifies the data block of the keyboard instruction as either a com-mand code or a character code. When the 9 bit data block is a command code, it identifies the specific command instruc-tion to be -followed by microprocesor 12. When the 9 bit - 15 _ 11~7~3 data block is a character code, it iden-tifies the specific character in font ROM memory 22 to be displayed on CRY 40.
As described in copending Canadian application Serial No. 438,066, the user first depresses one or more command keys indicating the character font to be used and then depresses appropriate character keys to cause the de-sired character of the selected font to appear on CRT 4a.
Whenever the user wishes to change the font style of subse-quent characters to be displayed on CRT 40, he depresses one or more command keys identifying the new font to be used and then depresses appropriate character keys to enter the desired characters on the screen.
Microprocessor 12 constantly monitors the output of keyboard 38 (by periodically causing decoder 32 to generate the chip enable signal E2 so as to strobe keyboard latch 30) to determine if a new keyboard instruction has been generated.
Keyboard latch 30 receives the 11 bit keyboard instruction generated by keyboard 38 and places it on data lines AO-A10 of data bus 16 whenever it is strobed by enable signal EL.
Latch 30 may be formed from a pair of 8282 Octal latches connected in parallel. When the data block of the keyboard instruction is a character code, microprocessor 12 determines where in font ROM 24 the 16 word character set identified by that character code is located and causes the 16 words of the character set to be placed in display RA~I 26. nisplay RAM 26 then causes this character to be generated in the appropriate character cell 46 of CRT 40.
As noted above, each data word of each character code stored in ROM memory 24 is 16 bits in length. A font ROM 24 constructed of commercially available devices such as those described above with reference to program ROW 22 can store these data words at sequential locations. when-ever microprocessor 12 wishes to read a data word of the selected character set from font ROM 24, it places the appro-priate address on lines Al-A16 of address bus 14, causes - ~6 _ 1 19 7~ 2 3 decoder 32 to venerate the chip ennble signal En antl simul-taneously venerates the read signal I. This will cause the 16 bit data word to appear on bus 16 which can -then be read in to an in-ternal memory of rnicroprocessor 12. Thls fate ` 5 word is then transferred to the appropriate storage location in display Rail 26 by placlng the appropriate address signa on lines Al-~16 of address bus 14 and placing toe data re-ceived -from font R0~l 24 on lines A0-A15 o-f data-bus 16.
At the same time that the address and da-ta information is placed on the address and data buses 14, 16, microprocessor 12 will simultaneously cause decoder 32 to generate *he chip enable signzl ~5 and also generate the write signal I.
This causes-display RA~1 26 to read the 16 bit data word on Gus 16 into the address storage location identified by the address on bus 14. At certain times, it is necessary for microprocessor 12 to read speci-~ic data words out of display Ray 26. This is accom21ished by placing an appropriate address on address bus 14, I- causing decoder 32 to generate the chip enabLe signal E5 and si-multaneously generating the read signa] RD.
As shown in Figure 4, the display RA~/I 26 is hroken up into 1,024 x 1,024 pixel locations 4~' which correspond on a one-to-one basis to pixel locations 4~ on the CRT ~0. one com-~ercially available unit which incorporates the bi-t mapped dis- -play RAI`d, the CENT display and the necessary drive circuitry to cause the pixel information stored in the display RAY to be re-produced on the display is a model GM~ 1000 bit mapped high resolution CRT displaY manufactured by Image Automation Inc.
The 16 bit data words read from font R0~l 24 are written in-to display RA~,I 26 16 bits a-t a time. us such J 16 consecutive pixel locations 4~l define a single address loca-tion o-f display RAM
26. Consecutive address loca-tions are located adjacent one arlother in a pixel rove. Thus, address location 000 is the first storage location in pixel ro~v 0, nddress locn-tion 001 it the second storage location in pixel ro~v 0, etc. Since -the RA~,l memory 26 is 1,02~ pixels wide, nnd since ench dnt.l worn is 16 - 17 l 3 pixels in leng-th, eaeh plxel row o displny JAM 26 eon-tains 6 data worms at acldress loeations 000-063. The 6~th (lata loea-tion is loeated at the leftmost end of pixel row 1 with 64 data words being stored at address loeations 63-127 ox row 1. In a similar manner, 64 data words ~vill be stored ln eaeh of the 1,024 pixel rows ox display RAM 26.
The memory spaee of display RAM 26 is lo~ieally divi-ded into eharaeter eells 46 ~vhieh eorrespond on a one-to-one,~
basis to eharaeter eells ~6 of CRT 40. Thus, the eharaeter eell 46' loeated in the upper left-hand eorner o display RAM
26 eorresponds to the eharaeter eell 46 loeated in the upper le~t-hand eorner o CRT ~0. In aecordanee with this protoeol, the eharaeter eell 46~ loeated in the upper lef-t-hand eorner of display RAM 26 will eontain the 16 word eharaeter set lS wick defines the eharacter to be dis'played in the upper left-hand eharacter eell 46 of CRT 40.' The 16 data'words of the charaeter set are stored at storage loeations 0, 64, 12~, 192 ... 1,024 ox display RAM 26.
' Display R~,'.l 26 will automa*ically apply appropriate 2Q biasing signals (e.g., ver-tical sync, horizontal svne ancl data stream) to the CRT 40 so as to cause the CRT 40 to dis-play the eharaeter informatiorl stored in display RA~.I 26.
Thus, as information is written into display RAhl 2~, it is, for practieal purposes, simultaneously displayed on CRT 40.
In order to identiFy the partieular eharacter eells 46, ~6l in both CRT 40 and display RAM 26, both CRT 40 anfl display JAM 26 are logically broken up into 6~ cell eolu~ns and 64 eell rows. Referring to Figures 2 and 3, the eell eolumns are numbered 0-63 as are the cell rows. As sueh, each character cell ~6, 46' has a unique set of eoordinates.
For example, the letter "S" illustrated in figure 2 is dis-played in the character cell ~6 locatecl at eell row 0, cell - column 0; the letter "H" is displayecl in the eharaeter eell c locatecl at cell ro~v 0, cell eoluriln 1, e-tc.
The character cell 46 in which the next character idell-ti:Fied by the character code generated by keyboard 38 is to be placed will be referred to us the l'active" charac-ter cull. Microprocessor 12 jeeps tract o:E -the location o-the ac-t.ive character cell by storing cell row ar.id column pointers CR, CC, respectively, in scratch pad RAM 28. The microprocesor 12 identi:Eies the loca-tion ox the active cell to the user ox system 10 by generatinj~ a cursor 48 in the active cell. In the preferred embodiment, cursor 48 takes the form of a line of pixels 4~ loca-ted in the lowermost line of the active character cell 46. Each time keyboard 38 generates a new character code identi-Fying a character to be placed i.n the active character cell, microprocessor 12 moves the cursor 48 one character cell ~6 -to the right when the cursor is loca-ted in the last character cell 4~ in a given row>.microprocessor 12 moves the cursor to the left-most character cell 46 o:E the next cell row.
In the ernbodiment disclosed herein, the location o. the active cell, and therefore the position ox cursor 48, can also be moved to the left or to the right in response to cursor let or cursor right command signals, respectively.
II desired, cursor up and cursor down command signal could also be provided as well as any other cursor movements com-rnon to text editing and photocomposing apparatùs. When the position of is changed in response to cursor let or cursor right comMands> cursor 48 is moved without ca~lslng -the cha-racter located in the charac-ter cells 46 -traversed by cursor 4~ to be removed from CUT 40. In contrast, when the cursor ~8 is moved to the left.or to the right in response to space or backspace commands, the characters stored in -the charac-ter cells ~6 traversed by cursor will be erased by micro-processor 12. The pos.ition ox the cursor can also be changed in r~-sponse -to a carriage return co~nman~l signal gen-erated by ~;ey~oard 38. In this case) microprocessor 12 causes -the cursor to be moved to the le~trnost character cell 7~3 46 in the next succeecling cell row. Again "novemen-t o:E the cursor 48 into this new character cell 46 will not cause the character stored in the cell 46, i any, to he erased.
- us noted above, microprocessor 12 continually strobes keyboard latch 30 to determine i-f a new keyboard instruc-tion has been generated by keyboard 38. Microprocessor l will enter new character inforrnation in display RA31 26 and/or move the location of the cursor 48 in response to these keyboard . instructions. Microprocessor 12 also stores each data worn corresponding to a character code generated by keyboard ~8 in text buffer and scratch pad Rail 2~ at a memory location corresponding to -the character cell 46' in which the character identified by that character code is stored. In this manner, text buffer and scratch pad RAM 2~ contains character cocle information corres~ondlllg to all o -the characters s-tored in display RA~.I 26. While any appropriate memory can be used for text buffer ancl scra-tch pad RUM 28, one suitable mernory is an 8,192 x 8-bit integrated RUM which is sold by Intel ( Corporation under the product designation 2186 RA~,l. Since each 2186 RA~,I stores 8 bit words, and since microprocessor 12 places either 9 or 16 bi-t worcls into RA~,S 28, two 2186 Ails just be connected in parallel. Both adclress inpllts of tha 2186 R~L~1S will recelve address lines Al-A16 of address bus 14 wile the data output of one of the RAMS will be connected to the data lines A0-~7 ancl the data outputs Old the rernaining RUM will be connected to the lines A8-A15 of data bus 16.
The information stored in RAM 28 can be used to re-fresh the memory in display RAY 26 whenever necessary. Ad-clitionally, once an entire page of information has been store .in display EM 26, it mus-t be cleared to enter a new page of information. At this time, the character code- stored in text buffer and scratch pad JAM 28 may he transferred to a larger, rnore perrnanent mass memory (not shown) such as a sloppy clisk or hard d.isk. In this manner, character co(]e information -for 2o - ll9 ~6~3 a plurality of pages may be stored in the mass memary. This information may be recalled at any time and may be also used to transfer character code information to a phototypesetter which creates photographic negatives of a printing plate from the character code information. The phototypesetter will con-tain font infoxmation corresponding to that stored in font R0 24 so that the characters produced by the phototypesetter take substantially the same shape as those displayed on CRT 40.
While the manner in which information is transferred from text buffer and scratch pad RAM 28 to the mass memory is not de-scribed herein, such information transfer procedures are well known to those of ordinary skill in the art. Exemplary mass storage media and message for transferring information from a temporary memory to such media are described in the SYSTEMS
15 DATA CATALOG, dated January 1982, and published by Intel Cor-poration.
As noted above, the least significant bit of the address generated by microprocessor 12 (which bit is located on output port A0) is not placed on address bus l As a 20 result, the address actually received by memories 22-28 is equal to the address generated by microprocessor l,t, divided by two. The reason for this somewhat unusual arrangement is particular to the structure and operation of the 8086 micro-processor.
As described in some detail in the 'tiAPX 86, 88 sons Manual", the 8086 microprocessor can access either 8 or 16 bits of memory at a time. Whenever the 8086 micropro-cessor wishes to access a 16 bit word in memory in a single bus cycle, it must generate an even number address (i.e., 2, I, 6, ...) on its output ports A-Al9. Whenever it generates an odd number address, the 8086 microprocessor mus-t access the external memories one 8 bit byte at a time in two conse-cutive bus cycles. Since such 8 bit byte addressing is not required by the remaining elements of system 10, and since - 21 Jo -the use o 8 bit byte adclresses eomplicates the cleslgn oE
the system 10, it is preferred that the mieroprocessor gen-erate only even numbered addresses.
While i* is preEerable for microprocessor 12 to generate even number adclresses, it would be wasteful not to use the odd address loeations in the memories 22-28.
This problem is simply solved by not eonneeting address line AO tWhich eontains the least significant bit ox the address generated by mieroprocessor 12) to the addrèss hus 14. The efeet of the foregoing is that microprocessor 12 Jill generate even addresses only but the memory elements ?2-2~ of the system 10 will receive both ocld anci even Ed-dresses. Thus, the addresses 2, 4, 6, 8, ete. generated by ~ieroprocessor 12 ~Y~ll be applied to address bus 14 as lS addresses 1, 2, 3, 4, etc.
The operat,ion of font display and text editing sys-tern 10 will now be described with reference to Figures 5-7 which sholY the program stored in program P.O~I 22 in flow chart Norm. The main program is illustrated in Figures 5~, B and C. Jo su'oroutines are illustrated in Figures 6 and 7~
The main program starts at instruetion bloc 100 which instrue-ts mieroprocessor 12 to clear both display RUM
20 and text buffer and scratch pad RAM 28. A-t the same time the character codes previously stored in text buyer 28 may 2~ be -trans-~'erred to a larger, more permanent mass Emory or later retrieval and ulti~ately,for transfer to a phototype-setting mach,ine. Once the RAMs 26 and 28 have been clearecl, microprocessor 12 proceeds to instruction bloc 102 and sets the cell row pointer CR and cell column pointer CC to zero these pointers define the character cell ~6 located at the upper left-hand corner of CUT 40 as the active character eell.
~licroprocessor 12 then proceeds to instruction bloc 104 which tells it to go -to cursor subroutine 200 ancl return.
Subroutine 200 causes a cursor ~8 to he placed at the bottom of the active character cell 46 ic~entifie~ by poln-ters CR
and CC.
... . . _.. .. ., .. .. _ .. _.. . . . ... . ... . _................ . . . . . ... .....
~L~L9~
Referring to F`ig~lre 6, instruc-t.ion block 2n2 causes microprocessor 12 to cnlculate and st.ore the following vnlue in its internal roister B:
REG = OR x 6~ x 16 -I 64 x 15 CC]2 Eq. 1 Since there are 64 x 16 storage locations in each cell row/ of , display R~i 26, the terms ox ecluat.ion 1 which are located in brackets define the address of the last data Ford of the cha-racter cell 46' of display Raid 26 which eorresponds -to the ac--tive charactèr cell 46 of CRT 40. This address is multiplied by two since the atldress venerated by microprocessor 12 must be twice the address ~v`nich appears on adclress bus 14 Kit shoulcl be re,~e~bered that the least significant bit of the address gener,~ted by microprocessor 12 is not applied to address bus 14 since the output port AO of microprocessor 12 is not con-nected to address latch 18~.
Upon completion of the.foregoing calcula-tion, micro-processor 12 proceeds to instruction blocX 20~ and reacls -the ' .
datæ ~o~d stored in display RAM 26 at the display RAY address Do AND = REG B/2, inver-ts the word and wri-tes the inverted worcl back into ihe display RA~,I 26 at RUG B/2. Tlle resul-t oE the foregoing is that a cursor line 4~ is placed at the bo-ttorn of the upper left-hand charac-ter cell 46 o-~ CRT 40. At this point, microprocessor 12 returns to the main program.
Referring again to Figure 5A, microprocessor 12 pro-~5 ceeds to declsLon blocX 106 which requires that it determinei~' a keyboard,instruct.ion is being generated by keyboard 38.
~licroprocessor 12 makes -this determination by periodically strobing keyboard latch 30. Once microprocessor 12 has toter wined that a data word has been generatetl by ~eyboarcl 33, it proceeds to decision blocX 108 ancl cletermi.nes if the 9 bit data blocX ox the keyboard instruc-tion is a commancl cocle (this is done by examining the two bit format blocl; of the ke~Tbo~rd instrllctioll). If it is, rnicroprocessor 12 proceecls to in-struction block 128 which is illus-trated in Figure 5~. In - 23 - ~97~
such a case, microprocessor 12 moves the cursor in a wanner determinecl by -the command code -following -the various program steps illustrated in Figures 5B and 5C. This action will be described below.
I-f the keyboard instruction is not a command code, it must be a character code iden-tifyin~ a character to be displayed in the active character cell ~6. ~Yhen the keyboard instr~lction is not a com~anfl code, microprocessor 12 proceeds to instruc-( tion bloc 110 and sets its internal register A equal~to the io character code set forth in the data block of the keyboard. in-struction. This code iden-tifies the position in font R0~ 24 o:E the character set describing the letter identified by the character code.. Microprocessor 12 then proceeds to instruction block 112 and stores the charac-ter code in text buf-Eer and l scratch pad R~l 2~ at the following text buEfer adtlress:
TB ADD = CR x 64 -I CC Eq. 2 I- Slice there are 64 cell ro\~s in each cell column, this cal-culation causes the character code identified by keyboard 38 to be stored in text buf-fer and scratch pa RAM 2~ at an ad-dress location corresponding to the particu]ar character cell ~6 in ~Yhich the character identified by the character cove is displayed on CRT 40.
microprocessor 12 now proceeds to instruction blocX
14 which causes it to go to subroutine 300 and then return to the main program. Display character subroutine 300 1s illus-trated in Figure 7 and causes the character associated with the character code identified by keyboard 38 to be placed in the acti.ve character cell 46' of display RA~/~ 26. This, in turn, causes the character to be displayed in the active cha-racker cell ~6 o~-CRT 40.
Referring to Figure 7, microprocessor 12 first pro-ceeds to instructl.on block 302 wh.ich causes microprocessor 1 to set its inte-rnal resister B with -the following, nulllh~r:
2~ 3 REC; B = REG x 16 x 2 Eq. 3 This calculation results in a n~lmber being store~l in register which eorresponds to the address loca-tion in wont RO~/I 24 where the first data word of the charaeter set identlfied by
is stored at address locations 4,112-4,127, etc.
The 9 bit character codes identifying the address locations of the 16 word character sets in font Roll 24 are generated by an input device 38 which may take any known form. In the preferred embodiment, input device 38 is an electronic keyboard and will be described as such, It should be recognized, however, that any other input device (-for ex-ample, one utilizing menu selection techniques or one respon-sive to voice actuation) could also be used.
The keyboard 38 preferably takes the form described in copending Canadian application Serial No. 438,066, filed September 30, 19832, and entitled FONT DISPIAY AND TEXT EDITING
SYSTE~I WIT CHARACTER OVERLAY FEATURE. This application is assigned to the assignee of the present invention. This key-board includes both character and command keys. The character keys may be used to identify the characters to be displayed on CRT 40 while the command keys will identify both the font style in which the character is to be displayed as well as standard command functions such as cursor left, cursor right, carriage return and backspace, etc. Keyboard 38 responds to the depression of the character and command keys by generating a keyboard instruction representative of either a character code identifying the character in font JAM 24 to be displayed on CRT 40 or a command code identifying the command instruc-tion to be carried out. The keyboard instruction is prefer-ably an 11 bit word which includes a 2 bit format block followed by a 9 bit data block. The format block identifies the data block of the keyboard instruction as either a com-mand code or a character code. When the 9 bit data block is a command code, it identifies the specific command instruc-tion to be -followed by microprocesor 12. When the 9 bit - 15 _ 11~7~3 data block is a character code, it iden-tifies the specific character in font ROM memory 22 to be displayed on CRY 40.
As described in copending Canadian application Serial No. 438,066, the user first depresses one or more command keys indicating the character font to be used and then depresses appropriate character keys to cause the de-sired character of the selected font to appear on CRT 4a.
Whenever the user wishes to change the font style of subse-quent characters to be displayed on CRT 40, he depresses one or more command keys identifying the new font to be used and then depresses appropriate character keys to enter the desired characters on the screen.
Microprocessor 12 constantly monitors the output of keyboard 38 (by periodically causing decoder 32 to generate the chip enable signal E2 so as to strobe keyboard latch 30) to determine if a new keyboard instruction has been generated.
Keyboard latch 30 receives the 11 bit keyboard instruction generated by keyboard 38 and places it on data lines AO-A10 of data bus 16 whenever it is strobed by enable signal EL.
Latch 30 may be formed from a pair of 8282 Octal latches connected in parallel. When the data block of the keyboard instruction is a character code, microprocessor 12 determines where in font ROM 24 the 16 word character set identified by that character code is located and causes the 16 words of the character set to be placed in display RA~I 26. nisplay RAM 26 then causes this character to be generated in the appropriate character cell 46 of CRT 40.
As noted above, each data word of each character code stored in ROM memory 24 is 16 bits in length. A font ROM 24 constructed of commercially available devices such as those described above with reference to program ROW 22 can store these data words at sequential locations. when-ever microprocessor 12 wishes to read a data word of the selected character set from font ROM 24, it places the appro-priate address on lines Al-A16 of address bus 14, causes - ~6 _ 1 19 7~ 2 3 decoder 32 to venerate the chip ennble signal En antl simul-taneously venerates the read signal I. This will cause the 16 bit data word to appear on bus 16 which can -then be read in to an in-ternal memory of rnicroprocessor 12. Thls fate ` 5 word is then transferred to the appropriate storage location in display Rail 26 by placlng the appropriate address signa on lines Al-~16 of address bus 14 and placing toe data re-ceived -from font R0~l 24 on lines A0-A15 o-f data-bus 16.
At the same time that the address and da-ta information is placed on the address and data buses 14, 16, microprocessor 12 will simultaneously cause decoder 32 to generate *he chip enable signzl ~5 and also generate the write signal I.
This causes-display RA~1 26 to read the 16 bit data word on Gus 16 into the address storage location identified by the address on bus 14. At certain times, it is necessary for microprocessor 12 to read speci-~ic data words out of display Ray 26. This is accom21ished by placing an appropriate address on address bus 14, I- causing decoder 32 to generate the chip enabLe signal E5 and si-multaneously generating the read signa] RD.
As shown in Figure 4, the display RA~/I 26 is hroken up into 1,024 x 1,024 pixel locations 4~' which correspond on a one-to-one basis to pixel locations 4~ on the CRT ~0. one com-~ercially available unit which incorporates the bi-t mapped dis- -play RAI`d, the CENT display and the necessary drive circuitry to cause the pixel information stored in the display RAY to be re-produced on the display is a model GM~ 1000 bit mapped high resolution CRT displaY manufactured by Image Automation Inc.
The 16 bit data words read from font R0~l 24 are written in-to display RA~,I 26 16 bits a-t a time. us such J 16 consecutive pixel locations 4~l define a single address loca-tion o-f display RAM
26. Consecutive address loca-tions are located adjacent one arlother in a pixel rove. Thus, address location 000 is the first storage location in pixel ro~v 0, nddress locn-tion 001 it the second storage location in pixel ro~v 0, etc. Since -the RA~,l memory 26 is 1,02~ pixels wide, nnd since ench dnt.l worn is 16 - 17 l 3 pixels in leng-th, eaeh plxel row o displny JAM 26 eon-tains 6 data worms at acldress loeations 000-063. The 6~th (lata loea-tion is loeated at the leftmost end of pixel row 1 with 64 data words being stored at address loeations 63-127 ox row 1. In a similar manner, 64 data words ~vill be stored ln eaeh of the 1,024 pixel rows ox display RAM 26.
The memory spaee of display RAM 26 is lo~ieally divi-ded into eharaeter eells 46 ~vhieh eorrespond on a one-to-one,~
basis to eharaeter eells ~6 of CRT 40. Thus, the eharaeter eell 46' loeated in the upper left-hand eorner o display RAM
26 eorresponds to the eharaeter eell 46 loeated in the upper le~t-hand eorner o CRT ~0. In aecordanee with this protoeol, the eharaeter eell 46~ loeated in the upper lef-t-hand eorner of display RAM 26 will eontain the 16 word eharaeter set lS wick defines the eharacter to be dis'played in the upper left-hand eharacter eell 46 of CRT 40.' The 16 data'words of the charaeter set are stored at storage loeations 0, 64, 12~, 192 ... 1,024 ox display RAM 26.
' Display R~,'.l 26 will automa*ically apply appropriate 2Q biasing signals (e.g., ver-tical sync, horizontal svne ancl data stream) to the CRT 40 so as to cause the CRT 40 to dis-play the eharaeter informatiorl stored in display RA~.I 26.
Thus, as information is written into display RAhl 2~, it is, for practieal purposes, simultaneously displayed on CRT 40.
In order to identiFy the partieular eharacter eells 46, ~6l in both CRT 40 and display RAM 26, both CRT 40 anfl display JAM 26 are logically broken up into 6~ cell eolu~ns and 64 eell rows. Referring to Figures 2 and 3, the eell eolumns are numbered 0-63 as are the cell rows. As sueh, each character cell ~6, 46' has a unique set of eoordinates.
For example, the letter "S" illustrated in figure 2 is dis-played in the character cell ~6 locatecl at eell row 0, cell - column 0; the letter "H" is displayecl in the eharaeter eell c locatecl at cell ro~v 0, cell eoluriln 1, e-tc.
The character cell 46 in which the next character idell-ti:Fied by the character code generated by keyboard 38 is to be placed will be referred to us the l'active" charac-ter cull. Microprocessor 12 jeeps tract o:E -the location o-the ac-t.ive character cell by storing cell row ar.id column pointers CR, CC, respectively, in scratch pad RAM 28. The microprocesor 12 identi:Eies the loca-tion ox the active cell to the user ox system 10 by generatinj~ a cursor 48 in the active cell. In the preferred embodiment, cursor 48 takes the form of a line of pixels 4~ loca-ted in the lowermost line of the active character cell 46. Each time keyboard 38 generates a new character code identi-Fying a character to be placed i.n the active character cell, microprocessor 12 moves the cursor 48 one character cell ~6 -to the right when the cursor is loca-ted in the last character cell 4~ in a given row>.microprocessor 12 moves the cursor to the left-most character cell 46 o:E the next cell row.
In the ernbodiment disclosed herein, the location o. the active cell, and therefore the position ox cursor 48, can also be moved to the left or to the right in response to cursor let or cursor right command signals, respectively.
II desired, cursor up and cursor down command signal could also be provided as well as any other cursor movements com-rnon to text editing and photocomposing apparatùs. When the position of is changed in response to cursor let or cursor right comMands> cursor 48 is moved without ca~lslng -the cha-racter located in the charac-ter cells 46 -traversed by cursor 4~ to be removed from CUT 40. In contrast, when the cursor ~8 is moved to the left.or to the right in response to space or backspace commands, the characters stored in -the charac-ter cells ~6 traversed by cursor will be erased by micro-processor 12. The pos.ition ox the cursor can also be changed in r~-sponse -to a carriage return co~nman~l signal gen-erated by ~;ey~oard 38. In this case) microprocessor 12 causes -the cursor to be moved to the le~trnost character cell 7~3 46 in the next succeecling cell row. Again "novemen-t o:E the cursor 48 into this new character cell 46 will not cause the character stored in the cell 46, i any, to he erased.
- us noted above, microprocessor 12 continually strobes keyboard latch 30 to determine i-f a new keyboard instruc-tion has been generated by keyboard 38. Microprocessor l will enter new character inforrnation in display RA31 26 and/or move the location of the cursor 48 in response to these keyboard . instructions. Microprocessor 12 also stores each data worn corresponding to a character code generated by keyboard ~8 in text buffer and scratch pad Rail 2~ at a memory location corresponding to -the character cell 46' in which the character identified by that character code is stored. In this manner, text buffer and scratch pad RAM 2~ contains character cocle information corres~ondlllg to all o -the characters s-tored in display RA~.I 26. While any appropriate memory can be used for text buffer ancl scra-tch pad RUM 28, one suitable mernory is an 8,192 x 8-bit integrated RUM which is sold by Intel ( Corporation under the product designation 2186 RA~,l. Since each 2186 RA~,I stores 8 bit words, and since microprocessor 12 places either 9 or 16 bi-t worcls into RA~,S 28, two 2186 Ails just be connected in parallel. Both adclress inpllts of tha 2186 R~L~1S will recelve address lines Al-A16 of address bus 14 wile the data output of one of the RAMS will be connected to the data lines A0-~7 ancl the data outputs Old the rernaining RUM will be connected to the lines A8-A15 of data bus 16.
The information stored in RAM 28 can be used to re-fresh the memory in display RAY 26 whenever necessary. Ad-clitionally, once an entire page of information has been store .in display EM 26, it mus-t be cleared to enter a new page of information. At this time, the character code- stored in text buffer and scratch pad JAM 28 may he transferred to a larger, rnore perrnanent mass memory (not shown) such as a sloppy clisk or hard d.isk. In this manner, character co(]e information -for 2o - ll9 ~6~3 a plurality of pages may be stored in the mass memary. This information may be recalled at any time and may be also used to transfer character code information to a phototypesetter which creates photographic negatives of a printing plate from the character code information. The phototypesetter will con-tain font infoxmation corresponding to that stored in font R0 24 so that the characters produced by the phototypesetter take substantially the same shape as those displayed on CRT 40.
While the manner in which information is transferred from text buffer and scratch pad RAM 28 to the mass memory is not de-scribed herein, such information transfer procedures are well known to those of ordinary skill in the art. Exemplary mass storage media and message for transferring information from a temporary memory to such media are described in the SYSTEMS
15 DATA CATALOG, dated January 1982, and published by Intel Cor-poration.
As noted above, the least significant bit of the address generated by microprocessor 12 (which bit is located on output port A0) is not placed on address bus l As a 20 result, the address actually received by memories 22-28 is equal to the address generated by microprocessor l,t, divided by two. The reason for this somewhat unusual arrangement is particular to the structure and operation of the 8086 micro-processor.
As described in some detail in the 'tiAPX 86, 88 sons Manual", the 8086 microprocessor can access either 8 or 16 bits of memory at a time. Whenever the 8086 micropro-cessor wishes to access a 16 bit word in memory in a single bus cycle, it must generate an even number address (i.e., 2, I, 6, ...) on its output ports A-Al9. Whenever it generates an odd number address, the 8086 microprocessor mus-t access the external memories one 8 bit byte at a time in two conse-cutive bus cycles. Since such 8 bit byte addressing is not required by the remaining elements of system 10, and since - 21 Jo -the use o 8 bit byte adclresses eomplicates the cleslgn oE
the system 10, it is preferred that the mieroprocessor gen-erate only even numbered addresses.
While i* is preEerable for microprocessor 12 to generate even number adclresses, it would be wasteful not to use the odd address loeations in the memories 22-28.
This problem is simply solved by not eonneeting address line AO tWhich eontains the least significant bit ox the address generated by mieroprocessor 12) to the addrèss hus 14. The efeet of the foregoing is that microprocessor 12 Jill generate even addresses only but the memory elements ?2-2~ of the system 10 will receive both ocld anci even Ed-dresses. Thus, the addresses 2, 4, 6, 8, ete. generated by ~ieroprocessor 12 ~Y~ll be applied to address bus 14 as lS addresses 1, 2, 3, 4, etc.
The operat,ion of font display and text editing sys-tern 10 will now be described with reference to Figures 5-7 which sholY the program stored in program P.O~I 22 in flow chart Norm. The main program is illustrated in Figures 5~, B and C. Jo su'oroutines are illustrated in Figures 6 and 7~
The main program starts at instruetion bloc 100 which instrue-ts mieroprocessor 12 to clear both display RUM
20 and text buffer and scratch pad RAM 28. A-t the same time the character codes previously stored in text buyer 28 may 2~ be -trans-~'erred to a larger, more permanent mass Emory or later retrieval and ulti~ately,for transfer to a phototype-setting mach,ine. Once the RAMs 26 and 28 have been clearecl, microprocessor 12 proceeds to instruction bloc 102 and sets the cell row pointer CR and cell column pointer CC to zero these pointers define the character cell ~6 located at the upper left-hand corner of CUT 40 as the active character eell.
~licroprocessor 12 then proceeds to instruction bloc 104 which tells it to go -to cursor subroutine 200 ancl return.
Subroutine 200 causes a cursor ~8 to he placed at the bottom of the active character cell 46 ic~entifie~ by poln-ters CR
and CC.
... . . _.. .. ., .. .. _ .. _.. . . . ... . ... . _................ . . . . . ... .....
~L~L9~
Referring to F`ig~lre 6, instruc-t.ion block 2n2 causes microprocessor 12 to cnlculate and st.ore the following vnlue in its internal roister B:
REG = OR x 6~ x 16 -I 64 x 15 CC]2 Eq. 1 Since there are 64 x 16 storage locations in each cell row/ of , display R~i 26, the terms ox ecluat.ion 1 which are located in brackets define the address of the last data Ford of the cha-racter cell 46' of display Raid 26 which eorresponds -to the ac--tive charactèr cell 46 of CRT 40. This address is multiplied by two since the atldress venerated by microprocessor 12 must be twice the address ~v`nich appears on adclress bus 14 Kit shoulcl be re,~e~bered that the least significant bit of the address gener,~ted by microprocessor 12 is not applied to address bus 14 since the output port AO of microprocessor 12 is not con-nected to address latch 18~.
Upon completion of the.foregoing calcula-tion, micro-processor 12 proceeds to instruction blocX 20~ and reacls -the ' .
datæ ~o~d stored in display RAM 26 at the display RAY address Do AND = REG B/2, inver-ts the word and wri-tes the inverted worcl back into ihe display RA~,I 26 at RUG B/2. Tlle resul-t oE the foregoing is that a cursor line 4~ is placed at the bo-ttorn of the upper left-hand charac-ter cell 46 o-~ CRT 40. At this point, microprocessor 12 returns to the main program.
Referring again to Figure 5A, microprocessor 12 pro-~5 ceeds to declsLon blocX 106 which requires that it determinei~' a keyboard,instruct.ion is being generated by keyboard 38.
~licroprocessor 12 makes -this determination by periodically strobing keyboard latch 30. Once microprocessor 12 has toter wined that a data word has been generatetl by ~eyboarcl 33, it proceeds to decision blocX 108 ancl cletermi.nes if the 9 bit data blocX ox the keyboard instruc-tion is a commancl cocle (this is done by examining the two bit format blocl; of the ke~Tbo~rd instrllctioll). If it is, rnicroprocessor 12 proceecls to in-struction block 128 which is illus-trated in Figure 5~. In - 23 - ~97~
such a case, microprocessor 12 moves the cursor in a wanner determinecl by -the command code -following -the various program steps illustrated in Figures 5B and 5C. This action will be described below.
I-f the keyboard instruction is not a command code, it must be a character code iden-tifyin~ a character to be displayed in the active character cell ~6. ~Yhen the keyboard instr~lction is not a com~anfl code, microprocessor 12 proceeds to instruc-( tion bloc 110 and sets its internal register A equal~to the io character code set forth in the data block of the keyboard. in-struction. This code iden-tifies the position in font R0~ 24 o:E the character set describing the letter identified by the character code.. Microprocessor 12 then proceeds to instruction block 112 and stores the charac-ter code in text buf-Eer and l scratch pad R~l 2~ at the following text buEfer adtlress:
TB ADD = CR x 64 -I CC Eq. 2 I- Slice there are 64 cell ro\~s in each cell column, this cal-culation causes the character code identified by keyboard 38 to be stored in text buf-fer and scratch pa RAM 2~ at an ad-dress location corresponding to the particu]ar character cell ~6 in ~Yhich the character identified by the character cove is displayed on CRT 40.
microprocessor 12 now proceeds to instruction blocX
14 which causes it to go to subroutine 300 and then return to the main program. Display character subroutine 300 1s illus-trated in Figure 7 and causes the character associated with the character code identified by keyboard 38 to be placed in the acti.ve character cell 46' of display RA~/~ 26. This, in turn, causes the character to be displayed in the active cha-racker cell ~6 o~-CRT 40.
Referring to Figure 7, microprocessor 12 first pro-ceeds to instructl.on block 302 wh.ich causes microprocessor 1 to set its inte-rnal resister B with -the following, nulllh~r:
2~ 3 REC; B = REG x 16 x 2 Eq. 3 This calculation results in a n~lmber being store~l in register which eorresponds to the address loca-tion in wont RO~/I 24 where the first data word of the charaeter set identlfied by
5 the eharacter code identified by keyboard 38 is loeated. Again, it should be remembered that the multiplieand.2 is used in ( equation 3 to ensure t}lat the adclress generated by the miero-.
processor 12 is twice address reeeived by ont RO~I 24.
.~lieroproeessor 12 then proceeds to instruetion blocX
304 and sets its internal register C with -the following nllm-ber: .
REG C = CR x 64 x 16 x 2 + CC x 2 Eq. 4 wince there are 64 x 16 address loeat.ions in each eell row of display Rail 26, equation 4 identi.-~ies the address in dis-ply- Pi 2~ OI the first data ~Yord ox the active eharacter cell I'. Again, the address venerated by miGroproeessor 12 is double the act~lal address signal applied to display RAY 26 since the least significallt bit o-f the address generated by microprocessor 12 iS not applied -to address bus 14, ~licroproeessor 12 now proceeds to instruction bloc 306 which causes microproeessor 12 to set the ineremen-tal pointer IP = O. This number ean be stored in an appropriate storaue loeation of tex-t buffer and scrateh pa RAY 2~.
Proeeeding to instruc-tion bloc 308, mieroproeessor 12 then reads the word stored in font ROM 24 at the following wont RO~I address and stores the word in its internal reglster D:
FR ADD = P.EG ~/2 -I IP Eq. 5 Sinse the imcre~ental pointer IP is 7.ero, ~l.croprocessor 12 reads t.he f.irst word ox the eharneter set wh.ich CoI respollds - ~5 - 11 9 6 Z 3 to tlle charac-ter ident.i:Eied by the ~eybo~rd instrue-tion gen-erated by keyboard 38 from font RO~I 24 into register Do ~iicroprocessor 12 then proceecls to instructlon bloc 310 and writes the word stored in regis-ter D into the display RUM 26 at the following misplay RUM address:
, DR ADD = REG G/2 -I IP x 64 Eq~ 6 Sinee the ineremental pointer IP is set at zero, mieropro-eessor 12 will write the data word stored in resister D into the display RA~.l 26 at the display RAM address corresponding to the first address of the aetlve eharacter cell 4~l Pro-ceeding to instruetion block 312, microprocessor 12 increases - the incremental pointer by one ancl then proceeds to decision bloc 31d. If the ineremental pointer is less than 16~ miero-proeessor 12 returns to instruetion bloc 308 ancl reads the data word located in ths next address location of font RO~I 24 (since incremer.tal pointer IP now is equal to 1) into regis-ter D. ~nis data word is then reacl in-to the second storage location of the aeti~Je eharaeter eell ~6' ancl the i.nerementnl pointer is again inereased by one This proeess repea-ts it-self 16 times with the result that the 16 data words o:E the -character set corresponding to the character code generate by keyboard 38 are placed in the 16 storage loeat.ions o:f the active charac-ter cell 46' of display RUM 26~ Si~ul-taneously, display RAY 26 causes -this eharacter to appear in -the aet.ive character cell 46 of CRT 40. Once mieroprocessc)r 12 his step-ped through instruetion blocl;s 308-312 l times, the ineremen-tal pointer u~ill be equal to 16 and microprocessor 12 Jill re-turn to the main program.
Referring aga:in to Figu:re 5A, mieroprocessor 12 pro-ceeds to instruction bloc 116 ancl increases the ee-ll eolumn pointer CC by one. Proceeding to instruct.ion bloc , micro-processor 12 determines if the cell c.olumn poi.n-ter is equal to 64. If it is less tilan 64, mic.roprocessor 12 proceeds cli-- 26 - ~9~'23 rec-tly to clecision block 122. IE -the cell column pointer is eclual to 6~, this indicates that the cursor has moved off the right hand edge of CRT 40 and must be reset at the leftmost character cell ~6' of -the next cell row. To this end micro-processor 12 proceeds to ins-tr~ction block 120 wherein it sets the cell column pointer at Nero and increases by the cell row pointer by one.
~licroprocessor 12 then proceeds to decision block 122 and determines if the cell row is equal to 64. If it is, this indicates that an at-tempt has been jade to drop the eur-sor below the bottom edge of CRT 40. Since this is an invalicl condition, microprocessor 12~ causes the generation of a tone this may be done in any known manner) which alerts the user of system 10 to the invalid conclition. Microprocessor 12 then l proceeds to instruction block 125 which resets the cursor row and cursor column points at 63 and writes a cursor ~8 in that cell (see bloc 12~). The program then returns to decision block 106 wherein the microprocessor waits or another Xey-( board instruction to be generated by keyboard 38.
If the cell row is less than 64, microprocessor 12 proceeds to ins-truction block 126 which directs it to go to subroutine 200 and re-turn. As a result, a cursor will appear at the bottom ox the active character cell 46 iden-tified by the cursor row and cursor column pointers. At this pc>int, microprocessor 12 returns to decision bloc 106 and waits for an additional keyboard ins-truc-tion -to be generated by keyboard 38.
The manner in which microprocessor lZ responds to a command code generated by keyboard 38 will now be deseribed with reference to Figures 5B and 5C. Aster microprocessor 12 has determin2cl that the keyboard instruction generated by key-board 38 is a command code see clecision block 10~), it pro-ceeds to ins-truction block 12~ which causes lt to go to c~lrsor subroutine 200 and return. This causes the cursor 4~ to ye relnoved from the active character cell 46 identified by the cell rc,w and cell column pointers - - ~7 - 7~3 Proceeding to decision block 130, microprocessor 12 de-termineS if the keyboard instruction is a cursor right cam-m~qnd code. If it is, microprocessor 12 proceeds to ins~ructlon block 132 and increases the cell column pointer by one. Pro-ceedin~ to decision block 134~ mic,roprocessor 12 determinesi~E the cèll column pointer is equal to 64. IE floes equal
processor 12 is twice address reeeived by ont RO~I 24.
.~lieroproeessor 12 then proceeds to instruetion blocX
304 and sets its internal register C with -the following nllm-ber: .
REG C = CR x 64 x 16 x 2 + CC x 2 Eq. 4 wince there are 64 x 16 address loeat.ions in each eell row of display Rail 26, equation 4 identi.-~ies the address in dis-ply- Pi 2~ OI the first data ~Yord ox the active eharacter cell I'. Again, the address venerated by miGroproeessor 12 is double the act~lal address signal applied to display RAY 26 since the least significallt bit o-f the address generated by microprocessor 12 iS not applied -to address bus 14, ~licroproeessor 12 now proceeds to instruction bloc 306 which causes microproeessor 12 to set the ineremen-tal pointer IP = O. This number ean be stored in an appropriate storaue loeation of tex-t buffer and scrateh pa RAY 2~.
Proeeeding to instruc-tion bloc 308, mieroproeessor 12 then reads the word stored in font ROM 24 at the following wont RO~I address and stores the word in its internal reglster D:
FR ADD = P.EG ~/2 -I IP Eq. 5 Sinse the imcre~ental pointer IP is 7.ero, ~l.croprocessor 12 reads t.he f.irst word ox the eharneter set wh.ich CoI respollds - ~5 - 11 9 6 Z 3 to tlle charac-ter ident.i:Eied by the ~eybo~rd instrue-tion gen-erated by keyboard 38 from font RO~I 24 into register Do ~iicroprocessor 12 then proceecls to instructlon bloc 310 and writes the word stored in regis-ter D into the display RUM 26 at the following misplay RUM address:
, DR ADD = REG G/2 -I IP x 64 Eq~ 6 Sinee the ineremental pointer IP is set at zero, mieropro-eessor 12 will write the data word stored in resister D into the display RA~.l 26 at the display RAM address corresponding to the first address of the aetlve eharacter cell 4~l Pro-ceeding to instruetion block 312, microprocessor 12 increases - the incremental pointer by one ancl then proceeds to decision bloc 31d. If the ineremental pointer is less than 16~ miero-proeessor 12 returns to instruetion bloc 308 ancl reads the data word located in ths next address location of font RO~I 24 (since incremer.tal pointer IP now is equal to 1) into regis-ter D. ~nis data word is then reacl in-to the second storage location of the aeti~Je eharaeter eell ~6' ancl the i.nerementnl pointer is again inereased by one This proeess repea-ts it-self 16 times with the result that the 16 data words o:E the -character set corresponding to the character code generate by keyboard 38 are placed in the 16 storage loeat.ions o:f the active charac-ter cell 46' of display RUM 26~ Si~ul-taneously, display RAY 26 causes -this eharacter to appear in -the aet.ive character cell 46 of CRT 40. Once mieroprocessc)r 12 his step-ped through instruetion blocl;s 308-312 l times, the ineremen-tal pointer u~ill be equal to 16 and microprocessor 12 Jill re-turn to the main program.
Referring aga:in to Figu:re 5A, mieroprocessor 12 pro-ceeds to instruction bloc 116 ancl increases the ee-ll eolumn pointer CC by one. Proceeding to instruct.ion bloc , micro-processor 12 determines if the cell c.olumn poi.n-ter is equal to 64. If it is less tilan 64, mic.roprocessor 12 proceeds cli-- 26 - ~9~'23 rec-tly to clecision block 122. IE -the cell column pointer is eclual to 6~, this indicates that the cursor has moved off the right hand edge of CRT 40 and must be reset at the leftmost character cell ~6' of -the next cell row. To this end micro-processor 12 proceeds to ins-tr~ction block 120 wherein it sets the cell column pointer at Nero and increases by the cell row pointer by one.
~licroprocessor 12 then proceeds to decision block 122 and determines if the cell row is equal to 64. If it is, this indicates that an at-tempt has been jade to drop the eur-sor below the bottom edge of CRT 40. Since this is an invalicl condition, microprocessor 12~ causes the generation of a tone this may be done in any known manner) which alerts the user of system 10 to the invalid conclition. Microprocessor 12 then l proceeds to instruction block 125 which resets the cursor row and cursor column points at 63 and writes a cursor ~8 in that cell (see bloc 12~). The program then returns to decision block 106 wherein the microprocessor waits or another Xey-( board instruction to be generated by keyboard 38.
If the cell row is less than 64, microprocessor 12 proceeds to ins-truction block 126 which directs it to go to subroutine 200 and re-turn. As a result, a cursor will appear at the bottom ox the active character cell 46 iden-tified by the cursor row and cursor column pointers. At this pc>int, microprocessor 12 returns to decision bloc 106 and waits for an additional keyboard ins-truc-tion -to be generated by keyboard 38.
The manner in which microprocessor lZ responds to a command code generated by keyboard 38 will now be deseribed with reference to Figures 5B and 5C. Aster microprocessor 12 has determin2cl that the keyboard instruction generated by key-board 38 is a command code see clecision block 10~), it pro-ceeds to ins-truction block 12~ which causes lt to go to c~lrsor subroutine 200 and return. This causes the cursor 4~ to ye relnoved from the active character cell 46 identified by the cell rc,w and cell column pointers - - ~7 - 7~3 Proceeding to decision block 130, microprocessor 12 de-termineS if the keyboard instruction is a cursor right cam-m~qnd code. If it is, microprocessor 12 proceeds to ins~ructlon block 132 and increases the cell column pointer by one. Pro-ceedin~ to decision block 134~ mic,roprocessor 12 determinesi~E the cèll column pointer is equal to 64. IE floes equal
6~, the cursor 48 cannot be moved further to the righ-t in the present cell row. Rather, it must be moved to the leftmost character cell 46 of the following cell row. To this,end, microprocessor 12 sets the cell column pointer at ze:ro an increases the cell row pointer by one as shown in instruction block 136. IE the cell column pointer was less than 64> or if it was equal to 6~ and has been reset in accordance with instruc-tion bloc 136, microprocessor 12 proceeds to decision bloc 13~ and determines if -the cell row pointer is equal to 64. If it is, this indicate5 that an attemp-t has been made to move the cursor 48 off of the bottom right-hand corner of CUT I. Since this is,an invalid condition, microprocessor ( 12 causes the generatlon of a tone (see inst-ruction bloc 140), sets the cell colum.n pointer at 63 and recluces the cell row poiiiter by one (see instruction block 142). This has the effect of moving the cursor 48 to the last cell column in the last cell row of CRT ao once microprocessor 12 advances to instruc-tion bloc 144. If the cell row pointer does not equal 64 (see decision block 138), microprocessor l proceeds to in-struction block 144 and pla,ces a cursor 4~ on the bottorn of the active character cell 46.
Returning to decision block 130, when microprocessor 12 determines that the keyboard instruction is not a cursor right comrnand code, it proceeds to decision.block 146 and de-termines if it is a cursor left command cocle. If it is, it proceeds to instruc-tion block 148 and reduces. the cell column pointer by one. ?.licroprocessor 12 -then de-ter~ines i:E the cell column pointer is less than zero (see decision bloc 15n). If it is not, rnicroprocesSor l proceeds to inlstrUCtiOn bloc 152 which causes a cursor 48 to be placed in the bottom of the nctive 1~L'3"~3 _ 28 -charaeter cell ~6 de-ine~a by the mod.iEied cell eol~lmn ~olnter.
At this polnt, the program returns to decision block 106 and the mieroproeessor 12 waits -for the next data word generatk?~l by keyboard 38.
Re turning to decision bloc 150, if 'c.he eell eolumn pointer is less than Nero, this indieates that an attempt has been made to move the eursor 48 of- the leit-hanc~ side of the CUT 40. Accordingly, the eursor 48 must be moved us one cell row and must be moved to the rightmost eolumn. To this end, microprocessor 12 resets the eell column pointer at 63 and deereases the eell row pointer by one (see instruetion bloc 154). Proceeditlg to decision bloc 156, mieroproeessor 12 determines if the eell row pointer is less than zero. It it is, this ind.ieates that an attempt has been made -to move the eursor Jo a point above the top cell row ox the CUT 40. Since this is an invalid condition, microprocessor 12 genera-tes a tone (see instruction block 158), rese-ts the cell eolumn pointer to zero ænd inereases the eell row pointer by one, This has the effect ox placing the cursor at the bottom ox the upper left-h.snd character cell 46 of CRT 40 once the program proceeds to instruction block 162. At this point, the program will re-turn to decision blocli 106 and microprocessor 12 waits or ihe next keyboard instruc-tion to be genera-tecd by keyboard 38 - Returning to decision bloc 156, i-f the cell row pointer is not less than zero, microprocessor 12 proceeds to illstruction lock 162 and places a cursor 48 at -the bottom of the character cell 64 identifiefl by tile cell eolumn and cell row pointers. Thereafter, the progra~n re-turns to deci-sion block 106 and microprocessor 12 awaits the next keyboard instruction generated by keyboard 38.
Returning to decision bl.ock 146 (see Figllre 5B), it microprocessor 12 determined that the ~eyhoarcl instr~lction is not a cursor le-ft commanta signal, it proceeds to deeision 'olock 16~ (see Figure 5C). In accordanee with decision bloc ~5 164, microprocessor 12 deterlnines it -the keyboarcl i.nstruction .. . . .
- 2~ ~19~Z3 .is a enrriage return commancl code. It it is, microproeessor 12 proceeds to decision bloc 166 an determines i:E.the cell row pointer is equal to 63. If the cell row pointer is equal to 63, the earriage return command code is attempting ,to place .
the eur50r ~8 below th2 bottom edge of CRT 40. ~inee this is an invalid condition, microprocessor 12 causes the generation of a tone (see bloc 168) to alert the user of the invalid condi-tion. Sinee the cursor 48 had been removed in instruction , blocX 12~, it must now be replaced. To this end, instruc-tion block 172 requires that microprocessor 12 go to eursor suhrou-tine ~00 and return. -licroprocessor 12 then returns to deci-sion bloc 106 where it awaits the next keyboard instruction venerated by keyboard 38.
If tne cell row pointer is less than 63l mîeropro-l cessor l proceeds to instruct.Lon block l'tO and se-ts the cell column printer at zero ancl increases the cell row pointer by one. ~licroprocessor 12 then proceeds to i~lstruction bloc 172 n oh the result that a cursor a8 is placed in the -irst ; character cell 46 in the next cell row. The program is then returned to decision block 106 wherein microprocessor 12 again awaits the next keyboard instruction from ke~boar~l 38.
Returning to decision block.l64, if microprocessor 12 - determines tnat the keyboard instruction is not a carriage re-turn command code (it has already determined that it is not a cursor left or a cursor right comrnand code, it must be a back-space command code since there are only four commands in the system disclosed herein.
Proceeding to declsion hloc~ 174 microprocessor 12 determines it the cell row and cell column pointers are both equal'to zero. If they are, the backspace command is an in-~al1d command. In such a case, microprocessor 12 generates a tone (see instruction bloc 176) and causes-a cursor to be placed in the bottorn of the character cell 46 located in the upper left-band corner of CUT 40 (see irlstruction bloc it The program -then returns to decision blocX 106 an the _ 30 _ 1 g 2 3 microprocessor again awalts the next keyboard instructlon Zen-erated by keyboard 3S.
Returning to decision block 174, it the cell row an(l cell character poin-ters are not both equal to zero, micropro-cessor 12 proceeds to decision block 180 and determines if the cell column pointer is equal to zero. If it is not, micropro-cessor 12 reduces the cell column by one (see instruct:ion block 182) and proceeds to instruction bloc 186. It the cell column pointer does equal zero, the cell column pointer is re-set to 63 and the cell row pointer is decreased by one. See instruction block 184. This has the ef-ect o moving the pointer to the rightmost edge o-f the next higher row.
Since the baclispace command should erase any c~arac-ter stored in the newly active character cell 46, microproces-sor 12 proceeds to instruction bloc 186 and sets its internal register A for the character code for a blank. Proceeding to instruction bloc "nicroprocessor 12 jumps to character subroutine 300 and writes the blank in lo newly active cha-racter cell 46. Microprocessor 12 then proceeds to instruc-tion block 190 where it goes to cursor subroutine 200 Wit]l the result that a cursor 48 is placed in the bottom o-f the active character cell ~6 identi-fied by the updated cell col-umn and cell row pointers. The program then returns -to deci-sion block 106 and microprocessor 12 awaits generation ox an additional keyboard instruc-tion by keyboard 3~
As used in the following claims the term "alphabe-tical characters" shall be in-terpreted as including alphanu-meric characters as well as idiographic characters The present invention may be embodied in other spe-cific -forms without departing -from the spirit or essential attributes -thereof and, accordingly, reference shoulcl be made to the appended claims, rather than to the foregoing speci-fication as indicatinu the scope ox the invention
Returning to decision block 130, when microprocessor 12 determines that the keyboard instruction is not a cursor right comrnand code, it proceeds to decision.block 146 and de-termines if it is a cursor left command cocle. If it is, it proceeds to instruc-tion block 148 and reduces. the cell column pointer by one. ?.licroprocessor 12 -then de-ter~ines i:E the cell column pointer is less than zero (see decision bloc 15n). If it is not, rnicroprocesSor l proceeds to inlstrUCtiOn bloc 152 which causes a cursor 48 to be placed in the bottom of the nctive 1~L'3"~3 _ 28 -charaeter cell ~6 de-ine~a by the mod.iEied cell eol~lmn ~olnter.
At this polnt, the program returns to decision block 106 and the mieroproeessor 12 waits -for the next data word generatk?~l by keyboard 38.
Re turning to decision bloc 150, if 'c.he eell eolumn pointer is less than Nero, this indieates that an attempt has been made to move the eursor 48 of- the leit-hanc~ side of the CUT 40. Accordingly, the eursor 48 must be moved us one cell row and must be moved to the rightmost eolumn. To this end, microprocessor 12 resets the eell column pointer at 63 and deereases the eell row pointer by one (see instruetion bloc 154). Proceeditlg to decision bloc 156, mieroproeessor 12 determines if the eell row pointer is less than zero. It it is, this ind.ieates that an attempt has been made -to move the eursor Jo a point above the top cell row ox the CUT 40. Since this is an invalid condition, microprocessor 12 genera-tes a tone (see instruction block 158), rese-ts the cell eolumn pointer to zero ænd inereases the eell row pointer by one, This has the effect ox placing the cursor at the bottom ox the upper left-h.snd character cell 46 of CRT 40 once the program proceeds to instruction block 162. At this point, the program will re-turn to decision blocli 106 and microprocessor 12 waits or ihe next keyboard instruc-tion to be genera-tecd by keyboard 38 - Returning to decision bloc 156, i-f the cell row pointer is not less than zero, microprocessor 12 proceeds to illstruction lock 162 and places a cursor 48 at -the bottom of the character cell 64 identifiefl by tile cell eolumn and cell row pointers. Thereafter, the progra~n re-turns to deci-sion block 106 and microprocessor 12 awaits the next keyboard instruction generated by keyboard 38.
Returning to decision bl.ock 146 (see Figllre 5B), it microprocessor 12 determined that the ~eyhoarcl instr~lction is not a cursor le-ft commanta signal, it proceeds to deeision 'olock 16~ (see Figure 5C). In accordanee with decision bloc ~5 164, microprocessor 12 deterlnines it -the keyboarcl i.nstruction .. . . .
- 2~ ~19~Z3 .is a enrriage return commancl code. It it is, microproeessor 12 proceeds to decision bloc 166 an determines i:E.the cell row pointer is equal to 63. If the cell row pointer is equal to 63, the earriage return command code is attempting ,to place .
the eur50r ~8 below th2 bottom edge of CRT 40. ~inee this is an invalid condition, microprocessor 12 causes the generation of a tone (see bloc 168) to alert the user of the invalid condi-tion. Sinee the cursor 48 had been removed in instruction , blocX 12~, it must now be replaced. To this end, instruc-tion block 172 requires that microprocessor 12 go to eursor suhrou-tine ~00 and return. -licroprocessor 12 then returns to deci-sion bloc 106 where it awaits the next keyboard instruction venerated by keyboard 38.
If tne cell row pointer is less than 63l mîeropro-l cessor l proceeds to instruct.Lon block l'tO and se-ts the cell column printer at zero ancl increases the cell row pointer by one. ~licroprocessor 12 then proceeds to i~lstruction bloc 172 n oh the result that a cursor a8 is placed in the -irst ; character cell 46 in the next cell row. The program is then returned to decision block 106 wherein microprocessor 12 again awaits the next keyboard instruction from ke~boar~l 38.
Returning to decision block.l64, if microprocessor 12 - determines tnat the keyboard instruction is not a carriage re-turn command code (it has already determined that it is not a cursor left or a cursor right comrnand code, it must be a back-space command code since there are only four commands in the system disclosed herein.
Proceeding to declsion hloc~ 174 microprocessor 12 determines it the cell row and cell column pointers are both equal'to zero. If they are, the backspace command is an in-~al1d command. In such a case, microprocessor 12 generates a tone (see instruction bloc 176) and causes-a cursor to be placed in the bottorn of the character cell 46 located in the upper left-band corner of CUT 40 (see irlstruction bloc it The program -then returns to decision blocX 106 an the _ 30 _ 1 g 2 3 microprocessor again awalts the next keyboard instructlon Zen-erated by keyboard 3S.
Returning to decision block 174, it the cell row an(l cell character poin-ters are not both equal to zero, micropro-cessor 12 proceeds to decision block 180 and determines if the cell column pointer is equal to zero. If it is not, micropro-cessor 12 reduces the cell column by one (see instruct:ion block 182) and proceeds to instruction bloc 186. It the cell column pointer does equal zero, the cell column pointer is re-set to 63 and the cell row pointer is decreased by one. See instruction block 184. This has the ef-ect o moving the pointer to the rightmost edge o-f the next higher row.
Since the baclispace command should erase any c~arac-ter stored in the newly active character cell 46, microproces-sor 12 proceeds to instruction bloc 186 and sets its internal register A for the character code for a blank. Proceeding to instruction bloc "nicroprocessor 12 jumps to character subroutine 300 and writes the blank in lo newly active cha-racter cell 46. Microprocessor 12 then proceeds to instruc-tion block 190 where it goes to cursor subroutine 200 Wit]l the result that a cursor 48 is placed in the bottom o-f the active character cell ~6 identi-fied by the updated cell col-umn and cell row pointers. The program then returns -to deci-sion block 106 and microprocessor 12 awaits generation ox an additional keyboard instruc-tion by keyboard 3~
As used in the following claims the term "alphabe-tical characters" shall be in-terpreted as including alphanu-meric characters as well as idiographic characters The present invention may be embodied in other spe-cific -forms without departing -from the spirit or essential attributes -thereof and, accordingly, reference shoulcl be made to the appended claims, rather than to the foregoing speci-fication as indicatinu the scope ox the invention
Claims (25)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A font display and text editing system, com-prising: a display medium; a memory storing digital in-formation describing the shape of each alphabetical charac-ter of a plurality of sets of alphabetical characters, each said set of alphabetical characters defining a respective font; a human responsive input device which permits the user of said system to select from said sets of alphabeti-cal characters an alphabetical character to be displayed at a specific location on said display medium, said input device generating a signal indicative of the alphabetical character selected by said user; and a circuit responsive to said signal for displaying said selected alphabetical character at said location in said display medium, said cir-cuit including a bit mapped RAM which contains an array g by p storage location and wherein said display device is divided into g by p pixel locations, said storage locations cor-responding to said pixel locations on a one-to-one basis, g and p being positive intergers much greater than 1; and means for displaying, on said display device, the informa-tion stored in said bit mapped RAM.
2. The system of claim 1, wherein characters from different said sets of alphabetical characters can be displayed on said display medium simultaneously.
3. The system of claim 1, wherein said input device and said circuit cooperate to permit the position of said characters displayed on said display device to be changed.
4. The system of claim 1, wherein said circuit reacts to the generation of two successive signals generated by said input device, said two successive signals respec-tively identifying first and second characters which form part of different said sets of alphanumeric characters, by simultaneously displaying said first character at a first location on said display medium and said second character at a second location on said display medium.
5. The system of claim 1, wherein each character is stored in said memory as a unique set of binary numbers which describe the shape of that character.
6. The system of claim 5, wherein the shape of each character is defined by an array of n rows and m columns of binary numbers, each number indicating whether or not a pixel is to appear at a corresponding pixel location on said display medium, n and m being positive integers.
7. The sytem of claim 6, wherein said array is stored as n binary words, each word including m bits of information.
8. The system of claim 7, in which each word of a given character is stored in sequential locations in said memory.
9. The sytem of claim 8, wherein each character is assigned a unique character code which identifies the storage location of said memory at which the first word of that character is stored.
10. The system of claim 9, wherein said signal generated by said input device identifies the character code of the character selected by said user.
11. The system of claim 10, wherein said circuit responds to said signal by sequentially reading each word of the character identified by said character code out of said memory and displaying the corresponding character on said display medium
12. The system of claim 1, wherein said display device is able to display one page of text at a time and wherein said system further includes a second memory for storing each of the signals generated by said input device and corresponding to said one page of text displayed on said display device.
13. The system of claim 12, wherein said circuit erases the page of information displayed on said display device responsive to an appropriate control signal generated by said input device, and wherein said system further includes means for transferring all of said signals stored in said second memory into a mass memory when said circuit erases said page of information displayed on said display device.
14. The system of claim 1, wherein 800 < g <
1100 and 800 < p < 1100.
1100 and 800 < p < 1100.
15. The system of claim 14, wherein said display device is a cathode ray tube divided into 800 to 1100 lines of information, each line containing 800 to 1100 pixel locations such that each pixel location corresponds to a corresponding one of said storage locations on a one-to-one basis.
16. The system of claim 14, wherein each character is stored in said memory as a unique set of binary numbers which describe the shape of that character.
17. The system of claim 16, wherein the shape of each character is defined by an array of n rows and m columns of binary numbers, each binary number indicating whether or not a pixel is to appear at one or more corresponding pixel locations on said display medium, n and m being positive integers much less than p and g, respectively.
18. The system of claim 17, wherein said array is stored as n binary words, each word including m bits of information.
19. The system of claim 18, wherein each word of a given character is stored in sequential locations in said memory.
20. The system of claim 19, wherein each character is assigned a unique character code which identifies the storage location of said memory at which the first word of that character is stored.
21. The system of claim 20, wherein said signal generated by said input device identified the character code of the character selected by said user.
22. The system of claim 21, wherein said circuit responds to said signal by sequentially reading each word of the character identified by said character code out of said memory and storing corresponding bits of information in corresponding storage locations of said bit mapped RAM.
23. The system of claim 1, wherein characters from different said sets of alphabetical characters can be displayed on said display medium simultaneously.
24. The system of claim 1, wherein said input device and said circuit cooperate to permit the user of said system to change the position of said characters displayed on said display.
25. The system of claim 1, wherein said circuit reacts to the generation of two successive signals generated by said input device, said two successive signals respectively identifying first and second characters which form part of different said sets of alphanumeric characters by simultaneously displaying said first character at a first location on said display medium and said second character at a second location on said display medium.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US43232382A | 1982-10-01 | 1982-10-01 | |
US432,323 | 1982-10-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1197623A true CA1197623A (en) | 1985-12-03 |
Family
ID=23715662
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000438050A Expired CA1197623A (en) | 1982-10-01 | 1983-09-30 | Font display and text editing system |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0105491A3 (en) |
JP (1) | JPS5993490A (en) |
CA (1) | CA1197623A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6697070B1 (en) | 1985-09-13 | 2004-02-24 | Renesas Technology Corporation | Graphic processing system |
JPH0762794B2 (en) * | 1985-09-13 | 1995-07-05 | 株式会社日立製作所 | Graphic display |
US4937565A (en) * | 1986-06-24 | 1990-06-26 | Hercules Computer Technology | Character generator-based graphics apparatus |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4298957A (en) * | 1979-06-28 | 1981-11-03 | Xerox Corporation | Data processing system with character sort apparatus |
-
1983
- 1983-09-29 EP EP83109787A patent/EP0105491A3/en not_active Withdrawn
- 1983-09-30 JP JP58184327A patent/JPS5993490A/en active Pending
- 1983-09-30 CA CA000438050A patent/CA1197623A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0105491A2 (en) | 1984-04-18 |
JPS5993490A (en) | 1984-05-29 |
EP0105491A3 (en) | 1987-02-25 |
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