GB2128447A - Telephone exchange system test equipment - Google Patents
Telephone exchange system test equipment Download PDFInfo
- Publication number
- GB2128447A GB2128447A GB08228609A GB8228609A GB2128447A GB 2128447 A GB2128447 A GB 2128447A GB 08228609 A GB08228609 A GB 08228609A GB 8228609 A GB8228609 A GB 8228609A GB 2128447 A GB2128447 A GB 2128447A
- Authority
- GB
- United Kingdom
- Prior art keywords
- monostable
- input signal
- time
- occurrence
- telephone exchange
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
- H04M3/241—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for stored program controlled exchanges
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Monitoring And Testing Of Exchanges (AREA)
Abstract
An electronic monitoring device monitors the operation of a device which functions regularly at preset intervals, e.g. a cyclic polling operation as in the telephone exchange of our Application No. 82 28206 (G. A. Sarson et al 5-4-1). This device includes a first monostable (MS1) which is polled at a 100 ms rate, and if a poll is missed the monostable changes condition to give the processor a "soft fault" input. Such a fault indication can be ignored if it is isolated, or recorded for future reference. There is a second monostable (MS2) whose period is longer, i.e. 1 second, and is polled at the same rate as the first. If there is a period of one second with no poll, the second bistable changes state to give a fault indication. <IMAGE>
Description
SPECIFICATION
Telephone exchange system test equipment
This invention relates to an electronic monitoring device, for continuously monitoring the operation of an electronic system, such as a telephone exchange.
According to the invention there is provided an electronic monitoring device for monitoring the occurrence of an operation intended to occur at preset intervals of time, wherein there is a first monostable device which receives an input signal on each occurrence of said operation, which input signal sets the monostable device to, or maintains it in, a first non-stable state, wherein if a first preset interval of time elapses without the occurrence of said operation the monostable switches to the second stable state, wherein the switching of the monostable to said second state is noted as a fault condition, wherein a second monostable device is provided which receives said input signal on each occurrence of said operation, which input signal sets the second monostable device to, or maintains it in, its first non-stable state, wherein the time-out period of said second monostable is long compared with that of the first monostable circuit, and wherein if said longer time-out period elapses without a said input signal the second monostable times-out and an alarm is given in response to it assuming its second state, which alarm indicates that the operation being monitored has not occurred for said second and relatively long period.
An embodiment of the invention, developed for use in a small telephone exchange, will now be described with reference to the accompanying highly schematic drawing.
The monitoring device to be described herein is suitable for use in conjunction with a variety of electronic systems of type in which during correct operation certain operations occur regularly at specified intervals. However, the invention is described herein as applied to a telephone exchange, and especially to an exchange such as that described and claimed in an Application No.
82 28206 (G. A. Sarson et al 5-4-1).
The exchange for which the monitoring device is described is as small "business-type" exchange in which calls are set up in TDM manner using
PCM to convey speech, and also data if the exchange serves any data terminals. It has subscriber line ports each of which serves two subscriber lines and a smaller number of trunk line ports each of which serves a trunk to a local exchange. Each port has a local processor with, in the case of analogue lines and trunks, analogueto-digital and digital-to-analogue conversion circuitry. Where a line or trunk is of the digital type, naturally no conversion circuitry is needed.
The exchange has a central processor, with its associated memories and interfaces.
The ports and the central processor are interconnected by an intelligence bus, referred to as the PCM bus, and by a signalling bus. The PCM bus has separate conductors for the two directions of transmission. The central processor and the port processors co-operate in call setting, with all inter-processor communications taking place over the signalling bus. During operation, the central processor polls the ports' processors via the signalling bus in search of ports needing the services of the central processor. This polling technique is also used for transmission of information from the central processor to the ports, this of course including call setting information.
To set up a call between two lines, or a line and a trunk, two time slots in the TDM cycle are allocated to that call by the central processor, one for each direction of transmission. By this time the central processor will have identified the calling line from the time slot in the polling cycle in which the calling line was identified. It will also have received the identity of the wanted line or trunk.
Note that the operation is similar if the calling condition was detected on a trunk. Call release is effected when, in the course of polling, the central processor detects that one of the parties to the call has hung up.
With the use of a standard 32 time slot PCM system, two of the time slots are permanently allocated to the emission of tones (e.g. calling tone, busy tone, etc.) and the other 30 slots are available for call setting. Thus if the system is to be non-blocking the total number of lines and trunks served is 15, e.g. 10 lines and 5 trunks.
Two such exchanges can be coupled by linking their busses to give a double capacity exchange.
Note that the number of lines and/or trunks served can be increased of some blocking is tolerated.
As will have been seen, a major feature of the above-described exchange is that call signalling and other transmissions needed for call setting and control are effected over the signalling bus.
Thus the intelligence bus only conveys the PCM codes for speech (or data if there are data terminals) and tones.
The exchange is provided with two conference circuits, each of which can be used to set up a three-party conference, as will be described later.
It also has a so-called watch dog controller which continuously monitors the working of the exchange and gives an alarm if certain fault conditions are detected. The operation of the conference circuit is described and claimed in our
Application No. 82 28844 (G. A. Sarson 1-1).
The watch dog controller monitors the operation of the exchange's central processor by checking for regular ones of the polls, which should occur within a preset time-out period. If the time-out period is exceeded, the watch-dog controller generates a hardware reset, and if an indication that a poll has occurred is still not received, a second time-out occurs, and an alarm lamp is lit.
The watch dog controller includes two retriggerabie monstable circuits MS1 and MS2. Of these MS1 has a time out period of 100ms, and is polled by the main processor via its SOD (Serial
Output Data) pin. The output from this pin occurs at the same time at the commencement of a polling cycle for the exchange, as mentioned above. This output resets the monostable MS 1 to its rest state. Hence if a polling cycle is missed, the monostable MS 1 has time to change its state to its stable state, which gives an output to the processor's TRAP input. Hence the failure of the exchange to poll within 1 OOms causes a TRAP interrupt of the central processor. If only one such poll is missed, MS 1 returns to its other state. Thus the omission of one poll is noted in the processor, and this can be used to give an indication, e.g. by lighting an error indication lamp and/or recording that an error has happened. However, if the error only occurs once in isolation it is regarded as a "soft" error and ignored.
The second monostable MS2 has a one-second time out period, and is kept on by the polling signals from the processor's SOD pin. This monostable is connected to an alarm, such as a fault lamp. Hence if there is no poll for one second,
MS2 times out and operates the fault lamp to indicate the presence of the fault to the maintenance personnel. The monostable MS2 is also provided with a reset button, to reset it when the fault has been cleared.
The watch dog controller also includes an RC network (not shown) via which a power-on reset is provided for the processor.
Claims (3)
1. An electronic monitoring device for monitoring the occurrence of an operation intended to occur at preset intervals of time, wherein there is a first monostable device which receives an input signal on each occurrence of said operations, which input signal sets the monostable device to, or maintains it in, a first non-stable state, wherein if a first preset interval of time elapses without the occurrence of said operation the monostable switches to the second stable state, wherein the switching of the monostable to said second state is noted as a fault condition, wherein a second monostable device is provided which receives said input signal on each occurrence of said operation, which input signal sets the second monostable device to, or maintains it in, its first non-stable state, wherein the time-out period of said second monostable is long compared with that of the first monostable circuit, and wherein if said longer time-out period elapses without a said input signal the second monostable times-out and an alarm is given in response to it assuming its second state, which alarm indicates that the operation being monitored has not occurred for said second and relatively long period.
2. A device as claimed in claim 1, wherein the monitored operation is a sequential poll of a number of portions of a telephone exchange.
3. An electronic monitoring device substantially as described with reference to the accompanying drawing.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08228609A GB2128447B (en) | 1982-10-06 | 1982-10-06 | Telephone exchange system test equipment |
SG39887A SG39887G (en) | 1982-10-06 | 1987-05-04 | Telephone exchange system test equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08228609A GB2128447B (en) | 1982-10-06 | 1982-10-06 | Telephone exchange system test equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2128447A true GB2128447A (en) | 1984-04-26 |
GB2128447B GB2128447B (en) | 1986-10-29 |
Family
ID=10533441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08228609A Expired GB2128447B (en) | 1982-10-06 | 1982-10-06 | Telephone exchange system test equipment |
Country Status (2)
Country | Link |
---|---|
GB (1) | GB2128447B (en) |
SG (1) | SG39887G (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0190370A1 (en) * | 1984-12-31 | 1986-08-13 | International Business Machines Corporation | Device for improving the detection of non-operational states in a non-attended interrupt-driven processor |
WO1989011195A1 (en) * | 1988-05-05 | 1989-11-16 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
US4991199A (en) * | 1988-05-05 | 1991-02-05 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
US5195130A (en) * | 1988-05-05 | 1993-03-16 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
US7693790B2 (en) | 1989-12-08 | 2010-04-06 | Online Resources Corporation | Method and system for remote delivery of retail banking services |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5485370A (en) | 1988-05-05 | 1996-01-16 | Transaction Technology, Inc. | Home services delivery system with intelligent terminal emulator |
US5572572A (en) | 1988-05-05 | 1996-11-05 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly interface and enhanced integrity features |
US5796832A (en) | 1995-11-13 | 1998-08-18 | Transaction Technology, Inc. | Wireless transaction and information system |
-
1982
- 1982-10-06 GB GB08228609A patent/GB2128447B/en not_active Expired
-
1987
- 1987-05-04 SG SG39887A patent/SG39887G/en unknown
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0190370A1 (en) * | 1984-12-31 | 1986-08-13 | International Business Machines Corporation | Device for improving the detection of non-operational states in a non-attended interrupt-driven processor |
WO1989011195A1 (en) * | 1988-05-05 | 1989-11-16 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
GR890100296A (en) * | 1988-05-05 | 1990-03-12 | Transaction Technology Inc | Computer and telephone set apparatus |
US4991199A (en) * | 1988-05-05 | 1991-02-05 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
US5008927A (en) * | 1988-05-05 | 1991-04-16 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface integrity features |
US5195130A (en) * | 1988-05-05 | 1993-03-16 | Transaction Technology, Inc. | Computer and telephone apparatus with user friendly computer interface and enhanced integrity features |
US7693790B2 (en) | 1989-12-08 | 2010-04-06 | Online Resources Corporation | Method and system for remote delivery of retail banking services |
Also Published As
Publication number | Publication date |
---|---|
GB2128447B (en) | 1986-10-29 |
SG39887G (en) | 1987-07-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
746 | Register noted 'licences of right' (sect. 46/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |