JPH0350791A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH0350791A JPH0350791A JP18673889A JP18673889A JPH0350791A JP H0350791 A JPH0350791 A JP H0350791A JP 18673889 A JP18673889 A JP 18673889A JP 18673889 A JP18673889 A JP 18673889A JP H0350791 A JPH0350791 A JP H0350791A
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- plating catalyst
- forming
- plating
- insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 238000007747 plating Methods 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 239000003054 catalyst Substances 0.000 claims abstract description 24
- 239000011347 resin Substances 0.000 claims abstract description 14
- 229920005989 resin Polymers 0.000 claims abstract description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052802 copper Inorganic materials 0.000 claims abstract description 7
- 239000010949 copper Substances 0.000 claims abstract description 7
- 229910000679 solder Inorganic materials 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 3
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 abstract description 12
- 229910002092 carbon dioxide Inorganic materials 0.000 abstract description 6
- 239000001569 carbon dioxide Substances 0.000 abstract description 6
- 238000007650 screen-printing Methods 0.000 abstract description 6
- 238000010306 acid treatment Methods 0.000 abstract description 2
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 abstract description 2
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 abstract description 2
- 238000010030 laminating Methods 0.000 abstract 1
- 230000001376 precipitating effect Effects 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 229910052763 palladium Inorganic materials 0.000 description 2
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000007766 curtain coating Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000007761 roller coating Methods 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は印刷配線板の製造方法に関し、特に回路パター
ンおよびスルーホールの形成工程を含む印刷配線板の製
造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a printed wiring board, and particularly to a method for manufacturing a printed wiring board that includes a step of forming circuit patterns and through holes.
従来、この種の印刷配線板の製造方法は、パラジウム触
媒を分散させためつき触媒入り絶縁基板に、ドリルを用
いて貫通孔をあけ、めっき触媒入り絶縁基板の表裏両面
にスクリーン印刷により、めっきレジストパターンを形
成し、パラジウム触媒の混入されためっき触媒入り絶縁
基板の露出部分に無電解鋼めっきを析出させることによ
り、回路パターンおよびスルーホールを形成するもので
あった。Conventionally, the manufacturing method for this type of printed wiring board has been to use a drill to drill through holes in an insulating substrate containing a plating catalyst in which a palladium catalyst is dispersed, and then apply a plating resist to both sides of the insulating substrate containing a plating catalyst by screen printing. A circuit pattern and through holes were formed by forming a pattern and depositing electroless steel plating on the exposed portion of an insulating substrate containing a plating catalyst mixed with a palladium catalyst.
上述した従来の印刷配線板の製造方法は、以下の欠点が
ある。The conventional printed wiring board manufacturing method described above has the following drawbacks.
（１）回路パターンを形成するために、スクリーン版を
作成する必要があるため１、数量の少ない製品を製造す
る場合、コストが高く製造納期が長くなる。(1) In order to form a circuit pattern, it is necessary to create a screen plate. 1. When manufacturing a small quantity of products, the cost is high and the manufacturing delivery time is long.
（２）回路パターンをスクリーン印刷により形成させる
ため、高精度な回路パターンを形成できない。(2) Since the circuit pattern is formed by screen printing, a highly accurate circuit pattern cannot be formed.
（３）貫通孔を形成する工程とめっきレジストを形成す
る工程が必要で製造工程が多い。(3) The process of forming through holes and the process of forming plating resist are required, resulting in a large number of manufacturing steps.
本発明の目的は、製造工程が少く、短納期でコストが安
く、精度の高い印刷配線板の製造方法を提供することに
ある。An object of the present invention is to provide a method for manufacturing a printed wiring board with fewer manufacturing steps, short delivery time, low cost, and high precision.
本発明の印刷配線板の製造方法は、めっき触媒入り絶縁
基板の表裏両面に、絶縁樹脂層を形成する工程と、レー
ザ光により前記絶縁基板の表裏両面に形成された前記絶
縁樹脂層を所定のパターンに除去すると同時に前記めっ
き触媒入り絶縁基板に前記レーザ光により貫通孔を穿設
する工程と、前記めっき触媒入り絶縁基板の露出した部
分に無電解銅めっきを析出させることにより回路パター
ンおよびスルーホールを形成する工程と、前記めっき触
媒入り絶縁基板の所定の箇所にソルダレジストを形成す
る工程とを含んで構成されている。The method for manufacturing a printed wiring board of the present invention includes a step of forming an insulating resin layer on both the front and back surfaces of an insulating substrate containing a plating catalyst, and a step of forming an insulating resin layer formed on both the front and back surfaces of the insulating substrate with a laser beam in a predetermined manner. A circuit pattern and through holes are formed by removing the plating catalyst into a pattern and at the same time drilling a through hole in the insulating substrate containing the plating catalyst using the laser beam, and depositing electroless copper plating on the exposed portion of the insulating substrate containing the plating catalyst. and forming a solder resist at predetermined locations on the insulating substrate containing the plating catalyst.
〔実施例〕
次に、本発明の実施例について図面を参照して説明する
。[Example] Next, an example of the present invention will be described with reference to the drawings.
第１図（ａ）〜（ｄ）は本発明の第１の実施例の製造方
法を説明する工程順に示した断面図である。FIGS. 1(a) to 1(d) are sectional views showing the manufacturing method of the first embodiment of the present invention in the order of steps.
第１の実施例は、まず、第１図（ａ）に示す如く、めっ
き触媒入り絶縁基板１の表裏両面にプリプレグ２を重ね
、加圧積層を行ない、プリプレグ２による絶縁樹脂層を
形成する。In the first embodiment, first, as shown in FIG. 1(a), prepregs 2 are stacked on both the front and back surfaces of an insulating substrate 1 containing a plating catalyst, and lamination is performed under pressure to form an insulating resin layer of the prepregs 2.
次に、第１図（ｂ）に示す如く、ＹＡＧあるいは炭酸ガ
スレーザにより、プリプレグ２を所定のパターンに除去
し、めっき触媒入り絶縁基板１を露出させると同時に、
所定の箇所にスルーホールとなる貫通孔をＹＡＧあるい
は炭酸ガスレーザで形成する。更に、絶縁基板１の後処
理として、例えば、ホーニング処理、あるいは、クロム
酸処理を行う。Next, as shown in FIG. 1(b), the prepreg 2 is removed in a predetermined pattern using a YAG or carbon dioxide laser to expose the insulating substrate 1 containing the plating catalyst, and at the same time,
Through-holes are formed at predetermined locations using YAG or carbon dioxide laser. Further, as a post-treatment of the insulating substrate 1, for example, honing treatment or chromic acid treatment is performed.
次に、第１図（Ｃ）に示す如く、めっき触媒入り絶縁基
板１の露出部分に無電解銅めっき３を２０〜３０μｍ析
出させることにより、スルホール５および回路パターン
６を形成する。Next, as shown in FIG. 1(C), electroless copper plating 3 is deposited to a thickness of 20 to 30 μm on the exposed portion of the insulating substrate 1 containing a plating catalyst, thereby forming through holes 5 and a circuit pattern 6.
次に、第１図（ｄ）に示す如く、スクリーン印刷により
、ソルダーレジスト４を形成し、第１の実施例の印刷配
線板を得た。Next, as shown in FIG. 1(d), a solder resist 4 was formed by screen printing to obtain a printed wiring board of the first example.
第２図（ａ）〜（ｄ）は本発明の第２の実施例の製造方
法を説明する工程順に示した断面図である。FIGS. 2(a) to 2(d) are sectional views showing the manufacturing method of the second embodiment of the present invention in the order of steps.
第２の実施例は、まず、第２図（ａ）に示す如く、めっ
き触媒入り絶縁基板１の表裏両面に液状の絶縁樹脂、た
とえば、エポキシ樹脂、あるいはポリイミド樹脂をスク
リーン印刷法、カーテンコート法あるいはローラコート
法により、１０〜３０μｍの厚さに塗布し、１３０〜１
６０℃で２０〜６０分間加熱硬化させ、絶縁樹脂層７を
形成する。In the second embodiment, first, as shown in FIG. 2(a), a liquid insulating resin, such as an epoxy resin or a polyimide resin, is applied to both the front and back surfaces of an insulating substrate 1 containing a plating catalyst using a screen printing method or a curtain coating method. Alternatively, apply it to a thickness of 10 to 30 μm using a roller coating method, and apply it to a thickness of 130 to 1
The insulating resin layer 7 is formed by heating and curing at 60° C. for 20 to 60 minutes.
次に、第２図（ｂ）〜（ｄ＞の工程は、第１の実施例と
同一の形成方法により１．第２の実施例の印刷配線板を
得た。Next, in the steps shown in FIGS. 2(b) to 2(d), a printed wiring board of the second example was obtained using the same forming method as that of the first example.
以上説明したように本発明は、めっき触媒入り絶縁基板
の表裏両面に、絶縁樹脂層を形成し、ＹＡＧ、あるいは
、炭酸ガスレーザで所定のパターンに絶縁樹脂層を除去
し、更に、スルホールとなる貫通孔を同時に形成し、め
っき触媒入り絶縁基板の露出した部分に無電解銅めっき
を析出させて、回路パターン、およびスルホールを形成
するため、次に列挙する効果がある。As explained above, the present invention forms an insulating resin layer on both the front and back surfaces of an insulating substrate containing a plating catalyst, removes the insulating resin layer in a predetermined pattern using a YAG or carbon dioxide laser, and then removes the insulating resin layer in a predetermined pattern using a YAG or carbon dioxide laser. Since holes are simultaneously formed and electroless copper plating is deposited on the exposed portion of the insulating substrate containing a plating catalyst to form a circuit pattern and through holes, the following effects are achieved.
（１）ドリルによる貫通孔の形成工程を必要とせず、か
つ、めっきレジストパターンをスクリーン印刷により形
成する工程を必要としたいなめ、製造工程が短縮でき、
短納期で印刷配線板を製造できる。(1) The manufacturing process can be shortened because it does not require the step of forming through holes using a drill and the step of forming the plating resist pattern by screen printing.
Printed wiring boards can be manufactured in a short lead time.
（２）ＹＡＧ、あるいは、炭酸ガスレーザにより直接パ
ターンを形成するため高精度で印刷配線板を製造するこ
とができる。(2) Since patterns are directly formed using YAG or carbon dioxide laser, printed wiring boards can be manufactured with high precision.
（３）回路パターンを形成するために、スクリーン版を
作成する必要がないため、製造数量の少ない製品は低コ
ストでできる。(3) Since there is no need to create a screen plate to form a circuit pattern, products can be manufactured in small quantities at low cost.
第１図（ａ）〜（ｄ）は本発明の第１の実施例の製造方
法を説明する工程順に示した断面図、第２図（ａ）〜（
ｄ）は本発明の第２の実施例の製造方法を説明する工程
順に示した断面図である。
１・・・めっき触媒入り絶縁基板、２・・・プリプレグ
、３・・・無電解銅めっき、４・・・ソルダーレジスト
、５・・・スルホール、６・・・回路パターン、７・・
・絶縁樹脂層。FIGS. 1(a) to (d) are cross-sectional views showing the manufacturing method of the first embodiment of the present invention in the order of steps, and FIGS. 2(a) to (d)
d) is a sectional view showing the manufacturing method of the second embodiment of the present invention in the order of steps; DESCRIPTION OF SYMBOLS 1... Insulating substrate containing a plating catalyst, 2... Prepreg, 3... Electroless copper plating, 4... Solder resist, 5... Through hole, 6... Circuit pattern, 7...
・Insulating resin layer.
Claims (1)
形成する工程と、レーザ光により前記絶縁基板の表裏両
面に形成された前記絶縁樹脂層を所定のパターンに除去
すると同時に前記めっき触媒入り絶縁基板に前記レーザ
光により貫通孔を穿設する工程と、前記めっき触媒入り
絶縁基板の露出した部分に無電解銅めつきを析出させる
ことにより回路パターンおよびスルーホールを形成する
工程と、前記めっき触媒入り絶縁基板の所定の箇所にソ
ルダレジストを形成する工程とを含むことを特徴とする
印刷配線板の製造方法。forming an insulating resin layer on both the front and back surfaces of the insulating substrate containing a plating catalyst; and removing the insulating resin layer formed on both the front and back surfaces of the insulating substrate in a predetermined pattern using laser light, and at the same time forming the insulating substrate containing the plating catalyst; forming a through hole with the laser beam; forming a circuit pattern and through holes by depositing electroless copper plating on the exposed portion of the insulating substrate containing the plating catalyst; 1. A method for manufacturing a printed wiring board, comprising the step of forming a solder resist at predetermined locations on an insulating substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18673889A JPH0770830B2 (en) | 1989-07-18 | 1989-07-18 | Method for manufacturing printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18673889A JPH0770830B2 (en) | 1989-07-18 | 1989-07-18 | Method for manufacturing printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0350791A true JPH0350791A (en) | 1991-03-05 |
| JPH0770830B2 JPH0770830B2 (en) | 1995-07-31 |
Family
ID=16193787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18673889A Expired - Fee Related JPH0770830B2 (en) | 1989-07-18 | 1989-07-18 | Method for manufacturing printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0770830B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005071144A (en) * | 2003-08-26 | 2005-03-17 | Toppan Printing Co Ltd | Antenna coil for ic tag and manufacturing method thereof |
| JP2009278085A (en) * | 2008-05-13 | 2009-11-26 | Kinko Denshi Kofun Yugenkoshi | Structure and manufacturing process for circuit board |
| JP2010135719A (en) * | 2008-12-08 | 2010-06-17 | Kinko Denshi Kofun Yugenkoshi | Process for manufacturing circuit board, and the circuit board |
| DE102011051264A1 (en) | 2010-06-23 | 2011-12-29 | Minebea Co., Ltd. | Motor mount and actuator with motor |
-
1989
- 1989-07-18 JP JP18673889A patent/JPH0770830B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005071144A (en) * | 2003-08-26 | 2005-03-17 | Toppan Printing Co Ltd | Antenna coil for ic tag and manufacturing method thereof |
| JP2009278085A (en) * | 2008-05-13 | 2009-11-26 | Kinko Denshi Kofun Yugenkoshi | Structure and manufacturing process for circuit board |
| JP2010135719A (en) * | 2008-12-08 | 2010-06-17 | Kinko Denshi Kofun Yugenkoshi | Process for manufacturing circuit board, and the circuit board |
| DE102011051264A1 (en) | 2010-06-23 | 2011-12-29 | Minebea Co., Ltd. | Motor mount and actuator with motor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0770830B2 (en) | 1995-07-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080731 Year of fee payment: 13 |
|
| LAPS | Cancellation because of no payment of annual fees |
