CN100483486C - Display device and used display panel, pixel circuit and compensating mechanism - Google Patents

Abstract

A display device has a timing control circuit, a programmable voltage generator, a gate and source drive circuit, and a display panel. On the display panel, there are multiple redundant pixel units and display pixel units. The redundant pixel unit and the display pixel unit are composed of amorphous silicon thin film transistors and organic light emitting diodes. The present invention can activate these redundant pixel units and display pixel units by means of a gate drive circuit, and compare the operating current of each display pixel unit with the operating current of the corresponding redundant pixel unit. Then the timing control circuit will control the programmable voltage generator to generate suitable data voltage to the source driving circuit according to the comparison result, so as to compensate the amount of current shifted by the display pixel unit after working for a period of time.

Description

Display pixel circuit

technical field

The present invention relates to a pixel circuit of a display, in particular to a pixel circuit of a display using an organic light emitting diode as a pixel component.

Background technique

Due to the rapid progress of the multimedia society, the technologies of semiconductor components and display devices have also made rapid progress. As far as the display is concerned, since the Thin Film Transistor-Active Matrix Organic Light Emitting Diode (Thin Film Transistor-Active Matrix Organic Light Emitting Diode, hereinafter referred to as TFT-AMOLED) display has no viewing angle limitation, low manufacturing cost, and high response speed (about a hundred times that of liquid crystal) Above), power saving, can be used for DC drive of portable machines, wide operating temperature range, light weight and can be miniaturized and thinned with hardware equipment, etc., so it meets the characteristic requirements of displays in the multimedia era. Therefore, active organic light-emitting diode displays have great development potential and are expected to become novel flat panel displays of the next generation.

At present, there are mainly two production methods for TFT-AMOLED displays, one is to use low-temperature polysilicon TFT (LTPS TFT) technology, and the other is to use amorphous silicon TFT (a-SiTFT) technology, and the comparison of these two technologies , can be known from Table 1.

LTPS a-Si TFT

Mobility 50—200 0.5—1 Type of TFT PMOS and NMOS NMOS TFT uniformity poor better Mask number 9-10 4-5 cost (pixel array only) high Low Cost (panel module) Low (drive circuit built-in) High (drive circuit is external) equipment investment high Low benefit Low high overall cost Cheaper on small size panels Cheaper on large size panels Output current stability high Low Degradation of OLED Not sensitive sensitive

It can be seen from Table 1 that the uniformity of the TFT-AMOLED display produced by the low-temperature polysilicon TFT technology is not good, and because the low-temperature polysilicon TFT process technology requires more photomask processes, the cost increases. Therefore, at present, low-temperature polysilicon TFT technology is mainly used in small and medium-sized panels, while large-sized panels mostly use amorphous silicon TFT technology.

Although the use of amorphous silicon TFT technology to manufacture TFT-AMOLED displays can help reduce costs, but amorphous silicon TFTs have many disadvantages in characteristics. FIG. 1A shows a characteristic diagram of drain current (Id) and gate voltage (Vg) of an amorphous silicon TFT at different times. As shown in FIG. 1A , the drain current Id of the amorphous silicon TFT will drift after a period of time.

1B and 1C show comparative graphs of component characteristics of amorphous silicon TFTs and low-temperature polysilicon TFTs. Please refer to FIG. 1B first, the horizontal axis represents time, and the vertical axis represents output current. As shown in FIG. 1B , the low-temperature polysilicon TFT has good output current stability, while the output current of the amorphous silicon TFT will start to decrease after working for a period of time. In FIG. 1C , the horizontal axis represents time, and the vertical axis represents brightness. Due to the high stability of the output current of the low-temperature polysilicon TFT, the AMOLED display using the low-temperature polysilicon TFT still has a high brightness after working for a period of time. In contrast to the amorphous silicon TFT, due to the poor stability of its output current, the brightness of the AMOLED display using the amorphous silicon TFT will deteriorate after a period of operation. Therefore, how to compensate the amorphous silicon TFT so that the AMOLED display using the amorphous silicon TFT has a relatively stable brightness has become a very important issue.

Contents of the invention

One of the objectives of the present invention is to provide a pixel circuit of a display that can output its working current to compensate itself.

The invention provides a pixel circuit of a display, wherein the display has a plurality of scanning lines and data lines, and the pixel circuit of the invention includes a first transistor, a second transistor and a pixel component. Wherein, the gate terminal of the first transistor is coupled to one of the scan lines, the drain terminal thereof is coupled to one of the data lines, and the source terminal of the first transistor is coupled to the gate terminal of the second transistor. In addition, the drain terminal of the second transistor is coupled to a voltage source, and the source terminal of the second transistor is coupled to the pixel element. It is worth mentioning that the pixel circuit of the present invention also includes a current mirror (Current Mirror) module and a switch assembly. The current mirror module has a current input terminal and a current output terminal, wherein the current input terminal is coupled to the source terminal of the second transistor through the pixel component, and is used to copy the current flowing through the pixel component to the current output terminal. The switch component determines whether to output the current output by the current output terminal according to a selection signal, and then performs a compensating action on itself after comparing with a reference current.

In an embodiment of the present invention, the current mirror module includes a third transistor and a fourth transistor. Wherein, the drain terminal of the third transistor is coupled to the current input terminal, and the source terminal of the third transistor is grounded. In addition, the drain terminal of the fourth transistor is coupled to the current output terminal of the current mirror module, the source terminal thereof is also grounded, and the gate terminal thereof is coupled to the gate terminal and the drain terminal of the third transistor.

In addition, the switch component is a switch transistor, its gate terminal receives the selection signal, and its drain terminal is coupled to the drain terminal (current output terminal) of the fourth transistor, so that the switch transistor will determine whether to switch its source terminal to the current output terminal according to the selection signal. and the drain terminal are turned on.

Generally, the source terminal of the first transistor is grounded through a capacitor.

In a preferred situation, the above-mentioned pixel components include organic light emitting diodes. Wherein, the anode terminal of the OLED is coupled to the source terminal of the second transistor, and the cathode terminal of the OLED is coupled to the current input terminal of the current mirror (the drain terminal of the third transistor). In addition, in an embodiment of the present invention, the first transistor and the second transistor are amorphous silicon thin film transistors (a-Si TFT).

In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.

Description of drawings

Figure 1A shows the characteristics of the drain current and gate voltage of an amorphous silicon TFT at different times:

Figures 1B and 1C show comparison diagrams of component characteristics of amorphous silicon TFTs and low-temperature polysilicon TFTs;

FIG. 2A shows a block diagram of an internal circuit of a display device according to a preferred embodiment of the present invention:

FIG. 2B shows a block diagram of an internal circuit of a display device according to another embodiment of the present invention;

Fig. 3 shows an internal circuit diagram of a display pixel unit and a redundant pixel unit according to a preferred embodiment of the present invention;

FIG. 4 shows a block diagram of an internal circuit of a current detection circuit according to a preferred embodiment of the present invention;

FIG. 5 shows a block diagram of an internal circuit of a timing control circuit according to a preferred embodiment of the present invention; and

FIG. 6 shows a flow chart of the steps of a compensation method for a display device according to a preferred embodiment of the present invention;

(Description of main component symbols)

31, 41: Switching transistor 10: Display panel

312: display pixel unit 314: redundant pixel unit.

321: Gate drive circuit 323: Source drive circuit

330: Timing control circuit 332: Drive circuit control unit

334: Image quality compensation unit 336: Interface processing unit

351: Programmable voltage generator

401, 403, 422, 424, 431, 433: transistors

405, 435: pixel components 407, 437: switch components

420: current mirror module 500, 600: current detection circuit

502: Subtractor 504: Current-to-voltage converter

506: Analog-to-digital converter A1: Detection area

D1～Dn: Data lines G0, Gm: Redundant scan lines

G1～Gm-1: scan line I1, I0, Id0, Id0 current

Idiff: difference current IN: current input terminal

OUT: current output terminal Sel_1: selection signal.

T1～Tm-1: switch circuit Vdd: power supply

S701, S703, S705, S707 steps of the compensation method of the display device.

Detailed ways

FIG. 2A shows a block diagram of an internal circuit of a display device according to a preferred embodiment of the present invention. Please refer to FIG. 2A, in the display device provided by the present invention, there is a display panel 310, which is coupled to the gate drive circuit 321 and the source drive circuit respectively by means of scan lines G1-Gm-1 and data lines D1-Dn. 323. In addition, in the present invention, a timing control circuit 330 is also included for controlling the gate driving circuit 321 . and a source driving circuit 323 to drive the display panel 310 to output images. In addition, in the embodiment of the present invention, redundant scan lines are further configured. Due to the limitations of the manufacturing process, the present invention arranges the redundant scan lines on the outermost sides of the scan lines G1 ˜ Gm−1 , that is, the two solid lines marked G0 and Gm shown in FIG. 2A . It is worth mentioning that the present invention also has a programmable voltage generator 351 , which generates a plurality of data voltages according to the control of the timing control circuit 330 and sends them to the display panel 310 through the source driving circuit 323 . Wherein, the aforementioned m and n are both positive integers.

In the display panel 310, the scanning lines G1-Gm-1 and the redundant scanning lines G0 and Gm are arranged parallel to each other in the first direction, while the data lines D1-Dn are parallel to each other in the second direction, and are parallel to the scanning lines G1-Gm-1. Gm-1 and redundant scan lines G0 and Gm are arranged alternately. In general, the first direction and the second direction are substantially perpendicular. In the present invention, display pixel units 312 are arranged at intersections of data lines D1˜Dn and scanning lines G1˜Gm-1, and redundant scanning lines G0 and Gm are arranged at intersections of data lines DI˜Dn and redundant scanning lines G0 and Gm remaining pixel unit 314 .

In addition, in this embodiment, the scan line G1 is coupled to the redundant scan line G0 through the switch circuit T1. The scan line Gm-1 is coupled to the redundant scan line Gm through the switch circuit T2. Whether the switch circuit T1 or T2 is turned on or not is controlled by the timing control circuit 330 .

FIG. 2B shows a block diagram of an internal circuit of a display device according to another embodiment of the present invention. Please refer to FIG. 2B , in another alternative embodiment, each scan line G1 ˜ Gm-1 is coupled to redundant scan lines G0 and Gm through one of the switch circuits T1 ˜ Tm-1 respectively. Among them, we can call the switch circuit closer to the redundant scan line G0 (such as the switch circuit T1) as the first switch group, and the remaining switch circuits closer to the redundant scan line Gm-1 as the second switch group, and in the relatively Preferably, the total number of switches in the first and second switch groups is the same.

In this embodiment, half of the scan lines are connected to the redundant scan line G0 through corresponding switches, and the remaining scan lines are connected to the redundant scan line Gm through corresponding switches. Each switch circuit T1-Tm-1 is determined by the timing control circuit 330 whether it is turned on or not. When the display panel 310 enters a compensation mode, the timing control circuit 330 will control the switch circuits T1-Tm-1 turn on. In this embodiment, the switch circuits T1 ˜ Tm−1 can be respectively implemented by switch transistors 31 . Wherein, the first source/drain terminal of the switching transistor 31 is coupled to the corresponding scanning line, and the second source/drain terminal is coupled to the redundant scanning line (in this embodiment, both G0 and Gm) One of them), and the gate terminal of the switching transistor 31 is coupled to the timing control circuit 330 .

In the present invention, the display pixel unit 312 is a general pixel unit, and the timing control circuit 330 drives these display pixel units 312 by means of controlling the gate driving circuit and the source driving circuit, so that the display panel 310 can output images. In contrast, the redundant pixel unit 314 is not activated when the display panel 310 is in normal operation. When the display panel 310 begins to enter the compensation mode, the timing control circuit 330 will generate a test signal to enable one of the switch circuits, so as to activate the redundant remaining pixel unit 314 .

In another alternative embodiment, each of the switch circuits T1 ˜ Tm−1 can also be coupled to the scan line configured with the redundant pixel unit 314 through a multiplexer.

In addition, in the present invention, each display pixel unit 312 may also be coupled to a current detection circuit (as shown in FIG. 4 ). When the timing control circuit 330 drives one of the switch circuits, the display pixel unit 312 on the scan line coupled thereto will output an operating current to the corresponding current detection circuit. The current detection circuit can compare the working current sent by the corresponding display pixel unit 312 with the working current of the redundant pixel unit 314 coupled to the same data line. The timing control circuit 330 will control the programmable voltage generator 351 according to the comparison result to adjust the level of the data voltage received by each display pixel unit 314, so that the operating current of each display pixel unit 314 remains constant, and then The brightness of the image output by the display panel 310 can be kept constant.

Also due to manufacturing process constraints, the present invention allows multiple display pixel units 312 to share one current detection circuit. Taking FIG. 2B as an example, about half of the number of display pixel units 312 on the same data line can share one current detection circuit. In contrast, in this embodiment, each redundant pixel unit 314 can be used to detect half the number of display pixel units 312 on the same data line.

FIG. 3 shows an internal circuit diagram of a display pixel unit 312 and a redundant pixel unit 314 according to a preferred embodiment of the present invention. Please refer to FIG. 3 , since the structures of each display pixel unit 312 and redundant pixel unit 314 are substantially the same, only the redundant pixel at the intersection of the data line D1 and the redundant scanning line G0 in FIG. 3 will be used below. The unit 314 and the display pixel unit 312 at the intersection with the scanning line G1 are described as examples.

In the display pixel unit 312 at the intersection of the data line D1 and the scan line G1, transistors 401 and 403 are included. Wherein, the gate terminal of the transistor 401 is coupled to the corresponding scan line ( G1 ), and the drain terminal thereof is coupled to the corresponding data line ( D1 ). The source terminal of the transistor 401 is coupled to the gate terminal of the transistor 403 and grounded through the capacitor 43 . In addition, the drain terminal of the transistor 403 is coupled to the power supply Vdd, and the source terminal thereof is coupled to the current input terminal IN of the current mirror module 420 through the pixel element 405 . Since the current mirror module 420 is coupled to the source terminal of the transistor 403 through the pixel element 405 , the current mirror module 420 will copy the current Id1 passing through the pixel element 405 to its current output terminal OUT. The switch component 407 is further coupled to the current output terminal OUT of the current mirror module 420 . The switch component 407 is turned on or not according to the selection signal Sel_1 generated by the timing control circuit 330 shown in FIG. 2A or 2B, for example. In this embodiment, the pixel component 405 includes an organic light emitting diode.

In this embodiment, the transistors 401 and 403 are amorphous silicon thin film transistors (a-Si/FT).

In addition, the current mirror module 420 is mainly composed of transistors 422 and 424 . Wherein, the drain terminal of the transistor 422 is coupled to the current input terminal IN. In other words, the drain terminal of the transistor 422 is the current input terminal IN of the current mirror module 420 . The source terminal of the transistor 4202 is grounded. In addition, the gate terminal of the transistor 424 is coupled to the drain terminal and the gate terminal of the transistor 422 , and the drain terminal and the source terminal of the transistor 424 are respectively coupled to the current output terminal OUT of the current mirror module 420 and ground.

In addition, in a preferred situation, the switch component 407 can also be realized by a switch transistor 41 . In detail, the gate terminal of the switch transistor 41 receives the selection signal Sel_1, and its drain terminal is coupled to the current output terminal OUT of the current mirror module 420, so that the switch transistor 41 can decide whether to turn on its source according to the selection signal Sel_1. terminal and drain terminal.

In the present invention, the circuit structure and the characteristics of the used components of the redundant pixel unit 314 are substantially the same as those of the display pixel unit 312 , so no further description is given here.

Suppose, when the present invention needs to detect and compensate the display pixel unit 312 at the intersection of the data line D1 and the scan line G1, first, the timing control circuit 330 shown in FIG. The electrode driving circuit 321 sends a scan signal to activate the redundant pixel unit 314 on the redundant scan line G0, and simultaneously activates the display pixel unit 312 on the scan line G1. Then the timing control circuit 330 generates the selection signal Sel_1 to simultaneously enable the switch elements 407 and 437 to simultaneously detect the working currents flowing through the pixel elements 405 and 435 .

In the present invention, the key to compensate the display pixel unit 312 is the current flowing through the pixel components inside each display pixel unit 312 . Taking the pixel component 405 as an example, the current flowing through the pixel component 405 is the drain current Id1 of the transistor 403 . As we all know, the drain current Id1 of the transistor 403 can be calculated by the following formula:

Id1＝1/2μC _ox (W/L)(V _gs —V _th ) ²

Among them, μ represents the carrier mobility, C _ox represents the capacitance value of the depletion region of the transistor 403, W/L represents the ratio of the channel width to the length of the transistor 403, V _gs and V _th are the gate-source voltage value and critical voltage value.

After the amorphous silicon thin film transistor 403 works for a period of time, the main key to decrease the drain current Id1 is the critical voltage V _th . That is to say, after the amorphous silicon thin film transistor 403 works for a period of time, the threshold voltage V _th will start to rise, thus causing the drain current Id1 to drop. Therefore, the present invention can synchronously increase the voltage level of the data voltage sent to the transistor 401 according to the rising range of the threshold voltage V _th of the transistor 403, and further increase the gate-source voltage Vss of the transistor 403, so that the transistor 403 The drain current Id1 of 403 remains constant. How to adjust the gate-source voltage V _gs will be described in detail below.

In addition, in this embodiment, the present invention can simultaneously compensate display pixel units on two scanning lines. That is to say, the redundant pixel units 314 coupled to the redundant scan lines G0 and Gm can be used to compensate the display pixel units 312 on the coupled scan lines.

FIG. 4 shows a block diagram of an internal circuit of a current detection circuit according to a preferred embodiment of the present invention. Please refer to FIG. 4. In order to enable those skilled in the art to understand the main spirit of the present invention, only the redundant pixel unit 314 at the intersection of the data line D1 and the redundant scanning line G0 in FIG. The display pixel unit 312 at the G1 intersection is described as an example. The currents I1 and I0 output by the switch circuits 407 and 437 in FIG. 3 are sent to the current detection circuit 500 . In the current detection circuit 500 , the subtractor 502 subtracts the current I1 from the current I0 to obtain the difference current Idiff. Since the currents I0 and I1 are obtained by duplicating the currents Id0 and Id1 flowing through the pixel elements 435 and 405, their magnitudes will be about the same.

Assume that the pixel elements 405 and 435 are organic light emitting diodes, and the transistors 401 , 403 , 431 and 433 are all amorphous silicon thin film transistors. Therefore, when the pixel component 405 works for a period of time, as mentioned above, the threshold voltage of the amorphous silicon thin film transistor 403 will increase, so the current Id1 driving the pixel component 405, that is, the drain current of the transistor 403 will start to drift and become smaller . At this time, for example, the timing control circuit 330 shown in FIG. 2A or 2B starts to activate the redundant pixel 314, because the transistor 433 starts to operate, and the transistors 433 and 403 are the same transistor component, that is to say, the transistors 433 and 403 are different. Component properties are largely the same. Therefore, as long as the drain current Id0 of the transistor 433 is subtracted from the drain current Id1 of the transistor 403, the offset of the drain current Id1 of the transistor 403 after working for a period of time can be known. The device 502 subtracts the current I1 from the current I0.

When the subtractor 502 subtracts the current I1 from the current I0, a difference current Idiff is obtained, which represents the offset of the drain current Id1 of the transistor 403 after working for a period of time. Next, the current-to-voltage converter 504 converts the differential current Idiff into a voltage form and sends it to the analog-to-digital converter 506 . The analog-to-digital converter 506 sends a compensation signal to the timing control circuit 330 according to the output of the current-to-voltage converter 504 .

FIG. 5 shows a block diagram of an internal circuit of a timing control circuit 330 according to a preferred embodiment of the present invention. Please refer to FIG. 5, in the timing control circuit 330, the driving circuit control unit 332 controls the gate driving circuit 321 and the source driving circuit 323 to drive the display panel 310 shown in FIG. 2A or 2B according to a video data and a synchronous signal. , so that it outputs an image. The image quality compensation unit 334 is coupled to the driving circuit control unit 332 and detects the working condition of each display pixel unit 312 through a plurality of current detection circuits 600 . Wherein, the internal structure of each detection circuit 600 may be the same as that of the current detection circuit 500 in FIG. 4 . Therefore, the image quality compensation unit 334 can control the source driving circuit 323 according to the working condition of each display pixel unit 312, and control the programmable voltage generator 351 to output a suitable data voltage to the source driving circuit through the interface processing unit 336. 323, so that the brightness of the image output by the display panel 310 can be kept constant.

FIG. 6 shows a flowchart of steps of a compensation method for a display device according to a preferred embodiment of the present invention. Referring to FIG. 6 , the display device to which the present invention is applied may refer to the display device shown in FIGS. 2A and 2B . In the display device shown in FIGS. 2A and 2B , redundant pixel units 314 are only arranged on the redundant scanning line G0 and the redundant scanning line Gm. Therefore, when it is necessary to detect and compensate the display pixel units 312, it must be performed in batches. Based on the above reasons, we need to divide each display pixel unit into several detection areas (such as the area A1 enclosed by the dotted line in Fig. 2A and 2B ) according to the location of each display pixel unit to perform detection and compensation in batches.

When detecting and compensating the display pixel unit 312 in FIGS. 2A and 2B , firstly, the timing control circuit 330 will make one of the detection areas enter the compensation mode as described in step S701 . In this embodiment, the step of the timing control circuit 330 entering a detection area into the compensation mode firstly inputs a data voltage representing full white data to all display pixel units 312 and detection pixel units 314 in the detection area. Then generate a selection signal (Sel_1 as shown in FIG. 3 ) to the display pixel unit 312 and the detection pixel unit 314 to enable the internal switch components (as shown in FIG. 3 ).

When a detection area enters the compensation mode, as described in step S703, each display pixel unit 312 and detection pixel unit 314 in the detection area will use its internal pixel components (for example, the pixel components 405 and 405 in FIG. 435) is sent to the current detector 500 shown in FIG. 4 for comparison. Next, as described in step S705 , the current detector 500 generates a comparison result and sends it to the pixel compensation unit 334 as shown in FIG. 5 . At this time, the pixel compensation unit 334 will proceed to step S707, and control the programmable voltage generator 351 through the interface processing unit 336 according to the comparison result, and correct the electric voltage of the data voltage output by the display pixel unit 312 in the detection area. flat. By analogy, the timing control circuit 330 detects all display pixel units in the detection area in turn according to the steps in FIG. 6 , and performs compensation according to their operating conditions.

In summary, the present invention has at least the following advantages:

1. Since the pixel circuit provided by the present invention utilizes the current mirror module and the switch component, the current passing through the pixel component inside it can be captured for comparison, so as to properly compensate the transistor inside it.

2. Because the display panel provided by the present invention has redundant pixel units and display pixel units, and the redundant pixel units will not be activated when the display panel of the present invention works normally. Therefore, the present invention regards the operating current of the redundant pixel unit as a reference current to calculate the offset of the operating current of the display pixel unit after working for a period of time, and compensate it according to the offset.

3. The display device provided by the present invention has a programmable voltage generator, so when the image quality compensation unit in the timing control circuit knows the offset of the operating current of each display pixel unit through the current detection circuit , the programmable voltage generator can be controlled to output an appropriate data voltage to compensate the shifted working current of the display pixel unit.

4. In the compensation method of the display device provided by the present invention, the operating current in the pixel unit is compared with the reference current, and the data voltage received by each pixel unit is corrected according to the comparison result. Therefore, the operating current of each pixel unit can be maintained constant.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and amendments without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection should be considered as defined by the appended claims.

Claims (8)

1. A pixel circuit of a display, wherein the display has a plurality of scan lines and a plurality of data lines, and the pixel circuit includes a first transistor, the drain end of which is coupled to one of the plurality of data lines, and the gate end of which is then coupled to one of the plurality of scanning lines; and a second transistor, the gate terminal of which is coupled to the source terminal of the first transistor, and the drain terminal of the second transistor is coupled to a voltage source; characterized in that, Also includes: a pixel component, coupled to the source terminal of the second transistor; A current mirror module has a current input terminal and a current output terminal, wherein the current input terminal is coupled to the source terminal of the second transistor through the pixel component, so as to copy the current flowing through the pixel component to the current output terminal on; and A switch component is used for determining whether to output the current output by the current output terminal according to a selection signal, so as to compare with a reference current. 2. The pixel circuit of a display as claimed in claim 1, wherein the current mirror module comprises: a third transistor, the drain terminal of which is coupled to the current input terminal, and the source terminal of the third transistor is grounded; and A fourth transistor, its drain terminal is coupled to the current output terminal, its source terminal is grounded, and its gate terminal is coupled to the gate terminal and drain terminal of the third transistor. 3. The pixel circuit of a display as claimed in claim 2, wherein the switch component comprises a switch transistor, the gate terminal of which receives the selection signal, and the drain terminal of which is coupled to the drain terminal of the fourth transistor, so that the switch According to the selection signal, the transistor decides whether to turn on its source terminal and drain terminal. 4. The pixel circuit of a display as claimed in claim 1, wherein the switch component comprises a switch transistor, the gate terminal of which receives the selection signal, and the drain terminal of which is coupled to the current output terminal, so that the switch transistor is configured according to the Select the signal to decide whether to turn on its source and drain terminals. 5. The pixel circuit of a display as claimed in claim 1, wherein the source terminal of the first transistor is grounded through a capacitor. 6. The pixel circuit of a display as claimed in claim 1, wherein the pixel element comprises an organic light emitting diode. 7. The pixel circuit of a display as claimed in claim 6, wherein the first and second transistors comprise amorphous silicon thin film transistors. 8. The pixel circuit of a display as claimed in claim 6, wherein an anode terminal of the OLED is coupled to a source terminal of the second transistor, and a cathode terminal of the OLED is coupled to the current input terminal.

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