CN109003575B - Pixel circuit, driving method thereof and display substrate - Google Patents
Pixel circuit, driving method thereof and display substrate Download PDFInfo
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- CN109003575B CN109003575B CN201810949164.7A CN201810949164A CN109003575B CN 109003575 B CN109003575 B CN 109003575B CN 201810949164 A CN201810949164 A CN 201810949164A CN 109003575 B CN109003575 B CN 109003575B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The invention provides a pixel circuit, a driving method thereof and a display substrate, belongs to the technical field of display, and can at least partially solve the problem that two modes of high brightness and high contrast cannot be considered when the pixel circuit of an organic light emitting diode is driven in the prior art. The pixel circuit comprises a first driving transistor, a second driving transistor and an organic light emitting diode; the grid electrode of the first driving transistor is connected with a first data end, the first pole of the first driving transistor is connected with a first power supply end, and the second pole of the first driving transistor is connected with the first pole of the organic light emitting diode; the grid electrode of the second driving transistor is connected with a second data end, the first electrode of the second driving transistor is connected with a second power supply end, and the second electrode of the second driving transistor is connected with the second electrode of the organic light emitting diode.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to a pixel circuit, a driving method of the pixel circuit and a display substrate.
Background
In a pixel circuit of an existing Organic Light Emitting Diode (OLED) display panel, a driving transistor (e.g., a silicon-based driving transistor) is generally used to drive the OLED to emit light. The simplest circuit is understood to be that the driving transistor and the organic light emitting diode are connected in series between the power supply and the ground (taking the anode of the organic light emitting diode is connected with the driving transistor, and the cathode is grounded for example), and the two are equivalent to two resistors, wherein the equivalent resistance of the driving transistor is variable, so that the voltage division of the driving transistor can be changed by adjusting the equivalent resistance of the driving transistor, namely, the anode voltage of the OLED is changed, wherein the resistance of the driving transistor is influenced by the voltage difference of the gate-source voltage difference of the driving transistor.
The brightness of the light emitted by the organic light emitting diode is in a curve relation with the voltage difference between the two poles of the organic light emitting diode. In general, the voltage of the anode of the organic light emitting diode is changed by changing the voltage of the gate of the driving transistor (actually, the voltage difference between the gate and the source), so as to indirectly adjust the voltage difference between the cathode and the anode of the organic light emitting diode (because the cathode of the organic light emitting diode is grounded), that is, adjust the brightness of the organic light emitting diode. However, since the maximum allowable voltage difference between three electrodes of the driving transistor is limited, the adjustment range of the voltage difference between the source and drain electrodes of the driving transistor is limited (i.e., the divided voltage of the driving transistor is limited), and when the power supply voltage is fixed, the variation range of the voltage difference between the cathode and anode electrodes of the organic light emitting diode is limited.
According to the relation curve of the brightness of the OLED and the voltage difference between the anode and the cathode of the OLED, the change intervals of the voltage difference between the anode and the cathode of the OLED are different corresponding to two different modes of high brightness and high contrast. For example, in the high-brightness mode, the voltage difference between the anode and the cathode of the OLED changes within the range of A-B, and in the high-contrast mode, the voltage difference between the anode and the cathode of the OLED changes within the range of C-D. If two display effects of high brightness and high contrast are to be simultaneously satisfied, under the condition that the power supply voltage is fixed, the change amplitude of the voltage difference between the anode and the cathode of the OLED is very large, the change amplitude of the voltage difference between the source and the drain of the driving transistor is also larger, and the risk that the driving transistor is broken down exists. It is therefore readily appreciated that in conventional designs the supply voltages in the two modes are different, which results in an organic light emitting diode pixel circuit being able to be in only one mode.
Disclosure of Invention
The invention at least partially solves the problem that the existing organic light-emitting diode pixel circuit cannot be driven with high brightness and high contrast at the same time, and provides a pixel circuit, a driving method thereof and a display substrate.
According to a first aspect of the present invention, there is provided a pixel circuit comprising a first drive transistor, a second drive transistor, an organic light emitting diode;
the grid electrode of the first driving transistor is connected with a first data end, the first pole of the first driving transistor is connected with a first power supply end, and the second pole of the first driving transistor is connected with the first pole of the organic light emitting diode;
the grid electrode of the second driving transistor is connected with a second data end, the first electrode of the second driving transistor is connected with a second power supply end, and the second electrode of the second driving transistor is connected with the second electrode of the organic light emitting diode.
Optionally, the pixel circuit further comprises a first reset unit and a second reset unit;
the first reset unit is connected with the first pole of the organic light-emitting diode and the first reset signal end and is used for resetting the voltage of the first pole of the organic light-emitting diode under the control of the first reset signal end;
the second reset unit is connected with the second pole of the organic light emitting diode and the second reset signal end and is used for resetting the voltage of the second pole of the organic light emitting diode under the control of the second reset signal end.
Optionally, the first reset unit includes a first reset transistor, and the second reset unit includes a second reset transistor;
the grid electrode of the first reset transistor is connected with a first reset signal end, the first pole of the first reset transistor is connected with an initial voltage providing end, and the second pole of the first reset transistor is connected with the first pole of the organic light emitting diode;
and the grid electrode of the second reset transistor is connected with a second reset signal end, the first pole of the second reset transistor is connected with an initial voltage providing end, and the second pole of the second reset transistor is connected with the second pole of the organic light-emitting diode.
Optionally, the pixel circuit further includes a first switching unit, a first storage unit, a second switching unit, and a second storage unit;
the first pole of the first storage unit is connected with a constant voltage source, and the second pole of the first storage unit is connected with the grid electrode of the first driving transistor;
the first pole of the second storage unit is connected with a constant voltage source, and the second pole of the second storage unit is connected with the grid electrode of the second driving transistor;
the first switch unit is connected with a first grid control signal end and used for controlling the grid electrode of the first driving transistor to be connected with a first data end according to a signal of the first grid control signal end;
the second switch unit is connected with a second gate control signal end and used for controlling the grid electrode of the second driving transistor to be connected with a second data end according to a signal of the second gate control signal end.
Optionally, the first switching unit includes a first switching transistor, a gate of which is connected to a first gate control signal terminal, a first pole of which is connected to the first data terminal, and a second pole of which is connected to the gate of the first driving transistor;
the second switch unit comprises a second switch transistor, the grid electrode of the second switch transistor is connected with a second grid control signal end, the first pole of the second switch transistor is connected with the second data end, and the second pole of the second switch transistor is connected with the grid electrode of the second driving transistor.
Optionally, the pixel circuit further comprises a first light emission control unit and a second light emission control unit;
the first light-emitting control unit is connected with a first light-emitting control signal end and used for controlling the conduction of a first power supply end and a first electrode of the first driving transistor according to a signal of the first light-emitting control signal end;
the second light-emitting control unit is connected with a second light-emitting control signal end and used for controlling the conduction of a second power supply end and the first electrode of the second driving transistor according to the signal of the second light-emitting control signal end.
Optionally, the first light-emitting control unit includes a first light-emitting control transistor, a gate of which is connected to a first light-emitting control signal terminal, a first pole of which is connected to the first power supply, and a second pole of which is connected to the first pole of the first driving transistor;
the second light-emitting control unit comprises a second light-emitting control transistor, the grid electrode of the second light-emitting control transistor is connected with a second light-emitting control signal end, the first pole of the second light-emitting control transistor is connected with the second power supply, and the second pole of the second light-emitting control transistor is connected with the first pole of the second driving transistor.
According to a second aspect of the present invention, there is provided a driving method of a pixel circuit, applied to the pixel circuit provided by the first aspect of the present invention, the driving method comprising:
providing a first voltage to said first power supply terminal and a second voltage to said second power supply terminal;
and in a light emitting stage, a first data voltage is provided to the grid electrode of the first driving transistor, and a second data voltage is provided to the grid electrode of the second driving transistor.
Optionally, the driving method further comprises a reset phase and a charging phase before the light-emitting phase,
in a reset phase, providing an effective voltage to the first reset signal terminal and the second reset signal terminal to reset the voltages of the first pole and the second pole of the organic light emitting diode to initial voltages, and providing an ineffective voltage to the first gate control signal terminal, the second gate control signal terminal, the first light emitting control signal terminal and the second light emitting control signal terminal;
in a charging phase, providing an effective voltage to the first gate control signal terminal and the second gate control signal terminal to connect the gate of the first driving transistor with the first data terminal and connect the gate of the second driving transistor with the second data terminal, providing a first data voltage to the first data terminal, providing a second data voltage to the second data terminal, and providing an ineffective voltage to the first reset signal terminal, the second reset signal terminal, the first light-emitting control signal terminal, and the second light-emitting control signal terminal;
the supplying a first data voltage to the gate electrode of the first driving transistor and a second data voltage to the gate electrode of the second driving transistor in a light emitting phase includes: in a light emitting phase, an effective voltage is provided to the first light emitting control signal terminal to control the first power terminal and the first electrode of the first driving transistor to be conducted, an effective voltage is provided to the second light emitting control signal terminal to control the second power terminal and the first electrode of the second driving transistor to be conducted, and an ineffective voltage is provided to the first reset signal terminal, the second reset signal terminal, the first gate control signal terminal and the second gate control signal terminal.
According to a third aspect of the present invention, there is provided a display substrate comprising a plurality of pixel circuits, the pixel circuits being provided according to the first aspect of the present invention.
Drawings
Fig. 1 is a circuit diagram of a pixel circuit according to an embodiment of the invention;
FIG. 2 is a driving timing diagram corresponding to the circuit diagram shown in FIG. 1;
wherein the reference numerals are: m4, a first drive transistor; m7, a second drive transistor; d1, organic light emitting diode; VdaaA and a first data end; VdaaB and a second data terminal; r1, a first reset unit; r2, a second reset unit; rst1, a first reset signal terminal; rst2, a second reset signal terminal; m3, a first reset transistor; m8, a second reset transistor; gate1, a first Gate control signal terminal; gate1B, a first inverted Gate control signal terminal; gate2, a second Gate control signal terminal; gate2B, a second inverted Gate control signal terminal; sw1, first switching unit; sw2, second switching unit; st1, a first storage unit; st2, a second storage unit; vcom1, first common voltage terminal; vcom2, second common voltage terminal; m1, a first switching transistor; m2, a second switching transistor; m9, a third switching transistor; m10, a fourth switching transistor; l1, a first light emission control unit; l2, a second light emission control unit; EM1, a first light emitting control signal terminal; EM2, second emission control signal terminal; m5, a first light emitting control transistor; m6, a second light emission control transistor; c1, a first storage capacitor; c2, a second storage capacitor; p1, reset phase; p2, charging phase; p3, light emitting stage.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
It is easy to understand that the effective voltage of the gate voltage is high for NMOS transistors and low for PMOS transistors.
Example 1:
the present embodiment provides a pixel circuit, as shown in fig. 1, including a first driving transistor M4, a second driving transistor M7, an organic light emitting diode D1; the gate of the first driving transistor M4 is connected to the first data terminal VdataA, the first terminal thereof is connected to the first power terminal VDD1, and the second terminal thereof is connected to the first terminal of the organic light emitting diode D1; the second driving transistor M7 has a gate connected to the second data terminal VdataB, a first terminal connected to the second power terminal VDD2, and a second terminal connected to the second terminal of the organic light emitting diode D1.
That is, the voltage signal at the first data terminal VdataA controls the conductivity between the first electrode and the second electrode (i.e., the gate-source electrode) of the first driving transistor M4, and the voltage signal at the second data terminal VdataB controls the conductivity between the first electrode and the second electrode (i.e., the gate-source electrode) of the second driving transistor M7, and a path is formed from the first power terminal VDD1 through the first driving transistor M4, the organic light emitting diode D1, the second driving transistor M7, and the second power terminal VDD 2.
The allowable variation range of the source-drain two-pole voltage difference of the first driving transistor M4 and the allowable variation range of the source-drain two-pole voltage difference of the second driving transistor M7 are overlapped to obtain the maximum variation range of the two-pole voltage of the organic light emitting diode D1. In the case where the voltage difference between the first power source terminal VDD1 and the second power source terminal VDD2 is sufficiently large, the adjustable range of the voltage difference between the cathode and anode of the oled D1 is increased. Thus, the display device is beneficial to simultaneously realizing two display modes of high brightness and high contrast.
In the embodiment shown in fig. 1, the first electrode of the organic light emitting diode D1 is the anode thereof, and the second electrode of the organic light emitting diode D1 is the cathode thereof.
Optionally, the pixel circuit further comprises a first reset unit R1 and a second reset unit R2; the first reset unit R1 is connected to the first pole of the organic light emitting diode D1 and the first reset signal terminal Rst1, and is configured to reset the voltage of the first pole of the organic light emitting diode D1 under the control of the first reset signal terminal Rst 1; the second reset unit R2 is connected to the second pole of the organic light emitting diode D1 and the second reset signal terminal Rst2, and is configured to reset the voltage of the second pole of the organic light emitting diode D1 under the control of the second reset signal terminal Rst 2.
That is, the voltage of the first pole of the organic light emitting diode D1 is reset by the first reset unit R1 according to the signal of the first reset signal terminal Rst1, and the voltage of the second pole of the organic light emitting diode D1 is reset by the second reset unit R2 according to the signal of the second reset signal terminal Rst 2.
It should be noted that the timing of the first reset signal terminal Rst1 and the second reset signal terminal Rst2, or the time period during which both are functioning, is generally the same, so that both may be connected ports (in the case that the effective voltages of both are the same), so as to receive the same driving voltage signal from an external driving circuit.
Specifically, as shown in fig. 1, the first reset unit R1 includes a first reset transistor M3, and the second reset unit R2 includes a second reset transistor M8; a gate of the first reset transistor M3 is connected to the first reset signal terminal Rst1, a first pole thereof is connected to the initial voltage supply terminal, and a second pole thereof is connected to the first pole of the organic light emitting diode D1; the second reset transistor M8 has a gate connected to the second reset signal terminal Rst2, a first pole connected to the initial voltage supply terminal, and a second pole connected to the second pole of the organic light emitting diode D1.
The first reset signal terminal Rst1 controls the first reset transistor M3 to be turned on so that the voltage of the initial voltage supply terminal is written into the first pole of the organic light emitting diode D1, and the second reset signal terminal Rst2 controls the second reset transistor M8 to be turned on so that the voltage of the initial voltage supply terminal is written into the second pole of the organic light emitting diode D1.
In the embodiment shown in fig. 1, the initial voltage supply terminals are all first common voltage terminals Vcom 1.
Alternatively, the pixel circuit further includes a first switching unit Sw1, a first storage unit St1, a second switching unit Sw2, and a second storage unit St 2; a first electrode of the first memory cell St1 is connected to a constant voltage source, and a second electrode thereof is connected to the gate of the first driving transistor M4; the first pole of the second memory cell St2 is connected to the constant voltage source, and the second pole is connected to the gate of the second driving transistor M7; the first switching unit Sw1 is connected to the first Gate control signal terminal Gate1 for controlling the Gate of the first driving transistor M4 to be connected to the first data terminal VdataA according to the signal of the first Gate control signal terminal Gate 1; the second switching unit Sw2 is connected to the second Gate control signal terminal Gate2 for controlling the Gate of the second driving transistor M7 to be connected to the second data terminal VdataB according to a signal of the second Gate control signal terminal Gate 2.
That is, the voltage of the gate of the first driving transistor M4 is stored by the first storage unit St1, and the voltage of the gate of the second driving transistor M7 is stored by the second storage unit St 2. Whether the gate of the first driving transistor M4 is connected to the first data terminal VdataA to receive the data voltage is controlled by the first switching unit Sw1, and whether the gate of the second driving transistor M7 is connected to the second data terminal VdataB to receive the data voltage is controlled by the second switching unit Sw 2.
Specifically, as shown in fig. 1, the first storage unit St1 is a first storage capacitor C1, one end of which is connected to a constant voltage source, such as a first common voltage terminal Vcom1 (e.g., 0V), and the second storage unit St2 is a second storage capacitor C2, one end of which is connected to a constant voltage source, such as a second common voltage terminal Vcom2 (e.g., -5V). Of course, the constant voltage sources connected to the two storage capacitors may be the same voltage.
Specifically, as shown in fig. 1, the first switching unit Sw1 includes a first switching transistor M1 having a Gate connected to a first Gate control signal terminal Gate1, a first pole connected to a first data terminal VdataA, and a second pole connected to the Gate of the first driving transistor M4; the second switching unit Sw2 includes a second switching transistor M2 having a Gate connected to the second Gate control signal terminal Gate2, a first pole connected to the second data terminal VdataB, and a second pole connected to the Gate of the second driving transistor M7.
That is, the first Gate control signal terminal Gate1 controls whether the first switching transistor M1 is turned on or not, thereby determining whether the first data terminal VdataA is turned on or not with the Gate of the first driving transistor M4, and the second Gate control signal terminal Gate2 controls whether the second switching transistor M2 is turned on or not, thereby determining whether the second data terminal VdataB is turned on or not with the Gate of the second driving transistor M7.
In the embodiment shown in fig. 1, both the first switching transistor M1 and the first switching transistor M1 are NMOS transistors, and in order to ensure that the voltage is not reduced after passing through the first switching unit Sw1 and the second switching unit Sw2, a third switching transistor M9 (specifically, a PMOS transistor) is further provided corresponding to the first switching transistor M1, and a fourth switching transistor M10 (specifically, a PMOS transistor) is further provided corresponding to the second switching transistor M2. The third switching transistor M9 has two terminals connected to two terminals of the first switching transistor M1, respectively, and a Gate connected to the first inverted Gate control signal terminal Gate 1B. The fourth switching transistor M10 has two terminals respectively connected to two terminals of the second switching transistor M2, and a Gate connected to the second inverted Gate control signal terminal Gate 2B.
In the corresponding drive circuit, the phase of the signal output to the first inverting Gate control signal terminal Gate1B should be opposite to the phase of the signal output to the first Gate control signal terminal Gate1, and the phase of the signal output to the second inverting Gate control signal terminal Gate2B should be opposite to the phase of the signal output to the second Gate control signal terminal Gate 2.
Optionally, the pixel circuit further includes a first light emission control unit L1 and a second light emission control unit L2; the first light-emitting control unit L1 is connected to the first light-emitting control signal terminal EM1, and is configured to control the conduction of the first power terminal and the first pole of the first driving transistor M4 according to the signal of the first light-emitting control signal terminal EM 1; the second light-emission control unit L2 is connected to the second light-emission control signal terminal EM2 for controlling the conduction of the second power source terminal and the first pole of the second driving transistor M7 according to the signal of the second light-emission control signal terminal EM 2.
That is, the first light-emission control unit L1 controls whether the first power source terminal and the first pole of the first driving transistor M4 are turned on according to the signal of the first light-emission control signal terminal EM1, and the second light-emission control unit L2 controls whether the second power source terminal and the first pole of the second driving transistor M7 are turned on according to the signal of the second light-emission control signal terminal EM 2.
Specifically, as shown in fig. 1, the first light emission control unit L1 includes a first light emission control transistor M5 having a gate connected to a first light emission control signal terminal EM1, a first pole connected to a first power source, and a second pole connected to a first pole of a first driving transistor M4; the second light emission control unit L2 includes a second light emission control transistor M6 having a gate connected to the second light emission control signal terminal EM2, a first pole connected to the second power source, and a second pole connected to the first pole of the second driving transistor M7.
That is, whether the first and second emission control transistors M5 and M6 are simultaneously turned on determines whether a line from the first power source terminal to the second power source via the first emission control transistor M5, the first drive transistor M4, the organic light emitting diode D1, the second drive transistor M7, and the second emission control transistor M6 is turned on.
If the first and second emission control transistors M5 and M6 are both NMOS transistors or PMOS transistors (in fig. 1, both are PMOS transistors for example), the corresponding driving circuits should output signals with the same phase to the first and second emission control signal terminals EM1 and EM2, which may be connected. If the first and second emission control transistors M5 and M6 are different types of transistors (e.g., an NMOS transistor and a PMOS transistor), the corresponding driving circuit should output inverted signals to the first and second emission control signal terminals EM1 and EM 2.
It should be understood that fig. 1 is only one specific circuit diagram implementing the inventive concept of the present invention. Those skilled in the art may also modify or increase or decrease a part of the cells for each cell, for example, insert a threshold voltage compensation unit between the first switching cell Sw1 and the first driving transistor M4, compensate for the voltage of the first data terminal VdataA, and the like.
Example 2:
the present embodiment provides a driving method of a pixel circuit, which is applied to the pixel circuit provided in embodiment 1 of the present invention, and the driving method includes: supplying a first voltage to the first power supply terminal and a second voltage to the second power supply terminal; in the light emitting period P3, the first data voltage is supplied to the gate electrode of the first driving transistor M4, and the second data voltage is supplied to the gate electrode of the second driving transistor M7.
As is known from the foregoing analysis, as long as the difference between the first voltage and the second voltage is large enough, the voltage difference between the two terminals of the organic light emitting diode D1 can be increased due to the two driving transistors (the first driving transistor M4 and the second driving transistor M7) controlling the voltages of the two terminals of the organic light emitting diode D1 together, i.e., a high-brightness and high-contrast display mode can be realized.
For the organic light emitting diode display substrate which does not need to be scanned, the display picture can be updated only by updating the data voltage of the first data terminal VdataA and the data voltage of the second data terminal VdataB in real time, and the display picture is the light emitting stage P3 at any time. For the organic light emitting diode D1 display substrate requiring scanning (e.g. progressive scanning), a display period is divided into a light-emitting period P3 and a non-light-emitting period (e.g. a reset period P1 and a charge period P2)
Referring to fig. 1, the following description will be given by taking an example in which the voltage of the first power source terminal VDD1 is 6V, the voltage of the second power source terminal VDD2 is-1V, the common voltage supplied from the first common voltage supply terminal Vcom1 is 0V, and the common voltage supplied from the second common voltage supply terminal Vcom2 is-5V. The voltages labeled after the ports in the timing sequence shown in fig. 2 are specific values of the low voltage and the high voltage corresponding to the ports, and fig. 2 is a timing diagram corresponding to the circuit shown in fig. 1.
Optionally, the driving method further includes a reset phase P1 and a charging phase P2 before the light emission phase P3.
In the reset phase P1, an active voltage is supplied to the first and second reset signal terminals Rst1 and Rst2 to reset the voltages of the first and second poles of the organic light emitting diode D1 to the initial voltages, and an inactive voltage is supplied to the first and second Gate control signal terminals Gate1 and 2, the first and second emission control signal terminals EM1 and EM 2.
At this stage, only the first reset transistor M3 and the second reset transistor M8 are turned on, and the voltage across the organic light emitting diode D1 is reset.
In the charging phase P2, an effective voltage is supplied to the first and second Gate control signal terminals Gate1 and Gate2 to connect the Gate of the first driving transistor M4 with the first data terminal VdataA and the Gate of the second driving transistor M7 with the second data terminal VdataB, a first data voltage is supplied to the first data terminal VdataA, a second data voltage is supplied to the second data terminal VdataB, and an ineffective voltage is supplied to the first reset signal terminal Rst1, the second reset signal terminal Rst2, the first emission control signal terminal EM1, and the second emission control signal terminal EM 2.
At this stage, only the first and second switching transistors M1 and M2 are turned on, and thus the data voltage is written to the non-constant voltage terminals of the first and second storage capacitors C1 and C2.
As a further preferred scheme, as shown in fig. 1, the pixel circuit is further provided with a third switching transistor M9 (the first and second poles of which are respectively connected to the first and second poles of the first switching transistor M1, and the Gate of which is connected to the first inverted Gate control signal terminal Gate1B) and a fourth switching transistor M10 (the first and second poles of which are respectively connected to the first and second poles of the second switching transistor M2, and the Gate of which is connected to the second inverted Gate control signal terminal Gate 2B). It is understood that the phase of the signal of the first inversion Gate control signal terminal Gate1B is opposite to that of the first Gate control signal terminal Gate1, and the phase of the signal of the second inversion Gate control signal terminal Gate2B is opposite to that of the second Gate control signal terminal Gate 2.
That is, at this stage, only the first switching transistor M1, the second switching transistor M2, the third switching transistor M9, and the fourth switching transistor M10 are turned on.
In the light-emitting period P3, an effective voltage is supplied to the first light-emitting control signal terminal EM1 to control the first power terminal VDD1 and the first pole of the first driving transistor M4 to be turned on, an effective voltage is supplied to the second light-emitting control signal terminal EM2 to control the second power terminal VDD2 and the first pole of the second driving transistor M7 to be turned on, and an ineffective voltage is supplied to the first reset signal terminal Rst1, the second reset signal terminal Rst2, the first Gate control signal terminal Gate1 and the second Gate control signal terminal Gate 2.
At this stage, only the first light emission controlling transistor M5, the first driving transistor M4, the organic light emitting diode D1, the second driving transistor M7, and the second light emission controlling transistor M6 are turned on, and the organic light emitting diode D1 emits light.
In theory, as long as the voltage of the first power terminal VDD1 and the voltage of the second power terminal VDD2 are determined and the parameters of each transistor and the organic light emitting diode D1 are determined, when the voltages supplied to the first data terminal VdataA and the second data terminal VdataB are determined, the voltage difference across the organic light emitting diode D1 is determined and the brightness of the light emitted therefrom is determined. In engineering, generally, through an experimental method, voltages of the first data terminal VdataA and the second data terminal VdataB are adjusted, brightness of a sub-pixel (or a display substrate, a display panel, or the like formed by the sub-pixel) formed by the pixel line is measured, when the brightness meets a brightness requirement of a certain gray scale in a gamma curve, the current first data voltage and second data voltage are recorded as a combination of driving voltages corresponding to the gray scale, and the process is repeated until a combination of the first data voltage and the second data voltage corresponding to all the gray scales is found.
Example 3:
the present embodiment provides a display substrate including a plurality of pixel circuits, the pixel circuits being the pixel circuits provided according to embodiment 1.
That is, the pixel circuit provided in embodiment 1 is disposed in the display substrate, and provides corresponding data lines for each data terminal, so as to receive an external driving voltage.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (9)
1. A pixel circuit is characterized by comprising a first driving transistor, a second driving transistor and an organic light emitting diode;
the grid electrode of the first driving transistor is connected with a first data end, the first pole of the first driving transistor is connected with a first power supply end, and the second pole of the first driving transistor is connected with the first pole of the organic light emitting diode;
the grid electrode of the second driving transistor is connected with a second data end, the first electrode of the second driving transistor is connected with a second power supply end, and the second electrode of the second driving transistor is connected with the second electrode of the organic light emitting diode;
the pixel circuit further comprises a first reset unit and a second reset unit;
the first reset unit is connected with the first pole of the organic light-emitting diode and the first reset signal end and is used for resetting the voltage of the first pole of the organic light-emitting diode under the control of the first reset signal end;
the second reset unit is connected with the second pole of the organic light emitting diode and the second reset signal end and is used for resetting the voltage of the second pole of the organic light emitting diode under the control of the second reset signal end.
2. The pixel circuit according to claim 1, wherein the first reset unit includes a first reset transistor, and the second reset unit includes a second reset transistor;
the grid electrode of the first reset transistor is connected with a first reset signal end, the first pole of the first reset transistor is connected with an initial voltage providing end, and the second pole of the first reset transistor is connected with the first pole of the organic light emitting diode;
and the grid electrode of the second reset transistor is connected with a second reset signal end, the first pole of the second reset transistor is connected with an initial voltage providing end, and the second pole of the second reset transistor is connected with the second pole of the organic light-emitting diode.
3. The pixel circuit according to claim 2,
the pixel circuit further comprises a first switch unit, a first storage unit, a second switch unit and a second storage unit;
the first electrode of the first storage unit is connected with a first constant voltage source, and the second electrode of the first storage unit is connected with the grid electrode of the first driving transistor;
the first pole of the second storage unit is connected with a second constant voltage source, and the second pole of the second storage unit is connected with the grid electrode of the second driving transistor;
the first switch unit is connected with a first grid control signal end and used for controlling the grid electrode of the first driving transistor to be connected with a first data end according to a signal of the first grid control signal end;
the second switch unit is connected with a second gate control signal end and used for controlling the grid electrode of the second driving transistor to be connected with a second data end according to a signal of the second gate control signal end.
4. The pixel circuit according to claim 3, wherein the first switching unit comprises a first switching transistor having a gate connected to a first gate control signal terminal, a first pole connected to the first data terminal, and a second pole connected to the gate of the first driving transistor;
the second switch unit comprises a second switch transistor, the grid electrode of the second switch transistor is connected with a second grid control signal end, the first pole of the second switch transistor is connected with the second data end, and the second pole of the second switch transistor is connected with the grid electrode of the second driving transistor.
5. The pixel circuit according to claim 4,
the pixel circuit further comprises a first light-emitting control unit and a second light-emitting control unit;
the first light-emitting control unit is connected with a first light-emitting control signal end and used for controlling the conduction of a first power supply end and a first electrode of the first driving transistor according to a signal of the first light-emitting control signal end;
the second light-emitting control unit is connected with a second light-emitting control signal end and used for controlling the conduction of a second power supply end and the first electrode of the second driving transistor according to the signal of the second light-emitting control signal end.
6. The pixel circuit of claim 5,
the first light-emitting control unit comprises a first light-emitting control transistor, the grid of the first light-emitting control transistor is connected with a first light-emitting control signal end, the first pole of the first light-emitting control transistor is connected with the first power supply end, and the second pole of the first light-emitting control transistor is connected with the first pole of the first driving transistor;
the second light-emitting control unit comprises a second light-emitting control transistor, the grid of the second light-emitting control transistor is connected with a second light-emitting control signal end, the first pole of the second light-emitting control transistor is connected with the second power supply end, and the second pole of the second light-emitting control transistor is connected with the first pole of the second driving transistor.
7. A driving method of a pixel circuit, applied to the pixel circuit according to any one of claims 1 to 6, the driving method comprising:
providing a first voltage to said first power supply terminal and a second voltage to said second power supply terminal;
and in a light emitting stage, a first data voltage is provided to the grid electrode of the first driving transistor, and a second data voltage is provided to the grid electrode of the second driving transistor.
8. The driving method according to claim 7, wherein the pixel circuit is a pixel circuit according to claim 6, the driving method further comprising a reset phase and a charge phase before the light-emitting phase,
in a reset phase, providing an effective voltage to the first reset signal terminal and the second reset signal terminal to reset the voltages of the first pole and the second pole of the organic light emitting diode to initial voltages, and providing an ineffective voltage to the first gate control signal terminal, the second gate control signal terminal, the first light emitting control signal terminal and the second light emitting control signal terminal;
in a charging phase, providing an effective voltage to the first gate control signal terminal and the second gate control signal terminal to connect the gate of the first driving transistor with the first data terminal and connect the gate of the second driving transistor with the second data terminal, providing a first data voltage to the first data terminal, providing a second data voltage to the second data terminal, and providing an ineffective voltage to the first reset signal terminal, the second reset signal terminal, the first light-emitting control signal terminal, and the second light-emitting control signal terminal;
the supplying a first data voltage to the gate electrode of the first driving transistor and a second data voltage to the gate electrode of the second driving transistor in a light emitting phase includes: in a light emitting phase, an effective voltage is provided to the first light emitting control signal terminal to control the first power terminal and the first electrode of the first driving transistor to be conducted, an effective voltage is provided to the second light emitting control signal terminal to control the second power terminal and the first electrode of the second driving transistor to be conducted, and an ineffective voltage is provided to the first reset signal terminal, the second reset signal terminal, the first gate control signal terminal and the second gate control signal terminal.
9. A display substrate comprising a plurality of pixel circuits, wherein the pixel circuits are according to any one of claims 1-6.
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