DE1040133B - Process for the production of surface rectifiers with a semiconductor from a two-component compound - Google Patents

Process for the production of surface rectifiers with a semiconductor from a two-component compound

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Publication number
DE1040133B
DE1040133B DES44132A DES0044132A DE1040133B DE 1040133 B DE1040133 B DE 1040133B DE S44132 A DES44132 A DE S44132A DE S0044132 A DES0044132 A DE S0044132A DE 1040133 B DE1040133 B DE 1040133B
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Germany
Prior art keywords
group
layers
semiconducting
semiconductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DES44132A
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German (de)
Inventor
Dipl-Ing Erich Waldkoetter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
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Siemens Corp
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Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Priority to DES44132A priority Critical patent/DE1040133B/en
Publication of DE1040133B publication Critical patent/DE1040133B/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/854Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs further characterised by the dopants
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B1/00Single-crystal growth directly from the solid state
    • C30B1/10Single-crystal growth directly from the solid state by solid state reactions or multi-phase diffusion
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/46Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/479Application of electric currents or fields, e.g. for electroforming
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/86Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group II-VI materials, e.g. ZnO
    • H10D62/864Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group II-VI materials, e.g. ZnO further characterised by the dopants

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Description

Verfahren zur Herstellung von Flächengleichrichtern mit einem Halbleiter aus einer Zweistoff -Verbindung Es sind Flächengleichrichter mit Halbleitern, wie z. B. Germanium oder Silizium, bekanntgeworden, bei denen der Halbleiterkörper als Einkristall ausgebil-(Jet ist und eine p-n-Übergangsschicht (Inversionsschicht) enthält. Diese Einkristalle sind verhältnismäßig schwierig herzustellen und in ihrer flächenhaften Ausdehnung bereits aus mechanischen Gründen begrenzt.Process for the production of surface rectifiers with a semiconductor from a two-substance compound There are surface rectifiers with semiconductors, such as. B. germanium or silicon, in which the semiconductor body is designed as a single crystal (jet and contains a pn transition layer (inversion layer). These single crystals are relatively difficult to manufacture and limited in their areal expansion for mechanical reasons.

Gegenstand der vorliegenden Erfindung ist ein Verfahren zur Herstellung von Flächengleichrichtern mit einem Halbleiter aus einer Zweistofi-Verbindung. Die Komponenten der hierbei verwendeten Zweistofi-Verbindungen sind Elemente verschiedener Gruppen, des Periodischen Systems, wie z. B. der III. und V. bzw. cler II. und VI ' Gruppe. Bei diesen Flächengleichrichtern werden die Mängel der bekannten Anordnung vermieden, indem die Bildung des zwischen den bei-Z, den Elektroden lie-enden halbleitenden Körpers in 2n Form einer Reaktionszwischenschicht mit einer eingelagerten Inversionsselticht unmittelbar in den Herstellun,-prozeß des Flächen-leichr;chten# hine;n verlegt wird.The present invention relates to a method for producing surface rectifiers with a semiconductor from a two-component compound. The components of the two-component compounds used here are elements from different groups of the periodic table, such as B. the III. and V. or the II. and VI ' groups. With these surface rectifiers, the shortcomings of the known arrangement are avoided in that the formation of the semiconducting body in the form of an intermediate reaction layer with an embedded inversion surface between the two electrodes is directly in the manufacturing process of the surface rectifier # is relocated.

Erfindungsgenuiß werden hierzu zwei Schichten aus Elementen verschiedener Gruppen des Periodischen Systems nacheinander und aufeinander an einem gemeinsamen Träger aufgebracht bei gleichzeitiger Anwendung je eines Zusatzes solchen Charakters in jeder der beiden Schichten, daß nach der Bildung einer hall)-leitenden Reaktionszwischenschicht ans den Elementen der beiden Schichten durch einen thermischen Behandlungsprozeß der eine Zusatz in der halbleitenden Reaktionszwischenschicht p-Störstellen und der andere Zusatz gleichzeitig n-Störstellen für die Erzeugung eines 1)-n-Überganges innerhalb der halbleitend,-ii -keaktionszwischenschicht bildet. Auf die erste Schicht wird dann eine zweite Schicht aufgebracht oder auf cl;eser erzeugt aus einem Grundwerkstoff eines chein;--chen Element,- einer anderen Gruppe des Periodischen Svstenis mit einem Zusatz solcher Art und solcher 21 Men-e. daß er in einer später aus und zwischen den be;den Schichten zu bildenden balbleitenden Reaktionszwischenschicht in der Lage ist, entsprechend ii-Störstellen oder p-Störstellen zu bilden. Bedingung ist also. daß die beiden in den verschiedenen Schichten benutzten Zusatzstoffe Störstellen entgegengesetzter Polarität bilden. Für die Verwirklichung der Erfindung wird z. B. in folgender NVeise vorgegangen: Es wird ein Trägerkörper benutzt. Auf diesem wird eine Schicht aus einem Element der Gruppe 1111), z. B. Indium, aufgebracht. Dieser Indiumgrundwerkstoff ist mit einem Zusatz von Cadmiurn versehen. Nunmehr wird auf diese erste Schicht als zweite Schicht ellie solche mit einem GrundwerkStoff in Form eines Elernentes der Gruppe V, des Periodischen Svsterns, z. B. Antimon, aufgebracht. Dieser Grundwerkstoff ist beispielsweise mit einem Zusatz von Selen versehen. -Nachdem die beiden Schichten zusanirnengebracht sind, was durch einen geeigneten Prozeß erfolgen kann, z. B. durch Aufdampfen, wird die Anordnung einem thermischen Behandlungsprozeß unterworfen, so daß sich aus den beiden Grundwerkstoffen eine Reaktionszwischenschicht bildet, in dem Falle nach den beispielsweise angeführten Stoffen also Indium-Antimonid. Bei der Teinperaturbehandlung wird darauf geachtet, daß die Bildung der Zwischenschicht so vor sich geht, daß vorzugsweise Kristalle gebildet werden, deren Korngrenzen senkrecht zur Schichtfläche verlaufen, so daß eine Vielzahl von mit ihren Achsen in gleicher Richtung liegenden Einkristallen zwischen den ursprünglichen Werkstoffen entsteht. Durch die gleichzeiti-e Beigabe der Zusätze zu den Grundwerkstofien der beiden Schichten werden die so entstehenden Kristalle von dem einen Ende aus unmittelbar mit p- bzw. ii-Störstellen und von dem anderen Ende aus mit n- bzw. p-Störstellen dotiert. Hierdurch entsteht z. B. im Falle einer Reaktionszwischenschicht in der Stärke nur einer Kristallage im Innern eines jeden einzelnen Kristalls unmittelbar eine Inversionsschicht. Es kann durch den Behandlungsprozeß dafür gesorgt werden, daß die Inversionsschichten, die in den einzelnen Kristallen gebildet werden. an den Korngrenzen der Kristalle zusammenstoßen und eine durchgehende Inversionsschicht quer' zur Verbindungslinie der E-lektroden entsteht. läßt sich durch entsprechende Wahl von Temperatur und Zeitdauer bei der Temperung erreichen, die zur Bildung der Reaktionszwischenschicht angewendet wird.According to the invention, two layers of elements from different groups of the periodic system are applied one after the other to a common carrier with simultaneous use of an additive of such character in each of the two layers that after the formation of a hall) -conducting intermediate reaction layer on the elements of the two layers by a thermal treatment process which forms one additive in the semiconducting reaction intermediate layer and the other additive at the same time forms n-type impurities for the production of a 1) -n junction within the semiconducting, -ii reaction intermediate layer. A second layer is then applied to the first layer or it is produced from a base material of a chein; - chen element, - another group of the Periodic Svstenis with an addition of this kind and such 21 men-e. that it is capable of forming corresponding ii-impurities or p-impurities in a bal-conducting intermediate reaction layer to be formed later from and between the two layers. So a condition is. that the two additives used in the different layers form imperfections of opposite polarity. For the implementation of the invention, for. B. proceed as follows: A carrier body is used. A layer of an element from group III 1), e.g. B. indium applied. This indium base material is provided with an addition of cadmium. Now on this first layer as the second layer ellie those with a base material in the form of an element of group V, the periodic system, z. B. antimony applied. This base material is provided with an addition of selenium, for example. -After the two layers are brought together, which can be done by a suitable process, e.g. B. by vapor deposition, the arrangement is subjected to a thermal treatment process, so that an intermediate reaction layer is formed from the two base materials, in the case of the substances listed for example indium antimonide. During the temperature treatment, care is taken to ensure that the intermediate layer is formed in such a way that crystals are preferably formed, the grain boundaries of which are perpendicular to the surface of the layer, so that a large number of single crystals with their axes in the same direction arise between the original materials. By adding the additives to the base materials of the two layers at the same time, the resulting crystals are doped directly with p- or ii-impurities from one end and with n- or p-impurities from the other end. This creates z. B. in the case of an intermediate reaction layer in the thickness of only one crystalline layer in the interior of each individual crystal directly an inversion layer. The treatment process can ensure that the inversion layers that are formed in the individual crystals. collide at the grain boundaries of the crystals and a continuous inversion layer is created across the connecting line of the electrodes. D « can be achieved by an appropriate choice of temperature and duration of heat treatment which is used to form the intermediate reaction layer.

Das Aufbringen der einzelnen Schichten kann nach verschiedenen., jeweils geeigneten Verfahren erfolgen, z. B. durch Aufstreichen, Aufspritzen, Aufdampfen oder durch ein elektrolytisches oder elektrostatisches Niederschlagsverfabren. Es kann hei diesen Schichten auch von bereits festen Körpern ausgegangen werden, welche aufeinandergebracht werden. z. B. in Form von folienartigen Körpern, welche dann mit entsprechendem Druck und entsprechender Wärme zu einem plattierten, Svstem vereinigt werden.The application of the individual layers can be done according to different., Respectively appropriate procedures take place, e.g. B. by brushing on, spraying on, vapor deposition or by an electrolytic or electrostatic deposition process. It one can also start from solid bodies in these layers, which are brought together. z. B. in the form of film-like bodies, which then combined with appropriate pressure and appropriate heat to form a plated system will.

Claims (2)

PATENTANSPROCHE 1. Verfahren zur Herstellung von Flächengleichrichtern mit einem Halbleiter aus einer Zweistoff-Verbindung, dadurch gekennzeichnet, daß zwei Schichten aus Elementen verschiedener Gruppen des Periodischen Systems nacheinander und aufeinander an einem gemeinsamen Träger aufgebracht werden bei gleichzeitiger Anwendung je eines Zusatzes solchen Charakters in jeder der beiden Schichten, daß nach der Bildung einer halbleitenden Reaktionszwischenschicht aus den Elementen der beiden Schicht-en durch einen thertnischen Behandlungsprozeß der eine Zusatz in der halbleitenden Reaktionszwischenschicht p-Störstellen und der andere Zusatz gleichzeitiz# n-Störstellen für die Erzeuguillg eine,; 1)-n-Merganges innerhalb der halbleitenden Reaktion,#zwiSchenschicht bildet. PATENT CLAIM 1. A method for producing surface rectifiers with a semiconductor from a two-component compound, characterized in that two layers of elements from different groups of the periodic system are applied one after the other to a common carrier with simultaneous use of an addition of such character in each of the two layers that after the formation of a semiconducting reaction intermediate layer from the elements of the two layers by a thermal treatment process, one additive in the semiconducting reaction interlayer has p-type impurities and the other additive simultaneously produces n-type impurities; 1) -n-merganges within the semiconducting reaction, # forms an intermediate layer. 2. Verfahren nach Anspruch 1, dadurch gekeinizeichnet, daß das eine Element aus der Gruppe 111. das andere Element aus der Gruppe V des Perio(11-schen Systenis gewählt wird. 3. Verfahren nach Anspruch 1. dadurch gekünnzeichnet. (laß das eine 1---lenie.rit aus der Gruppe 11, das andere Element atis der Gruppe VI des Periodischen Systems gewählt wird. 4. Verfaiiren nach Anspruch 2, dadurch gekennzeichnet, daß als Element der III. Gruppe des Periodischen Systems Aluminium mit einem Zusatz von Cadmium und als Element der V. Gruppe des Periodischen Systems Antimon mit einem Zusatz von Selen verwendet wird. In Betracht gezogene Druckschriften: Deutsche Patentschriften Nr. 883 784, 892 328; Phys.-Rev., Bd. 95, 1954, Nr.3, S. 841 bis 843; Zeitschrift für Elektrochemie, Bd. 58, 1954, Nr. 5, S. 283 bis 321. 2. The method according to claim 1, characterized in that one element is selected from group 111. the other element is selected from group V of the Perio (11-systenis. 3. Method according to claim 1 1 --- lenie.rit is selected from group 11, the other element atis from group VI of the periodic table 4. Method according to claim 2, characterized in that as element of group III of the periodic table aluminum with an addition of cadmium and antimony of the periodic system is used with an addition of Se as an element of group V contemplated publications: German patents # 883 784, 892 328; Phys Rev, Vol 95, 1954, No.3.... , Pp. 841 to 843; Zeitschrift für Elektrochemie, Vol. 58, 1954, No. 5, pp. 283 to 321.
DES44132A 1955-05-27 1955-05-27 Process for the production of surface rectifiers with a semiconductor from a two-component compound Pending DE1040133B (en)

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DES44132A DE1040133B (en) 1955-05-27 1955-05-27 Process for the production of surface rectifiers with a semiconductor from a two-component compound

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1271838B (en) * 1959-01-12 1968-07-04 Siemens Ag Method for doping semiconductor bodies

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE883784C (en) * 1949-04-06 1953-06-03 Sueddeutsche App Fabrik G M B Process for the production of surface rectifiers and crystal amplifier layers from elements
DE892328C (en) * 1951-09-17 1953-10-05 Licentia Gmbh Process for alloying metallic or semiconducting surfaces

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE883784C (en) * 1949-04-06 1953-06-03 Sueddeutsche App Fabrik G M B Process for the production of surface rectifiers and crystal amplifier layers from elements
DE892328C (en) * 1951-09-17 1953-10-05 Licentia Gmbh Process for alloying metallic or semiconducting surfaces

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1271838B (en) * 1959-01-12 1968-07-04 Siemens Ag Method for doping semiconductor bodies

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