JP3154147B2 - 90-degree phase shift circuit and quadrature modulation circuit using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a 90.degree. Phase shift circuit and a quadrature modulation circuit using the same, and more particularly to a 90.degree. Phase shift circuit suitable for use in a 4-phase analog PSK (phase shift keying) modulation circuit. And a quadrature modulation circuit using the same.

[0002]

2. Description of the Related Art FIG. 5 shows a conventional example of a quadrature modulation circuit. In FIG. 5, the frequency of a carrier pulse is doubled by a squaring circuit 51, and a harmonic component is cut by a band-pass filter (BPF) 52, and then the two flip-flops (FF) 53 and 54 are turned on. Supplied. One flip-flop 53 is triggered by the rising edge of the input pulse, and the other flip-flop 54 is triggered by the falling edge of the input pulse.

As a result, flip-flops 53, 54
As shown in FIG. 6, 1 / of the input pulse C
Two carrier pulses Q, having the same frequency as the original carrier pulse and having a phase difference of 90 degrees from each other.
Q 'is derived. The two carrier pulses Q, Q 'are mixed with the modulation signals A, B in mixers 55, 56. Each output of the mixers 55 and 56 is added by an adder 57 and is derived as a modulation output.

[0004]

However, in the above-described conventional quadrature modulation circuit, after the frequency of the carrier pulse is multiplied, two flip-flops 53 and 54 are used to digitally provide a phase difference of 90 degrees. Since the configuration is such that two carrier pulses Q and Q 'are generated, there is a problem that the number of circuit elements is large and as a result, power consumption is large. Since this quadrature modulation circuit is used, for example, in a cellular phone for mobile communication called digital cellular, its large power consumption has hindered a long battery life.

When the squaring circuit 41 is configured using, for example, a multiplier, digital switching is performed, so that harmonics are generated. Therefore, malfunction of the flip-flops 53 and 54 due to the harmonics is prevented. To do so, it was essential to insert a filter 42 after the squaring circuit 41.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and provides a 90-degree phase shift circuit capable of forming a circuit with a small number of elements and reducing power consumption, and a quadrature modulation circuit using the same. The purpose is to provide.

[0007]

SUMMARY OF THE INVENTION In a 90 degree phase shift circuit according to the present invention, an RC series connection comprising at least two first and second resistors and a capacitor connected in series and having a carrier applied to both ends. A first differential amplifier for detecting a voltage between both ends of the first and second resistors, and a third differential amplifier for detecting a voltage between both ends of the capacitor; The composite signal of each output signal of the differential amplifier and the output signal of the third differential amplifier are derived as two carrier signals having a phase difference of 90 degrees.

Further, in the quadrature modulation circuit according to the present invention, a quadrature modulation circuit using the 90-degree phase shift circuit having the above configuration, wherein one of the two carrier signals from the 90-degree phase shift circuit and the first A first mixer for mixing the modulated signal and a second mixer for mixing the other of the two signals and a second modulated signal;
, And each output signal of the first and second mixers is added to derive a modulation output.

[0009]

A carrier wave is applied to both ends of a series connection circuit comprising at least two first and second resistors and a capacitor, and the voltage between both ends of these elements is detected by a differential amplifier. The combined signal and the output signal of the capacitor-side differential amplifier are derived as two carrier signals having a phase difference of 90 degrees. According to this, the effect of the parasitic element due to the resistance can be reduced when the resistance is divided as compared with the case where the resistance is one, so that two carrier signals having a good phase balance can be obtained. In addition, since the quadrature modulation circuit is configured using the CR phase shift circuit, the DC balance is good, the quadrature modulation can be performed stably even at a high frequency, and the circuit can be configured with a small number of elements, so that power consumption can be reduced. .

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a circuit diagram showing one embodiment of a 90-degree phase shift circuit according to the present invention. In FIG. 1, the power supply (Vc
c) Between the line L and the ground, emitter follower transistors Q ₁₁ and Q ₁₂ are connected via current sources I ₁ and I ₂ . The bases of these transistors Q ₁₁ and Q ₁₂ are biased by DC power supply E ₁ via resistors R ₁₁ and R ₁₂ , and a carrier wave e ₀ is applied between the bases. A CR series current path 1 including a resistor R ₁ , a capacitor C, and a resistor R ₂ connected in series is connected between the emitters of the transistors Q ₁₁ and Q ₁₂ . Note that the number of resistors in the CR series current path 1 is not limited to two.

In the CR series current path 1, the resistance R ₁
One end, the other end of the resistor R ₁ (one end of the capacitor C), the other end of the capacitor C (end of the resistor R _2), the other end of the resistor R _2, the bases of the transistors Q ₂₁ to Q ₂₄ of the emitter follower Is connected. These transistor Q ₂₁ ~Q ₂₄
Is without an action as the buffer, the collector is connected to the power line L, and each emitter current source I ₃ ~I ₆
Grounded. For convenience of explanation, the transistors Q ₂₁ to Q ₂₄ only illustrates the equivalent emitter resistance r _e.

The emitters of the transistors Q ₂₁ and Q _{22 have} the bases of the differential transistor pair Q ₁ and Q ₂ , respectively, and the emitters of the transistors Q ₂₂ and Q ₂₃ have the differential transistor pair Q
_3, the bases of Q ₄ is, each base of the transistors Q _23, a differential transistor pair Q ₅ in each emitter of Q _24, Q ₆ are respectively connected. Differential transistor pair Q ₁ , Q
_2, the emitters are connected together via a resistor r _1, r _2, resistors r _1, together with the current source I ₇ to a common connection point that is connected between the ground of r _2, the voltage across the resistor R ₁ e _R1 Is constituted.

Similarly, a differential transistor pair Q ₃ , Q
₄ has its emitter connected in common through a resistor r _3, r _4, together with the current source I ₈ which is connected between the common connection point and the ground resistor r _3, r _4, the voltage across e _C of the capacitor C The differential amplifier 3 for detection is configured. In the differential transistor pair Q ₅ and Q ₆ , the emitters are resistors r ₅ and r ₆
Are commonly connected through a together with the current source I ₉ connected between the common connection point and the ground resistor r _5, r _6, constitutes a differential amplifier 4 detects the voltage across e _R2 of the resistor R ₂ .

The collectors of the differential transistors Q ₁ and Q ₅ are commonly connected to each other, and a drive current i ₁ is drawn in from a mixer 13 (see FIG. 3) to be described later via an output terminal 5. Similarly, the differential transistors Q ₂ and Q ₆ have their collectors commonly connected to each other, and sink the drive current i ₂ from the mixer 13 via the output terminal 6. On the other hand, the differential transistor pair Q ₃ and Q ₄ are connected to a mixer 16 (FIG.
) Via output terminals 7 and 8 to drive current i ₃ ,
inhale i _4, respectively.

In the above configuration, when the carrier wave e ₀ is applied and the current flows through the CR series current path 1, the voltage e is applied to both ends of the resistor R ₁ , the resistor R ₂ and the capacitor C.
_R1, e _R2, e _C is generated. These voltages e _R1 , e _R2 , e
_C is

(Equation 1)

(Equation 2)

(Equation 3) Becomes

The drive currents i ₁ and i ₃ are:

(Equation 4)

(Equation 5) Becomes Here, if the resistance values of the resistors R ₁ and R ₂ are set to be equal and R ₁ + R ₂ = 1 / ωC, e _R1 + e _R2 ≒ e
_C is obtained, and the drive currents i ₁ and i ₃ have a phase difference of 90 degrees from each other and are derived as currents of the same magnitude.

As described above, the resistor R ₁ and the capacitor C
And the signal e at both ends of the CR series current path 1 including a resistor R _2
0 , the emitter follower transistor Q ₂₁ connected to both ends of the resistor R ₁ , the capacitor C and the resistor R _2.
ＱQ ₂₄ , the voltages e _R1 , e _C , and e _R2 are detected by the differential amplifiers 2, 3, and 4, and the output signals of the differential amplifiers 2, 4 are combined, so that the buffer (Q ₂₁ ~
In Q ₂₄ ), the influence of the impedance of the differential amplifiers 2 to 4 can be minimized, and the effect of the parasitic element due to the resistance can be reduced by dividing the resistance as compared with the case of one resistance. Drive current i ₁ , i with good phase balance
₂ / i ₃ and i ₄ can be derived.

However, since the frequency handled by this circuit is a harmonic of, for example, about 800 MHz, the buffer (Q
₂₁ to Q ₂₄₎ only by completely eliminating the influence of the parasitic elements is difficult. Therefore, as shown by the broken line in FIG.
The emitters of the transistors Q ₂₁ and Q ₂₄ connected to both ends of the series current path 1 (both ends of the resistors R ₁ and R ₂ connected in series) or the transistors Q ₂₂ and Q ₂₃ connected to both ends of the capacitor C each emitter connecting a capacitor C _a or C _B.

[0019] Thus, the emitters of the transistors Q _21, Q _24, or to the emitters of the transistors Q _22, Q ₂₃ by connecting the capacitor C _A or C _B, a equivalent of the transistor Q ₂₁ to Q ₂₄ filter is formed by the emitter resistor r _e and capacitors C _a and C _B, as shown in FIG. 2, it is possible to delay one of the phases of the two carrier signals having a phase difference of relative 90 °, the It is possible to stably correct a phase error caused by a parasitic element.

[0020] In the phase correction circuit according to the emitter resistor r _e and capacitors C _A and C _B, can not be corrected only in the direction of delaying the phase, as shown in FIG. 3, by connecting the capacitor C _A, Voltage (e _R1 +
e _R2 ), the phase of the carrier signal is delayed, so that the phase difference can be corrected in a direction in which the phase difference increases. Also, by connecting the capacitor C _B, delays the phase of the carrier signal based on the voltage e _C, it phase correction in a direction in which the phase difference is reduced.

[0021] Thus, by connecting the capacitor C _A or C _B, the relative phase difference between the two carrier signals would perform the phase adjustment within a range of ± a few degrees so that 90 degrees. Incidentally, FIG. 2 shows a case where the capacitor C _A, as C _B, used was a capacity of 1 pF. Further, in this embodiment, the emitters of the transistors Q _21, Q _24, or transistor Q _22, has been to connect the capacitor to the emitters of Q _23, by connecting the series connection circuit of a capacitor and a resistor, the phase Can be fine-tuned.

FIG. 4 is a circuit diagram showing an embodiment of the quadrature modulation circuit according to the present invention using the 90-degree phase shift circuit having the above configuration. In FIG. 4, a multiplier 11 comprising a differential transistor pair Q ₃₁ and Q ₃₂ and a differential transistor pair Q ₃₃ and Q _34.
And a differential amplifier 1 comprising differential transistor pairs Q ₃₅ and Q ₃₆ whose emitters are commonly connected via resistors r ₁₁ and r _12.
2, mixer 13 is constituted by a common connection point of the resistors r _11, r ₁₂ and current source I ₁₁ connected between the ground.

[0023] In this mixer 13, the bases of the differential transistors Q ₃₁ and Q _34, Q ₃₂ and Q ₃₃ are commonly connected,
Each common connection point is connected to the output terminals 5 and 6 of the 90-degree phase shift circuit 10 and to the emitters of the transistors Q ₃₇ and Q ₃₈ . The bases of the transistors Q ₃₇ and Q ₃₈ are biased by the DC power supply E ₂ . on the other hand,
A modulation signal I is applied between the bases of the differential transistor pair Q ₃₅ and Q ₃₆ .

A multiplier 14 comprising a differential transistor pair Q ₄₁ , Q ₄₂ and a differential transistor pair Q ₄₃ , Q ₄₄ ,
A differential amplifier 15 comprising a pair of differential transistors Q ₄₅ and Q ₄₆ whose emitters are commonly connected via resistors r ₁₃ and r _14.
When mixer 16 is constituted by a common connection point of the resistors r _13, r ₁₄ and the current source I ₁₂ connected between the ground. In the mixer 16, the differential transistors Q ₄₂ and Q _43,
The bases of Q ₄₁ and Q ₄₄ are commonly connected, together with the respective common connection point is connected to the output terminals 7 and 8 of the 90 degree phase shift circuit 10 is connected to the emitter of the transistor Q _47, Q _48. The base of the transistors Q ₄₇ and Q ₄₈ is a DC power supply E
Biased by _three . On the other hand, a modulation signal Q is applied between the bases of the differential transistor pair Q ₄₅ and Q ₄₆ .

The differential transistors Q ₃₁ and Q _{33 of the} multiplier 11
And the differential transistors Q ₄₁ , Q ₄₁ of the multiplier 14
₄₃ the collectors are commonly connected to the differential transistor Q ₄₂ of the collector and multiplier 14 of the differential transistors Q _32, Q ₃₄ of each collector outputs are summed and via the resistor R _11, also the multiplier 11, the collectors of Q ₄₄ are commonly connected, each collector output is derived as a modulated output via respective summed and resistor R _12.

By the way, in the quadrature modulation circuit having the above configuration, the mixers 13 and 16 may be changed due to the variation of circuit elements or the like.
It is an unavoidable problem that a gain difference occurs between them.
If there is a gain difference between the mixers 13 and 16, even if the 90 ° phase shift circuit 10 has the same drive currents i ₁ , i ₂ / i ₃ and i ₄ with the same phase difference of 90 °. Also, a voltage difference occurs in the circuit according to the gain difference,
As a result, the frequency characteristics become unbalanced.

Then, for example, the drive currents i ₃ and i ₄
The current path side, the differential transistor pair Q _51, Q ₅₂ biased commonly connected and each base by the DC power source E ₄ are each emitter through a resistor r _15, r _16, resistor r _15,
providing a gain adjustment circuit 17 to the common connection point and consists of a current source coupled I ₁₃ Metropolitan between the ground of r _16. Then, in the gain adjustment circuit 17 adjusts the gain of the mixer 16 by varying the current flowing through the current source I _13.

According to this, even if a gain difference occurs between the mixers 13 and 16 due to a variation in circuit elements or the like, the gain difference can be eliminated by adjusting the gain, so that a well-balanced frequency characteristic can be obtained. Obtainable.
In this embodiment, the gain of the mixer 16 is adjusted by inserting the gain adjustment circuit 17 into the current path on the drive current i ₃ , i ₄ side. However, the gain adjustment circuit 17 is connected to the drive current i ₁ , i ₂ side. It is also possible to adjust the gain of the mixer 13 by putting it in the current path described above, and the point is that the gain difference between the mixers 13 and 16 can be reduced to zero.

[0029]

As described above, according to the present invention,
A carrier wave is applied to both ends of a series connection circuit including at least two first and second resistors and a capacitor, and a voltage between both ends of these elements is detected by a differential amplifier, and a combined signal of each output signal of the resistance side differential amplifier and By deriving the output signal of the capacitor-side differential amplifier as two carrier signals having a phase difference of 90 degrees, the effect of the parasitic element due to the resistance is better when divided than when only one resistor is used. Can be reduced, so that two carrier signals with good phase balance can be obtained.

Further, since the quadrature modulation circuit is formed by using the CR phase shift circuit, the DC balance is good, the quadrature modulation can be stably performed even at a high frequency, and the circuit can be configured with a small number of elements. Can be reduced. Further, by providing a gain adjustment circuit for adjusting one gain of the two mixers, even if a gain difference occurs between the two mixers due to variations in circuit elements or the like, a good balance is obtained by the gain adjustment. Frequency characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of a 90-degree phase shift circuit according to the present invention.

FIG. 2 is a frequency-phase characteristic diagram showing a phase change by phase correction.

FIG. 3 is a diagram showing a phase relationship by phase correction.

FIG. 4 is a circuit diagram showing an embodiment of a quadrature modulation circuit according to the present invention.

FIG. 5 is a block diagram showing a conventional example of a quadrature modulation circuit.

6 is a waveform chart of each part in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 CR series current path 2-4 Differential amplifier 10 90 degree phase shift circuit 11,14 Multiplier 13,16 Mixer 17 Gain adjustment circuit

Claims (6)

(57) [Claims] 1. The method according to claim 1, wherein at least the first,
An RC series connection circuit including a second resistor and a capacitor, and a carrier wave applied to both ends; first and second differential amplifiers for detecting voltages at both ends of the first and second resistors; and the capacitor. And a third differential amplifier for detecting a voltage between both ends of the first and second differential amplifiers. A combined signal of each output signal of the first and second differential amplifiers and an output signal of the third differential amplifier are shifted by about 90 degrees. A 90-degree phase shift circuit, which is derived as two carrier signals having a phase difference. 2. An emitter follower circuit connected to both ends of the first and second resistors and the capacitor, wherein the first, second, and third differential amplifiers include the emitter follower circuit. 2. The 90-degree phase shift circuit according to claim 1, wherein the detection of the voltage between both ends is carried out via a terminal. 3. A phase correction circuit for correcting the phase of the voltage across each of the first and second resistors or the phase of the voltage across the capacitor, wherein the phase correction circuit adjusts the relative phase of the two signals. 3. The 90-degree phase shift circuit according to claim 1, wherein 4. The device according to claim 1, wherein the first and second resistors have the same resistance.
90 degree phase shift circuit as described. 5. A quadrature modulation circuit using the 90-degree phase shift circuit according to claim 1, 2, 3, or 4, wherein one of two carrier signals from the 90-degree phase shift circuit and a first modulation signal. A first mixer for mixing the second carrier signal with a second mixer for mixing the other of the two carrier signals with a second modulation signal; and an output of each of the first and second mixers. A quadrature modulation circuit which adds a signal and derives it as a modulation output. 6. The quadrature modulation circuit according to claim 5, further comprising a gain adjustment circuit for adjusting a gain of said first or second mixer.