JP3441059B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ZnO-based semiconductor device, and more particularly to a semiconductor device including an electrode structure capable of obtaining ohmic contact with low resistance to a p-type ZnO-based single crystal and a method for manufacturing the same. Regarding

[0002]

2. Description of the Related Art ZnO crystals, which is a type of II-VI group compound semiconductors, are expected to be applied to optical semiconductor elements such as light emitting elements and light receiving elements. Since ZnO crystal is a semiconductor having a wide band gap (Eg = 3.4e)
V), the emission wavelength corresponding to the band gap is 360 nm
To 400 nm ultraviolet light.

[0003]

By the way, ZnO is
It has a property called unipolar. N using ZnO
It is relatively easy to realize a type semiconductor (n-ZnO), but it is difficult to realize a p-type semiconductor (p-ZnO).

Therefore, it is difficult to form a pn junction using ZnO, and a ZnO-based semiconductor element, especially pn
It has been difficult to realize an optical semiconductor device having a junction.

Recently, a p-type ZnO crystal has been obtained by using a technique of co-doping nitrogen (N) which is a p-type impurity and gallium (Ga) which is an n-type impurity into ZnO. A report to that effect has been made. More specifically, by the pulse laser deposition method, Zn
A method of growing a p-type ZnO single crystal while co-doping p-type impurity nitrogen (N) and n-type impurity gallium (Ga) in O is used.

By the way, Al is generally used as an ohmic electrode for an n-type ZnO crystal, but due to the above-mentioned circumstances, there has been no knowledge of an ohmic electrode suitable for a p-type ZnO crystal.

An object of the present invention is to provide a semiconductor device having an ohmic electrode structure suitable for a p-type ZnO crystal and a method for manufacturing the same.

[0008]

According to one aspect of the present invention, a p-type ZnO-based single crystal layer is brought into contact with the p-type ZnO-based single crystal layer, and Ni, Rh, Pt, Pd and alloys thereof are formed. A second metal layer formed on the first metal layer and a first metal layer containing at least one selected from the group: and the second metal layer is Ni when the first metal layer is Ni. The layer is a metal layer containing at least one of Au, Rh, Pt, Pd, and Ir, and when the first metal layer is Rh, the second metal layer is a metal layer containing Au. When the first metal layer is Pt, the second metal layer is a metal layer containing at least one of Rh and Au, and when the first metal layer is Pd, the second metal layer contains Au. When the first metal layer is Ir, and the second metal layer is Rh, Au, or Pd. Semiconductor device is provided which is a metal layer containing at least one.

According to another aspect of the present invention, a step of preparing a p-type ZnO-based single crystal layer whose surface is exposed, and Ni, Rh, Pt, and Pd
And a step of forming a first metal layer containing at least one selected from the group of these alloys, and a step of forming a second metal layer on the first metal layer, the first metal layer When Ni is Ni, the second metal layer is Au, Rh, P
a step of forming a metal layer containing at least one of t, Pd and Ir, and a step of forming the second metal layer with a metal layer containing Au when the first metal layer is Rh. When the first metal layer is Pt, the second metal layer is a metal layer containing at least one of Rh and Au, and when the first metal layer is Pd, the second metal layer is the second metal layer. The metal layer is a step of forming a metal layer containing Au. When the first metal layer is Ir, the second metal layer is Rh,
There is provided a method for manufacturing a semiconductor device, which is a step of forming a metal layer containing at least one of Au and Pd.

According to another aspect of the present invention, a substrate, a ZnO-based buffer layer formed on the substrate, and the ZnO
A first semiconductor layer including a first-conductivity-type or second-conductivity-type ZnO-based single-crystal layer formed on the system-buffer layer and the first-conductivity-type or second-conductivity-type ZnO-based single-crystal layer, A second semiconductor layer having a conductivity type opposite to that of the first conductivity type or second conductivity type ZnO-based single crystal layer, and a p-type semiconductor layer of the first semiconductor layer or the second semiconductor layer, Ni, R
a first metal layer containing at least one selected from the group consisting of h, Pt, Pd and alloys thereof, and a second metal layer formed on the first metal layer, wherein the first metal layer is N
In the case of i, the second metal layer is Au, Rh, Pt, P
If the first metal layer is Rh, the second metal layer is a metal layer containing Au, and if the first metal layer is Pt, the metal layer contains at least one of d and Ir. The second metal layer is a metal layer containing at least one of Rh and Au. When the first metal layer is Pd, the second metal layer is a metal layer containing Au. When the metal layer is Ir, the second metal layer is a metal layer including at least one of Rh, Au, and Pd.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION As used in the present specification,
The term “p-type ZnO-based single crystal” includes not only p-type ZnO single crystal but also ZnO as a main component, such as a superlattice structure of ZnO and ZnTe, and has a wide band gap similar to ZnO. A semiconductor single crystal layer is also included.

The "growth temperature of low-temperature grown ZnO" defined in this specification is, for example, from 200 ° C to 6 ° C.
The temperature is about 100 ° C. to 400 ° C. lower than the crystal growth temperature for growing a ZnO single crystal, which is about 00 ° C. The "growth temperature of the high temperature grown single crystal ZnO layer" is generally a growth temperature suitable for growing a ZnO single crystal, higher than the above "growth temperature of low temperature grown ZnO", and 800 ° C. Lower temperature, eg 6
It is 50 ° C.

The inventor first studied an electrode for a p-type ZnO semiconductor crystal.

When the metal (electrode) and the semiconductor are joined, the barrier height eVd seen from the semiconductor side is eVd = φ
It is represented by m-φs. Here, Vd is the diffusion potential of the semiconductor layer, φm is the work function of the metal (electrode), and φs is the work function of the semiconductor.

When a p-type semiconductor and a metal are brought into contact with each other,
Conditions for obtaining good ohmic contact are φm> φs
It is represented by (p).

By the way, the work function of the p-type ZnO semiconductor crystal is
The number φs (p) is about 6.25 eV (assuming an intrinsic semiconductor
Then it is big. Note that the p-type impurity doping amount is 10¹⁸
cm ^-3Assuming that, the work function φs is about 7.9 eV.
It Therefore, ohmic electrode material for p-type ZnO-based single crystal
As the material, select a metal with a relatively large work function (φm).
The choice is to reduce the contact resistance between metal and semiconductor.
It is considered desirable from the viewpoint of

Specific examples of the ohmic electrode material for p-type ZnO single crystal are Ni (φm = 5.15) and Ge.
(Φm = 5.0), Se (φm = 5.9), Rh (φm
= 4.98), Te (φm = 4.95), Re (φm =
4.96), Ir (φm = 5.27), Pt (φm =
5.65), Au (φm = 5.1), C (φm = 5.
Materials such as 0) and Pd (φm = 5.12) are considered desirable because they have a relatively large work function.

In the present specification, "work function is 5.
It is described that the work function is near 0 eV, for example.
It is in the range of 4.5 to 6.0, preferably the work function is in the range of 4.9 to 5.2.

According to the theoretical consideration and the experimental result by the inventor, it is particularly deposited on Ni (first layer: metal in direct contact with p-type ZnO crystal) / Au (second layer: first layer metal). A laminated structure of (metal) is preferable.

In addition to the structure obtained by heat-treating the laminated structure of Ti / Au, Rh / Au, Pt / Rh, Pd / Au, Pt
/ Au, Ni / Rh, Ni / Pt, Ni / Pd, Ni /
It was found that a laminated structure of Ir, Ir / Au, Ir / Rh, and Ir / Pd subjected to heat treatment is promising.

Based on the above findings, a semiconductor element having the above electrode structure as an ohmic electrode for a p-type ZnO-based single crystal will be described below.

A semiconductor device according to the first embodiment of the present invention will be described with reference to the drawings.

In FIG. 1, as an example of a growth apparatus for growing a ZnO-based crystal structure forming a semiconductor element, a crystal growth apparatus using a radical source molecular beam epitaxy (RS-MBE) method (hereinafter referred to as "RS-MBE" It is called a device.)
Shows the structure of.

The RS-MBE apparatus A includes a chamber 1 in which crystal growth is performed, and a vacuum pump P that keeps the chamber 1 in an ultrahigh vacuum state.

The chamber 1 contains Z for evaporating Zn.
It includes a port 11 for n, a port 21 for Ga for evaporating Ga, an O radical port 31 for irradiating O radicals, and an N radical port 41 for irradiating N radicals.

The Zn port 11 is provided with a Knudsen cell (hereinafter referred to as K cell) 17 for containing and heating and evaporating a Zn (purity 7N) raw material 15 and a shutter S ₁ .

The Ga port 21 accommodates the Ga raw material 25 and heats and evaporates the K cell 27 and the shutter S.
_The O radical port 31 provided with ₂ introduces oxygen gas, which is a raw material gas, into the electrodeless discharge tube, and the high frequency (13.5
The O radical generated by using 6 MHz) is ejected into the MBE chamber 1. An orifice 33 and a shutter S ₃ are provided for the beam of O radicals.

The N radical port 41 introduces nitrogen gas, which is a raw material gas, into the electrodeless discharge tube to generate high frequency (13.5).
N radicals generated by using 6 MHz) are ejected into the MBE chamber 1. A shutter S ₄ is provided for the beam of N radicals.

The structure of the radical ports 31 and 41 is such that the induction coil is wound outside the discharge tube provided inside the outer shield tube.

Inside the chamber 1, there are provided a substrate holder 3 for holding a sapphire substrate S which is a base for crystal growth, and a heater 3a for heating the substrate holder 3.

The temperature of the sapphire substrate S can be indirectly measured by the thermocouple 5 installed in the heater. The position of the substrate holder 3 can be moved by a manipulator 7 using a bellows.

The chamber 1 is a reflection electron beam diffractometer (RHE) provided for monitoring the grown crystal layer.
ED device) gun 51 and RHEED device screen 5
Including 5 and. Using the gun 51 of the RHEED device and the screen 55 of the RHEED device, the growth can be performed while monitoring the state of crystal growth (growth amount, quality of the grown crystal layer) in the MBE device A.

The temperature of crystal growth, the thickness of the crystal growth film, the degree of vacuum in the chamber, etc. are appropriately controlled by the controller C.

The process of growing ZnO on the sapphire substrate S will be described in detail below.

Crystal growth is performed by appropriately opening and closing shutters S ₁ to S ₄ by the RS-MBE method.

As a method for generating a radical source, the RF-MBE method using RF is used. 13.
O ₂ radicals are generated by introducing O ₂ which is a raw material gas into the electrodeless discharge tube by using a high frequency of 56 MHz. By blowing O radicals into the MBE chamber 1 in a high vacuum state, an O radical beam is formed. A ZnO thin film is grown by simultaneously irradiating the sapphire substrate S with the O radical beam and the Zn beam from the K cell.

FIG. 2 is a sectional view showing the structure of the semiconductor device according to the present embodiment.

The steps for forming the semiconductor device shown in FIG. 2 will be described below.

1) Surface treatment: H ₃ P obtained by heating the surface of the sapphire substrate S having a (0001) plane to 110 ° C.
Wet etching was performed for 60 minutes in a solution of O ₄ : H ₂ SO ₄ = 1: 3.

After performing the above surface treatment, the sapphire substrate S was mounted on the substrate holder 3 (FIG. 1).

The substrate temperature is 600 ° C. and the oxygen flow rate is 2 sccc.
m and RF power of 150 W, the surface treatment was carried out by oxygen plasma for 1 hour in the MBE apparatus. M
The surface of the sapphire substrate S is cleaned by treating the surface of the sapphire substrate S in the BE device.

2) Low temperature growth ZnO buffer layer growth: After the above substrate surface treatment, the buffer layer 101 is grown first. Different from the growth condition of a normal single crystal ZnO substrate, the growth is performed at a low temperature and a Zn rich condition (low temperature growth ZnO substrate).
layer). The beam amount of Zn is 4.0 × 10 ⁻⁷ Torr.

An O 2 RF plasma source is used as a supply source of the oxygen beam. Pure oxygen (purity 6N) gas is introduced into the O radical port 21, and is radicalized using a high frequency oscillation source.

The flow rate of oxygen as a gas source is 5 × as the partial pressure of oxygen in the chamber at a flow rate of 2.0 sccm.
10 ^-5 Torr, RF power is 300W. The growth temperature was 500 ° C. The growth is from 200 ° C to 60
It is preferably carried out between 0 ° C.

The thickness of the ZnO buffer layer 101 is 10 n
m. The thickness is preferably in the range of 10 to 100 nm.

Here, the above-mentioned pressure value indicates the indicated value of the nude ion gauge attached at the substrate holder position (growth position).

3) Flattening treatment: After the low-temperature grown ZnO buffer layer 101 was grown, the surface of the ZnO buffer layer 101 was flattened. As the flattening treatment, heat treatment was performed at a high temperature for growing a single crystal, for example, 600 ° C. for 10 minutes. The heat treatment time is from 2 minutes to 6
Selected from times up to 0 minutes.

Low-temperature-grown Zn that has finished growth at a low growth temperature
The O buffer layer 101 is a single crystal having a grain boundary, and it is considered that each grain is epitaxially grown so that each grain exhibits the same anisotropy. Irregularities are observed mainly due to the grain boundaries between the grains. It is considered that by performing the above heat treatment on the low-temperature grown ZnO buffer layer 101, the single crystal of each grain undergoes solid phase growth to increase the grain size and flatten the surface.

Particularly when grown under a Zn-rich condition, the initial surface unevenness is smaller than when grown under an oxygen-rich condition, so that an excellent flat surface can be easily obtained by the flattening treatment. Low temperature growth Z with excellent planar surface
When the ZnO layer is grown on the nO buffer layer at a high temperature, a single crystal ZnO layer having good crystallinity can be easily obtained.

The low temperature growth ZnO buffer layer 101, since the grain boundaries small grain size while still grown (as-grown) is observed, (A Tomic F o
rce M icroscopy: AFM) also appear as polycrystalline observation. However, X-ray diffraction and RHEE
The analysis by the D method shows the characteristics of the single crystal.

This phenomenon is observed in the growth of GaN or ZnO. It is considered that by subjecting the low-temperature grown ZnO buffer layer 101 to a high-temperature heat treatment, irregularities due to grain boundaries and the like grow like in the case of solid-phase growth, and the surface becomes flat. From the experience, even if an attempt is made to grow single crystal ZnO on an uneven ZnO surface, the crystallinity does not improve.

4) Growth of undoped ZnO single crystal layer:
Then, an undoped ZnO single crystal (high temperature grown ZnO single crystal layer) 103 was grown on the flattened low temperature grown ZnO buffer layer 101. The thickness is 1 μm.

As a growth condition, the substrate temperature is 600 ° C. The temperature of the K cell is 320 ° C. Zn in this case
Has an evaporation rate of 1.6 Å / sec.

The flow rate of oxygen is 2.0 sccm. In this case, the partial pressure of oxygen is 5 × 10 ⁻⁵ Torr. RF
The power is 300W.

The growth conditions for the high temperature grown ZnO single crystal layer 103 are as follows: a temperature between 600 ° C. and 800 ° C.
Grow about μm.

A low temperature grown ZnO buffer layer 101 is provided,
Moreover, after the surface is flattened, a high temperature growth undoped ZnO single crystal layer 10 is grown thereon at a high growth temperature.
By growing No. 3, the crystallinity of the undoped ZnO single crystal layer 103 was improved.

When many crystal defects are introduced into the ZnO crystal, strong n-type conductivity is exhibited even in the state where no impurities are introduced. The high-temperature grown undoped ZnO single crystal layer 103 grown using the above crystal growth method has very few crystal defects. Zn grown by conventional crystal growth method
It is also possible to realize ZnO exhibiting p-type conductivity, which was difficult with an O single crystal. It is considered that since the crystal defects that form the non-radiative centers are significantly reduced, the luminous efficiency is also extremely high.

5) Growth of p-type ZnO single crystal layer:
A p-type ZnO single crystal layer 107 was grown.

The growth conditions for the p-type ZnO single crystal layer 107 are as follows:
The growth conditions for the undoped ZnO single crystal layer 103 are almost the same.

However, the crystal growth was performed at 550.degree. still,
The growth temperature is preferably in the range of 500 ° C to 700 ° C.

As a dopant, N was used in addition to Ga which is usually a dopant for n-type ZnO. Ga K
The cell temperature is 600 ° C. During the growth of ZnO crystals,
N plasma was introduced into the chamber to dope N. The flow rate of N ₂ gas when generating N plasma is 0.
It is 1 sccm and RF power is 300 W. Film thickness is 1 μm
Is.

The grown p-type ZnO single crystal 107 was evaluated by hole measurement. It was confirmed that p-type conductivity was actually exhibited. The resistivity is 1.78 Ωcm. The p-type impurity concentration is 5.47 × 10 ¹⁷ cm ⁻³ .

It is expected that by optimizing the crystal growth conditions, a p-type ZnO single crystal layer having a higher impurity concentration, for example, an impurity concentration of about 10 ¹⁹ cm ^-3 can be obtained.

6) Formation of ohmic electrode: Then, p
A process of forming an electrode on the type ZnO single crystal layer 107 will be described.

First, after growing up to the p-type ZnO single crystal layer 107, the sapphire substrate S is taken out from the MBE chamber 1 (FIG. 1). After forming the mask pattern for vapor deposition, the sapphire substrate S is mounted in the vapor deposition apparatus.

In the vapor deposition apparatus, Ni is vapor-deposited as a first metal layer 108a with a thickness of 70Å on the p-type ZnO single crystal. Then, Au is used as the second metal layer 108b.
Form 500Å. Multiple N's at positions separated by a specified distance
The i / Au electrode 108 is formed.

The substrate on which the Ni / Au electrode 108 was formed was taken out from the vapor deposition apparatus, and the substrate was heat-treated by lamp heating in a nitrogen atmosphere. Heating temperature is 500
C., heating time is 20 seconds.

A single material as the above electrode material,
For example, it is possible to use only Au.

When heat treatment is performed, the heating condition is 200 ° C.
To 600 ° C. A range of 300 ° C to 500 ° C is preferred. The heat treatment is preferably performed in an atmosphere of an inert gas such as nitrogen (N ₂ ) or argon (Ar).

Since ZnO is used as the crystal material, it is possible to perform the heat treatment in the presence of oxygen gas, such as in the air or in an oxygen gas atmosphere. The heat treatment in the presence of oxygen gas can prevent the dissociation of oxygen from the ZnO crystal.

When the heat treatment is performed, the heating time is from 1 second to 10 minutes. Practically 1 to 3 minutes,
It is preferably within 1 minute.

In FIG. 3, the Ni / Au electrode 10 formed on the p-type ZnO crystal layer 107 formed by the above steps is shown.
The result of having evaluated the electric characteristics of No. 8 using the measuring device 109 (FIG. 2) is shown.

The size of the sapphire substrate is 10 mm × 1
It is about 2 mm. On this sapphire substrate, a plurality of Ni / Au electrodes 108 (FIG. 2) aligned in the vertical and horizontal directions at a pitch of 5 mm were formed.

The size of each electrode is φ0.1 mm.
Among these electrodes, a pair of electrodes was used to evaluate the current-voltage characteristics between the electrodes. FIG. 3 shows the current-voltage characteristics obtained at this time. As a result, almost linear ohmic characteristics were obtained.

The value of the contact resistance measured at this time is about 3.3 kΩ. The obtained contact resistivity is about 1 × 10 ^-2 Ωcm ² .

As described above, the p-type ZnO single crystal layer 107 is formed.
If the p-type impurity concentration is increased by optimizing the growth conditions of, the sheet resistance of the p-type ZnO single crystal layer 107 is further reduced. In addition, the p-type ZnO single crystal layer 107 and N
The contact resistance with the i / Au electrode 108 is further reduced.

In the semiconductor device according to the first embodiment of the present invention described above, the Ni / Au two-layer laminated structure is used as the ohmic electrode for the p-type ZnO single crystal. The Ni / Au electrode structure may form a completely integrated alloy film, or the laminated structure may be maintained. The completely integrated alloy film may include an alloy film that partially reacts with a p-type ZnO-based single crystal or an atmospheric gas during heat treatment.
For example, the case where the laminated structure is diffused or interdiffused by some factor (for example, thermal energy applied during the heat treatment) and loses the order as the laminated structure is also included.

As described above, as the ohmic electrode material on the p-type ZnO single crystal, Rh / Au and Pt / R are used.
h, Pd / Au, Pt / Au, Ni / Rh, Ni / P
t, Ni / Pd, Ni / Ir, Ir / Au, Ir / R
It is also possible to use a layered structure of h and Ir / Pd which is heat-treated.

The electrode material in the first region may be doped with the following metal materials. For example,
Group III compounds, Group V compounds B, Al, Ga, I
Examples thereof include n, Y, P, As, Sb, Bi, V, Nb and Ta.

The structure using the electrodes as described above is also within the scope of the present invention.

Further, as a metal material having a high reflectance, A
It is also possible to use g or Al.

The ohmic electrode for the p-type ZnO-based single crystal has only to be in contact with an electrode of Ni / Au or the like on the p-type ZnO-based single crystal layer.

The form of the ohmic electrode is, for example, a layer form,
It may have any shape such as an island shape or an alloy. In particular, after heat treatment, the ohmic electrode is often in the form of an island or an alloy. In reality, it is difficult to accurately define the film thickness itself of each electrode material.

Considering mass productivity and the like, the most preferable process condition within the range of the experiment conducted by the inventor is N
This is a case where i is vapor-deposited at about 200 Å, Au is vapor-deposited at about 3000 Å, and then heat treatment is performed.

If necessary, before or after the heat treatment,
A structure in which a metal material such as Au is formed via a metal material such as Ti or W can be used as the metal material for the bonding pad.

When the above metal material (Ti / Au or W / Au) is deposited before the heat treatment, the heat treatment performed thereafter causes the metal material for the bonding pad and the ohmic electrode material to diffuse into each other, It is also conceivable to form more complex alloys.

In the present specification, a material in contact with the p-type ZnO-based single crystal (for example, Ni in the above-mentioned embodiment).
Is referred to as a first metal layer, and the metal material formed thereon is referred to as a second metal layer.

The metal material of the first metal layer is in direct contact with the p-type ZnO based single crystal layer. Therefore, when forming the ohmic electrode, the first metal layer plays the most important role for the ohmic characteristics and the like.

However, as described above, the metal material of the first layer is not limited to one having a layered form in practice. For example, when the first layer metal material is vapor-deposited in the vapor deposition machine and the expected film thickness is thin, the metal material is not necessarily deposited in layers over the entire surface of the ZnO. Rather, the metal material is often formed in an island shape.

It is important that the thickness of the metal material of the first layer is thin. When the metal material having a large work function is brought into contact with the p-type ZnO layer having a high hole carrier density, ohmic contact is achieved by a tunnel-like function. It is estimated that it will be formed.

When a thin metal material is used as the first metal layer, the second metal layer having a certain thickness is required on the first metal layer for practical use. The influence of the metal material forming the second metal layer on the ohmic characteristics is not so large as that of the metal material forming the first metal layer. However, in practice, it is preferable to use the above-mentioned metal materials.

On the p-type ZnO single crystal, an alloy (Ni-Au alloy or the like) of the metal material forming the first metal layer and the metal material forming the second metal layer is sputtered, for example. The method of depositing by the method is also effective.

In the above-mentioned embodiment, the p-type ZnO-based single crystal was formed by the method of codoping with Ga and N while growing the ZnO-based single crystal.

In addition, using the method described below, p
It is possible to form a p-type ZnO-based single crystal having substantially the same characteristics as the p-type ZnO single crystal.

The crystal growth apparatus used for growing the p-type ZnO-based single crystal is the same as the above RS-MBE apparatus (FIG. 1). However, in the Ga port 21 in FIG.
Put Te in place of a. The purity of Te is 6N.
The RS-MBE device is provided with a K cell 27 for containing the raw material Te (25) and heating and evaporating Te, and a shutter S ₂ . RHEED installed in MBE device
MB using the gun 51 and RHEED screen 55
E The growth can be performed while monitoring the state of crystal growth (growth amount, quality of grown crystal layer) in the apparatus A.

The temperature of crystal growth, the thickness of the crystal growth film, the degree of vacuum in the chamber, etc. are appropriately controlled by the controller C.

The process of growing a p-type ZnO based single crystal layer on a ZnO substrate will be described below.

All crystal growth is performed by the MBE method.

The beam amount of Zn is 1.0 × 10 ⁻⁷ Tor.
The beam amount of Te is 5.0 × 10 ⁻⁷ Torr.

As an oxygen beam supply source, an O 2 RF plasma source is used. Pure oxygen (purity 6N) gas is introduced into the O radical port 31, and is radicalized using a high frequency oscillation source.

An N RF plasma source is used as the supply source of the nitrogen beam. Pure nitrogen (purity 6N) gas is introduced into the N radical port 41, and is radicalized using a high frequency oscillation source.

Port 3 for oxygen and nitrogen gas sources
The pressure in 1, 41 is 5 × 10 ⁻⁵ Torr for oxygen (flow rate 2 sccm) and 2 × 10 ⁻⁶ Torr for nitrogen (flow rate 0.03 sccm), respectively. The growth temperature is 600 ° C.

Here, the above-mentioned pressure value indicates the indicated value of the nude ion gauge attached to the substrate holder position (growth position).

The flow rate of the gas source is as follows.
The unit of sccm was used, which is 25 as well known.
It shows the flow rate at 1 ° C and ° C.

FIG. 4 shows two growth processes ((a) and (b)) for growing a ZnO crystal using a shutter S.
_This is shown by the opening / closing sequence from ₁ to S ₄ .

FIG. 4A shows the first growth process of the two growth processes. Time t ₁
Then, the Zn shutter S ₁ and the O shutter S ₃ are opened. Zn element and O element fly over the surface of the substrate 100,
A ZnO crystal layer grows. By controlling the growth parameters such as the supply amount of Zn and the supply amount of O, ZnO crystals grow in a molecular layer unit.

In this specification, one molecular layer means one of Zn.
It means a crystal unit composed of an atomic layer and one atomic layer of O. Shutter S ₁ until crystal of 10 molecular layers grows,
Open S ₃ .

Time t₂At shutter S of O₃Close
Time t₃Until then, only Zn is supplied. Zn supply
As a result, Zn on the outermost surface of the undoped ZnO layer 101a
A termination surface is formed. In order to eliminate excess Zn, t
₃To t_FourUntil then, close all shutters. Time t
_FourAt Te, shutter S₂And N shutter S _Four
Is opened to supply Te and N onto the Zn termination surface.
By combining the Zn termination surface with Te and N, N
The pinned ZnTe layer grows by one molecular layer.

At time t ₄ , RHEED of the ZnTe layer
The pattern is (2 × 1) and represents a Te-rich state.

From t ₅ to t ₆ , all shutters are closed, excess atoms are desorbed and exhausted. Then Zn again
Then, the shutter S ₁ is opened and the ZnTe end surface is corrected. The Te-rich surface is changed to a Zn-rich surface. This improves the surface morphology and polarity.

Next, the shutter S ₃ for O is opened (t ₇ ), and ZnO is grown again. This state is equivalent to the state at time t ₁ . The above process is repeated 30 times.

Through the above steps, p-type ZnO
A system single crystal can be grown.

FIG. 4B shows the second growth process. The outline of the growth process is shown below.

The shutter S ₁ of Zn is opened, and Z is placed on the substrate.
The n element is continuously supplied. O at time t ₂
The shutter S ₃ is opened to supply O element to grow ZnO which is not impurity-doped positively.

Next, at time t ₂ , the shutter S ₃ for O is closed to stop the supply of O element, and then at time t ₄ , the shutter S ₂ for Te and the shutter S ₄ for N are opened to remove Te element and N element. To grow a ZnTe layer doped with N.

During the time t ₅ to t ₆ , the shutter S ₃
And S ₄ are closed, and the ZnTe termination surface is corrected.

Next, the shutter S ₃ for O is opened (t ₇ ), and ZnO is grown again. This state is equivalent to the state at time t ₁ . The above process is repeated 30 times.

When the ZnO buffer layer 101 is provided, Zn and O are supplied in advance on the substrate 100 to grow a ZnO layer having a desired thickness, and then the above process is performed.

The p-type ZnO-based single crystal layer formed after passing through either of the above two steps is one in which ZnTe is laminated at a ratio of 10 molecular layers to ZnTe at one molecular layer. The band gap of the stacked superlattice layers is almost the same as that of ZnO. ZnTe exhibits p-type conductivity when doped with N as an impurity. N-doped ZnTe
The diffusion of N impurities from the layer and the migration of holes are
It occurs over 10 of the layers.

ZnO / ZnTe grown in this way
The superlattice layer exhibits a property as a p-type conductive layer as a whole.

The thickness of ZnTe was limited to one molecular layer. Since the thickness is the critical film thickness or less, the strain generated in the growth layer can be suppressed to be small. The surface morphology of the growth layer can be improved.

When the flow rate of N into ZnTe is set to 0.05 ccm or less under the above growth conditions, the amount of N doping in ZnTe is suppressed to 1 × 10 ²⁰ cm ^-3 or less.

Preferably, the concentration of N doped in ZnO is suppressed to be lower than the concentration of N doped in ZnTe by diffusion or the like.

A diode having a pn junction can be produced by using the above-described technique for manufacturing a p-type ZnO single crystal layer and technique for forming an ohmic electrode for a p-type ZnO single crystal.

In order to form a diode having a pn junction by using a ZnO-based single crystal, among the above steps 1) to 6), the high temperature grown non-doped Zn of step 4) is used.
A step of forming an n-type ZnO single crystal layer is performed between the step of growing the O single crystal layer and the step 5) of forming the p-type ZnO single crystal layer. An n-type ZnO single crystal may be grown instead of the high temperature growth non-doped ZnO single crystal layer. Ga used as a dopant for an n-type impurity is doped during growth of a ZnO single crystal using the Ga port 21.

The formed n-type ZnO single crystal layer has a thickness of 1
μm. The doping amount of Ga is 1 × 10 ¹⁸ cm ⁻³ .

A p-type ZnO single crystal layer is formed on the n-type ZnO single crystal layer.

After the crystal growth is completed, the p-type ZnO single crystal layer is etched by the liquid phase etching method or the vapor phase etching method to expose the surface of the n-type ZnO single crystal layer.

A first electrode is formed on the exposed surface of the n-type ZnO single crystal layer by using a material such as Al.

After that, the second electrode is formed by using a material such as Ni / Au by the same step as the above step 6).

Through the above steps, a pn junction diode using ZnO single crystal is formed.

In the above structure, when a positive voltage is applied to the second electrode with respect to the first electrode, a forward current flows in the pn junction. The minority carriers (electrons) injected into the p-type ZnO single crystal layer and the majority carriers (holes) in the p-type ZnO single crystal layer undergo radiative recombination. Upon recombination of electrons and holes, light with energy approximately equal to the energy gap of the forbidden band is generated. That is, it converts electrical energy into light energy.

An optical semiconductor device is manufactured using the above pn junction diode structure.

A semiconductor element (optical semiconductor element) according to the second embodiment of the present invention will be described.

FIG. 5 shows a p-type ZnO single crystal layer and an n-type ZnO.
LED using a p-n junction between the single crystal layer (L ight
Shows a cross-sectional structure of E mitting D iode).

The LED shown in FIG. 5 is a sapphire substrate 30.
1, a low-temperature grown non-doped ZnO buffer layer 305 having a thickness of 10 nm grown thereon, a high-temperature grown non-doped ZnO single crystal layer 307 having a thickness of 1 μm grown thereon, and a non-doped ZnO single crystal layer 307 grown thereon. 1 μm thick n-type (Ga
Dope: 1 × 10 ¹⁸ cm ⁻³ ) High-temperature grown ZnO single crystal layer 3
11 and N and Ga having a thickness of 100 nm formed thereon.
And p-type ZnO-based single crystal layer 315 co-doped with
Including and

The n-type ZnO single crystal layer 311 is in contact with the first electrode 321 made of Al.

In order to form the n-type ZnO layer, G
Instead of a, other Group 3 element such as Al may be doped.

P formed by co-doping (N, Ga)
The ZnO-based single crystal layer 315 is processed into an island shape.

Island-shaped p-type ZnO single crystal layer 31
5 is covered with an insulating film 318 made of, for example, Si ₃ N ₄ . On the upper surface of the p-type ZnO single crystal layer 315, for example, a substantially circular opening is formed through the insulating film 318.

A ring-shaped second electrode 325 (first metal layer 325a) is formed on the peripheral portion of the upper surface of the p-type ZnO single crystal layer 315.
(Ni) and the second metal layer 325b (Au)) are formed. At least a part of the lower surface of the ring-shaped second electrode contacts the peripheral portion of the upper surface of the p-type ZnO layer 315.
The radially outer portion of the ring-shaped second electrode 235 has a structure in which it rides on the insulating film 318.

In the above structure, when a positive voltage is applied to the second electrode 325 (325a, 325b) with respect to the first electrode 321, a forward current flows in the pn junction. p
The minority carriers (electrons) injected into the p-type ZnO single crystal layer 315 and the majority carriers (holes) in the p-type ZnO single crystal layer 315 recombine luminescently. Upon recombination of electrons and holes, light having an energy equal to the energy gap of the band gap of ZnO is emitted from the opening 327.
The wavelength of the emitted light is about 370 nm.

FIG. 6 is a sectional view showing a first modification of the semiconductor device according to the second embodiment of the present invention.

FIG. 6A shows ZnO / N-doped ZnT.
using a superlattice consisting of e as a p-type semiconductor, LED comprising a p-n junction diode using a ZnO and Ga-doped as an n-type semiconductor (L ight E mitting D i
FIG. 3 is a cross-sectional view showing a structure of (ode).

FIG. 6B is a sectional view showing a superlattice structure made of ZnO / ZnTe.

As shown in FIG. 6A, the LED comprises a sapphire substrate 301 and a low-temperature grown sapphire substrate 301 with a thickness of 10.
nm non-doped ZnO buffer layer 305, a high-temperature grown non-doped ZnO single crystal layer 307 having a thickness of 1 μm grown thereon, and an n-type (Ga-doped: 1 × 10 ¹⁸ cm) grown thereon having a thickness of 1 μm. ^-3 ) a ZnO layer 311 and
A superlattice layer 316 in which 30 layers of ZnO and ZnTe (N) formed thereon are alternately laminated (total thickness is about 10
0 nm).

As shown in FIG. 6B, co-doped p-type Z
A superlattice layer is used as the p-type ZnO-based single crystal layer instead of the nO single crystal 315 (FIG. 5). n-type ZnO layer 31
On top of this, a superlattice layer 316 of an undoped ZnO layer and an N-doped ZnTe layer is used.

The superlattice layer 316 is composed of ZnO layers 331a, 331a and
31b, ... 331z and ZnTe layers 333a, 33
3b, ..., 333z are alternately laminated. Z
Each of the nO layers 331a, 331b, ... 331Z is
For example, it has 10 molecular layers, and ZnTe layers 333a, 33
Each of 3b, ..., 333z is, for example, one molecular layer.

The total thickness of superlattice layer 316 is, for example, 100.
It is about nm. ZnO for 10 molecular layers is ZnTe
Are laminated at a ratio of one molecular layer. The band gap of the stacked superlattice layers is almost the same as that of ZnO. ZnTe
Shows p-type conductivity by being doped with N as an impurity. N diffusion of impurities and migration of holes occur from the N-doped ZnTe layer to the ZnO layer over the ZnO layer 10 molecular layer.

On the ZnO / ZnTe superlattice layer exhibiting p-type conductivity, the same method as that for the ohmic electrode for p-type ZnO single crystal according to the first embodiment is used, for example, N
By forming an electrode composed of i / Au, p-type Zn
An ohmic junction can be obtained for the O / ZnTe superlattice layer.

The n-type ZnO layer 311 (FIG. 6A) is in contact with the first electrode 321 (Al).

In order to form the n-type ZnO layer, other Group 3 element such as Al may be doped instead of Ga.

The superlattice layer 316 is processed into an island shape.
The outer portion of the island-shaped superlattice layer 316 is covered with an insulating film 318 made of SiN, for example. On the upper surface of the superlattice layer 316 of the insulating film 318, for example, a substantially circular opening is formed. At least the side surface of the island-shaped superlattice layer 316 is covered and protected by the insulating film 318.

In the periphery of the superlattice layer 316, for example, a ring-shaped second electrode 325 (325a, 325a) having openings is formed.
b) is formed. The lower surface of the ring-shaped second electrode on the inner peripheral side is in contact with the peripheral portion of the upper surface of the superlattice layer 316. The outer peripheral portion of the second electrode has a structure of riding on the insulating film 318.

In the above structure, when a positive voltage is applied to the second electrode 325 with respect to the first electrode 321, a forward current flows in the pn junction. Minority carriers (electrons) injected into the p-type superlattice layer 316 and the p-type superlattice layer 316
The majority carriers (holes) therein undergo radiative recombination. Upon recombination of electrons and holes, light with an energy approximately equal to the energy band gap is emitted from the aperture. That is, it converts electrical energy into light energy.

FIG. 7 shows a second modification of the semiconductor device (LED) according to the second embodiment.

The LED shown in FIG. 7 is a sapphire substrate 40.
1, a low-temperature grown non-doped low-temperature-grown ZnO buffer layer 405 having a thickness of 10 nm, a high-temperature grown non-doped ZnO single-crystal layer 407 having a thickness of 1 μm grown on the low-temperature grown ZnO buffer layer 405, 1 μm thick n-type (Ga
Dope: 1 × 10 ¹⁸ cm ⁻³ ) High temperature growth ZnO single crystal layer 4
11 and N and Ga having a thickness of 100 nm formed thereon.
And a p-type ZnO-based single crystal layer 415 co-doped with and.

The n-type ZnO single crystal layer 411 is in contact with the first electrode 421 made of Al.

In order to form the n-type ZnO layer, G
Instead of a, other Group 3 element such as Al may be doped.

P formed by co-doping (N, Ga)
The ZnO-based single crystal layer 415 is processed into an island shape.

Island-shaped p-type ZnO-based single crystal layer 4
15 is covered with an insulating film 418 made of, for example, Si ₃ N ₄ . On the upper surface of the p-type ZnO single crystal layer 415,
For example, a substantially circular opening is formed through the insulating film 418.

On the surface of the p-type ZnO-based single crystal layer 415,
A second electrode 425 (first metal layer 425a, eg Ni, second metal layer 425b, eg Au) is formed. At least a part of the lower surface of the second electrode 425 contacts the surface of the p-type ZnO-based single crystal layer 415. A radially outer portion of the ring-shaped second electrode 425 (425a, 425b) has a structure in which it is mounted on the insulating film 418. The second electrode 425 (425a, 425b) has, for example, a Ni / Au electrode structure.

A reflection electrode 427 is formed on the second electrode 425 (425a, 425b) so as to cover the opening formed in the second electrode 425 (425a, 425b). The reflective electrode 427 is, for example, Al or Ag.
Is formed of a metal material having high reflectance.

In the above structure, when a positive voltage is applied to the second electrode 425 (425a, 425b) with respect to the first electrode 421, a forward current flows in the pn junction. p
The minority carriers (electrons) injected into the p-type ZnO-based single crystal layer 415 and the majority carriers (holes) in the p-type ZnO-based single crystal layer 415 recombine with light emission. Upon recombination of electrons and holes, light with energy approximately equal to the energy gap of the forbidden band is generated. That is, it converts electrical energy into light energy.

The generated light passes through the sapphire substrate 401. The light emitted to the opposite side of the sapphire substrate 401 is reflected by the reflective electrode 427 and finally passes through the sapphire substrate 401. The wavelength of light transmitted through the sapphire substrate 401 is approximately 370 nm.

FIG. 8 shows a third modification of the semiconductor device (LED) according to the second embodiment.

The LED shown in FIG. 8 is a flip-chip type LED.

This flip-chip type LED has a structure similar to that of the LED shown in FIG.

More specifically, the sapphire substrate 301,
Non-doped low-temperature-grown ZnO buffer layer 305 with a thickness of 10 nm grown at low temperature and high-temperature grown non-doped ZnO single crystal layer 307 with a thickness of 1 μm grown thereon.
And a 1 μm thick n-type (Ga-doped: 1 × 10 ¹⁸ cm ⁻³ ) high-temperature-grown ZnO single crystal layer 311 grown thereon.
And a 100-nm-thick p-type ZnO-based single crystal layer 315 co-doped with N and Ga formed thereon.

The n-type ZnO single crystal layer 311 is in contact with the first electrode 321 made of Al.

P formed by co-doping (N, Ga)
The ZnO-based single crystal layer 315 is processed into an island shape.

The second electrode 325 (325a, 325b) is formed on a partial region of the p-type ZnO-based single crystal layer 315. The second electrode 325 (325a, 325b) has, for example, a Ni / Au electrode structure. On the back surface of the sapphire substrate 301, a reflective electrode 331 made of a metal material having a high reflectance such as Al or Ag is formed.

The back surface of the sapphire substrate 301 of the LED having the above structure (the side on which the reflective electrode 331 is formed)
On the glass substrate 341 prepared separately.

More specifically, first and second wiring patterns 345a and 345b made of, for example, Ti / Au are formed in a predetermined region on the glass substrate 341.

The first wiring pattern 345a has bumps 3
It is electrically connected to the first electrode 311 via 47.

The second wiring pattern 345b is directly electrically connected to the second electrode 325 (325a, 325b).

In the above structure, the first and second wiring patterns 34 are applied so that a positive voltage is applied to the second electrode 325 (325a, 325b) with respect to the first electrode 321.
When a voltage is applied between 5a and 345b, a forward current flows in the pn junction. The minority carriers (electrons) injected into the p-type ZnO-based single crystal layer 315 and the majority carriers (holes) in the p-type ZnO-based single crystal layer 315 recombine with light emission. When the electrons and holes are recombined, light having an energy equal to the energy band gap of the ZnO forbidden band is emitted and transmitted through the glass substrate 341. Glass substrate 341
The light emitted to the opposite side is reflected by the reflective electrode 331 and finally passes through the glass substrate 341. The wavelength of light transmitted through the glass substrate 341 is approximately 370 nm.

In the present embodiment described above, the LED has been described as an example of the semiconductor element utilizing the pn junction between the p-type ZnO single crystal layer and the n-type ZnO single crystal layer. It is also possible to form a laser element by combining a ZnO-based single crystal layer and an n-type ZnO single crystal layer. In addition, in combination with a p-type ZnO single crystal layer, FE
It goes without saying that it is also possible to manufacture electronic devices such as T and bipolar transistors, other optical devices, and semiconductor devices combining these.

Although the present invention has been described above with reference to the embodiments, the present invention is not limited to these. Various crystal growth conditions and other process parameters can be selected. In addition, it will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

[0180]

EFFECTS OF THE INVENTION A semiconductor element having a good ohmic electrode can be formed on a p-type ZnO-based single crystal layer.

When a semiconductor element is formed, the operating voltage can be lowered and the power consumption can be reduced. Since the parasitic resistance due to the ohmic electrode can be reduced, the influence of heat generation in the semiconductor element can be suppressed.

[Brief description of drawings]

FIG. 1 is a cross-sectional view schematically showing an MBE apparatus for growing a crystal structure included in a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the structure of the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a diagram showing current-voltage characteristics of the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is a timing chart showing a shutter sequence method for growing a crystal structure included in a semiconductor device according to a first modification of the first embodiment of the present invention.

FIG. 5 is a semiconductor device according to a second embodiment of the present invention, in which the semiconductor device according to the first embodiment is LE
It is sectional drawing which shows the structure applied to D.

FIG. 6 is a sectional view of a crystal structure according to a first modification of the semiconductor device according to the second embodiment of the present invention. Figure 6
(A) is sectional drawing which shows the whole structure. FIG. 6B is a sectional view showing the structure of the superlattice layer.

FIG. 7 is a cross-sectional view showing a structure in which a semiconductor element according to a second modification of the second embodiment of the present invention is applied to an LED.

FIG. 8 is a cross-sectional view showing a structure in which a semiconductor device according to a third modification of the second embodiment of the present invention is applied to an LED.

[Explanation of symbols]

A RS-MBE device C Control device P Vacuum pump S Substrate 1 Chamber 3 Substrate holder 3a Heater 5 Thermocouple 7 Manipulator 11 Zn port 15 Zn raw material 17 Knudsen cell 21 O radical port 31 N radical port 100 ZnO substrate 101 ZnO buffer layer (Low-temperature grown ZnO buffer layer) 103 ZnO single crystal layer (high-temperature grown ZnO single crystal layer) 105 n-type ZnO-based single crystal layer 107 p-type ZnO-based single crystal layer 108 electrode 108a first metal layer 108b second metal layer 301 sapphire Substrate 305 ZnO buffer layer (low temperature grown ZnO buffer layer) 307 Undoped ZnO single crystal layer (high temperature grown ZnO single crystal layer) 311 n-type ZnO single crystal layer (high temperature grown ZnO single crystal layer) 315 p type ZnO based single crystal layer ( High temperature growth ZnO single crystal layer) 318 Insulating film 32 1 1st electrode 325 2nd electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroyuki Sato 1-3-1 Eda Nishi, Aoba-ku, Yokohama-shi, Kanagawa Stanley Electric Co., Ltd. Technical Research Institute (72) Inventor Kenichi Morikawa Nishi Eda, Aoba-ku, Yokohama-shi, Kanagawa 1-3-1 Stanley Electric Co., Ltd. Technical Research Laboratory (56) Reference JP 2000-277534 (JP, A) International Publication 00/16411 (WO, A1) (58) Fields investigated (Int.Cl. ⁷⁾ , DB name) H01L 33/00 H01S 5/00-5/50

Claims (20)

(57) [Claims] 1. A p-type ZnO-based single crystal layer, and Ni, Rh, P contacting the p-type ZnO-based single crystal layer.
a first metal layer containing at least one selected from the group consisting of t, Pd and alloys thereof, and a second metal layer formed on the first metal layer , wherein the first metal layer is made of Ni. In this case, the second metal layer is A
At least one of u, Rh, Pt, Pd, and Ir is included.
A metal-free layer, the first case the metal layer is Rh, the second metal layer is Au
A metal layer containing the case of the first metal layer is Pt, year second metal layer R
h, a metal layer comprising at least one of Au, the first case the metal layer is of Pd, the second metal layer is Au
A metal layer containing the case of the first metal layer is Ir, said second metal layer R
A metal layer containing at least one of h, Au, and Pd.
Semiconductor element that. 2. A p-type ZnO-based single crystal layer is in contact with the p-type ZnO-based single crystal layer and has a work function of 4.9.
A first metal layer containing a metal of about 5.2 eV, and a second metal layer formed on the first metal layer,
When the first metal layer is Ni, Au, Rh, Pt, P
When the first metal layer is a metal layer containing at least one of d and Ir, and the first metal layer is a metal other than Ni, the work function is 4.9 to 5.2 eV and forms the first metal layer. A second metal layer which is a metal layer composed of one kind of metal different from the metal or an alloy containing these metals; and a work function formed on the second metal layer, the work function of which is the work function of the first metal layer. And a surface metal layer made of a lower metal than the semiconductor element. 3. The semiconductor device according to claim 2, wherein the surface metal layer has a reflectance higher than that of the second metal layer. 4. The surface metal layer contains Ag, an alloy containing Ag, or Al or an alloy containing Al.
The semiconductor device described. 5. The metal having a work function of around 5.0 eV includes an element selected from Ni, Au, C and Pd, or a compound or alloy containing these elements.
The semiconductor device according to any one of 1 to 3 above. 6. The semiconductor device according to claim 1, wherein the first metal layer is a layered region having a thickness of 50 nm or less or an island region having a height of 50 nm or less. 7. The first metal layer is Ni, and the second metal layer is Ni.
The semiconductor element according to claim 1, wherein the metal layer is Au. 8. The semiconductor device according to claim 1, wherein the first metal layer and the second metal layer are in a solid fusion state. 9. The p-type ZnO-based single crystal has a laminated structure in which ZnO layers and ZnTe layers are alternately laminated, and at least the ZnTe layers are N-doped. The semiconductor element according to any one of 1. 10. The semiconductor device according to claim 1, wherein the p-type ZnO-based single crystal is co-doped with a p-type impurity and an n-type impurity. 11. The semiconductor device according to claim 10, wherein the p-type impurity is N and the n-type impurity is Ga. 12. A step of preparing a p-type ZnO-based single crystal layer having an exposed surface, and Ni, Rh, P on the surface of the p-type ZnO-based single crystal layer.
t, Pd, and a step of forming a first metal layer containing at least one selected from the group of these alloys, and a step of forming a second metal layer on the first metal layer.
If the first metal layer is Ni, the second metal layer is A
At least one of u, Rh, Pt, Pd, and Ir is included.
A step of forming in metal-free layer, the first case the metal layer is Rh, the second metal layer is Au
And the first metal layer is Pt, the second metal layer is R.
It is formed of a metal layer containing at least one of h and Au.
A step, wherein if the first metal layer is of Pd, the second metal layer is Au
And the second metal layer is R when the first metal layer is Ir.
Formed by a metal layer containing at least one of h, Au, and Pd
A method of manufacturing a semiconductor element, which is a step of forming . 13. A step of preparing a p-type ZnO-based single crystal layer having an exposed surface, and a work function of 4. on the surface of the p-type ZnO-based single crystal layer.
A step of forming a first metal layer containing a metal of 9 to 5.2 eV; and a step of forming a second metal layer on the first metal layer, wherein the second metal layer is the first metal A when the layer is Ni
When the first metal layer is a metal layer containing at least one of u, Rh, and Pd, and the first metal layer is a metal other than Ni, the work function is 4.9 to 5.2 eV, and the work function is the first layer. A method of manufacturing a semiconductor element, which is a metal layer having a work function lower than that of the metal layer and different from the metal forming the first metal layer or an alloy containing these metals. 14. The method according to claim 12, further comprising a step of performing heat treatment after the step of forming the first and second metal layers.
A method of manufacturing a semiconductor device according to item 1. 15. A first semiconductor including a substrate, a ZnO-based buffer layer formed on the substrate, and a first-conductivity-type or second-conductivity-type ZnO-based single crystal layer formed on the ZnO-based buffer layer. A second semiconductor layer formed on the first conductivity type or the second conductivity type ZnO-based single crystal layer and having a conductivity type opposite to that of the first conductivity type or the second conductivity type ZnO-based single crystal layer. A first metal layer which is in contact with a p-type semiconductor layer of the first semiconductor layer or the second semiconductor layer and contains at least one selected from the group consisting of Ni, Rh, Pt, Pd and alloys thereof. And a second metal layer formed on the first metal layer, wherein the second metal layer is A when the first metal layer is Ni.
At least one of u, Rh, Pt, Pd, and Ir is included.
A metal-free layer, the first case the metal layer is Rh, the second metal layer is Au
A metal layer containing the case of the first metal layer is Pt, year second metal layer R
h, a metal layer containing one to as least one of Au, the first case the metal layer is of Pd, the second metal layer is Au
A metal layer containing the case of the first metal layer is Ir, said second metal layer R
A metal layer containing at least one of h, Au, and Pd.
Semiconductor element that. 16. A substrate, a ZnO-based buffer layer formed on the substrate, and a ZnO-based single crystal layer of a first conductivity type or a second conductivity type formed on the ZnO-based buffer layer. A second semiconductor layer formed on the first semiconductor layer and the first or second conductivity type ZnO-based single crystal layer and having a conductivity type opposite to that of the first or second conductivity type ZnO-based single crystal layer; A first metal layer including a semiconductor layer, being in contact with a p-type semiconductor layer of the first semiconductor layer or the second semiconductor layer, and including a metal having a work function of 4.9 to 5.2 eV; A second metal layer formed on the first metal layer,
When the first metal layer is Ni, Au, Rh, Pt, P
When the first metal layer is a metal layer containing at least one of d and Ir, and the first metal layer is a metal other than Ni, the work function is 4.9 to 5.2 eV and forms the first metal layer. A second metal layer, which is a metal layer made of a metal different from the metal or an alloy containing these metals, and a work function formed on the second metal layer and having a work function higher than that of the first metal layer. A semiconductor device including a surface metal layer made of a low metal. 17. A substrate, a ZnO-based buffer layer formed on the substrate, an n-type ZnO-based single crystal layer formed on the ZnO-based buffer layer, and an n-type ZnO-based single crystal layer on the substrate. The formed p-type ZnO-based single crystal layer, the first electrode that contacts the n-type ZnO-based single crystal layer, and the p-type ZnO-based single crystal layer that contacts Ni, Rh, P
a second electrode including a first metal layer containing at least one selected from the group consisting of t, Pd and alloys thereof, and a second metal layer formed on the first metal layer; An electrode and / or an opening formed in the second electrode, wherein the second metal layer is Au, Rh, Pt, or P when the first metal layer is Ni.
a metal layer containing at least one of d and Ir, a metal layer containing Au when the first metal layer is Rh, and a metal layer containing Rh and Au when the first metal layer is Pt. When the first metal layer is Pd, it is a metal layer containing Au, and when the first metal layer is Ir, at least one of Rh, Au, and Pd. An optical semiconductor device which is a metal layer containing. 18. A substrate, a ZnO-based buffer layer formed on the substrate, an n-type ZnO-based single crystal layer formed on the ZnO-based buffer layer, and an n-type ZnO-based single crystal layer on the ZnO-based single crystal layer. The formed p-type ZnO-based single crystal layer, the first electrode that contacts the n-type ZnO-based single crystal layer, and the p-type ZnO-based single crystal layer that has a work function of 4.9.
A first metal layer containing a metal of ˜5.2 eV and a second metal layer formed on the first metal layer, wherein Au, Rh, Pt, Pd when the first metal layer is Ni. , Ir at least one of which is a metal layer, and the first metal layer is a metal other than Ni, the work function is 4.9 to 5.2e.
V, a second metal layer which is a metal layer made of a metal different from the metal forming the first metal layer or an alloy containing these metals, and a work function formed on the second metal layer. An optical semiconductor device comprising: a second electrode including a surface metal layer made of a metal having a work function lower than that of the first metal layer; and openings formed in the first electrode and the second electrode. 19. The substrate is a transparent substrate, and a reflective electrode for reflecting light emitted from the opening toward the substrate is provided on the opening.
8. The optical semiconductor device according to item 8. 20. Further, a reflecting portion for reflecting light traveling toward the substrate is provided on the back surface side of the substrate, and the first electrode and the second electrode are provided on the front surface side of the substrate.
The optical semiconductor element according to claim 17 or 18, wherein a second transparent substrate having a first wiring portion and a second wiring portion which are in electrical contact with the electrodes are arranged.