JPH0356940A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To obtain an excellent image whether a temperature is high or low by connecting 1st and 2nd gate electrodes to 1st and 2nd scanning signal lines which are provided to every picture element train. CONSTITUTION:The 1st and the 2nd scanning signal lines GL1 and GL2 are provided to every picture element train and the 1st and the 2nd gate electrodes GT1 and GT2 are connected to the 1st and the 2nd signal lines GL1 and GL2. Therefore, the ratio of the channel width to the channel length of a thin film transistor gets large at the time of transmitting a scanning signal to the 1st and the 2nd signal lines GL1 and GL2, so that faulty write in a picture element electrode does not occur by transmitting the scanning signal to the 1st and the 2nd signal lines GL1 and GL2 when the temperature is low. Meanwhile, the ratio of the channel width to the channel length of the thin film transistor gets small and dropping quantity of a video signal caused by parasitic capacity becomes small at the time of transmitting the scanning signal only to the 1st signal line GL1, so that the unevenness of black does not occur by transmitting the scanning signal only to the 1st video signal line GL1 when the temperature is high. Thus, the excellent image is obtained whether the temperature is high or low.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device, and particularly to an active matrix type liquid crystal display device using thin film transistors and the like. [Prior Art] An active matrix type liquid crystal display device is one in which a nonlinear element (switching element) is provided corresponding to each of a plurality of pixel electrodes arranged in a matrix. Theoretically, the liquid crystal in each pixel is constantly driven (duty ratio 1.0), so compared to the so-called simple matrix input method, which uses a 5-time division driving method, the active method has better contrast, especially in color. It is becoming an indispensable technology. A typical switching element is a thin film transistor (TPT). In a conventional active matrix type liquid crystal display device, one scanning signal line is provided for each pixel column. Note that an active matrix liquid crystal display device using thin film transistors is described in, for example, "12.5-inch active matrix color liquid crystal display with redundant configuration," Nikkei Electronics, pp. 193-2.
10, December 15, 1986, published by Nikkei McGraw-Hill. Problem to be Solved by the Invention 1 However, in such a liquid crystal display device, the ratio between the channel width and the channel length of the thin film transistor is too small at low temperatures, resulting in poor writing to the pixel electrode; Since the ratio of channel width to channel length is too large, black unevenness occurs. This invention was made to solve the above-mentioned problems, and an object thereof is to provide a liquid crystal display device that can obtain good images regardless of temperature. [Means for Solving the Problem 1] In order to achieve this object, in the present invention, in an active matrix type liquid crystal display device in which a thin film transistor and a pixel electrode are one element of the pixel structure, First and second scanning signal lines are provided for the first and second scanning signal lines.
, the first and second gate fI1 poles are connected to the second scanning signal line. [Function] In this liquid crystal display device, for each pixel column, the first
A second scanning signal line is provided, and the first and second gate electrodes are connected to the first and second scanning signal lines.
When a scanning signal is sent to the first scanning signal line, the ratio of the channel width to the channel length of the thin film transistor becomes large.On the other hand, when the scanning signal is sent only to the first scanning signal line, the ratio of the channel width to the channel length of the thin film transistor increases. , and the amount of drop in the video signal due to parasitic capacitance is also reduced. [Example] An active matrix color liquid crystal display device to which the present invention is applied will be described below. Note that, in an attempt to explain the liquid crystal display device, parts having the same functions are given the same reference numerals, and repeated explanation thereof will be omitted. FIG. 2A is a plan view showing one pixel and its surroundings of an active matrix color liquid crystal display device to which the present invention is applied, and FIG. 2B is a cross section taken along the line IIB-■B in FIG. 2A and a seal on the display panel. FIG. 2C is a cross-sectional view taken along the section line ■C--C of FIG. 2A. Moreover, FIG. 3 (main part plan view) shows a plan view when a plurality of pixels shown in FIG. 2A are arranged. <Pixel Arrangement> As shown in Figure 2A, each pixel is connected to two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (drain signal lines or vertical signal lines). line) DL (in the area surrounded by four signal lines). Each pixel is a thin film transistor TPT, transparent pixel @ polar ITO
I and a storage capacitor element C add. Scanning signal line G
L extends in the column direction, and a plurality of L's are arranged in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction. <<Overall cross-sectional structure of display section>> As shown in FIG. 2B, a thin film transistor TPT and a transparent pixel electrode IT○1 are formed on the lower transparent glass substrate SUBI side with respect to the liquid crystal LC, and the upper transparent glass substrate S
On the UB2 side, a color filter FIL and a light shielding film BM having a black matrix pattern for shielding light are formed. The lower transparent glass substrate SUBI is, for example, 1. 1
The thickness is approximately [+nm]. The central part of Figure 2B shows a cross section of one pixel,
On the left is a transparent glass substrate SUBI. The left side of SUB2 shows a cross section of the part where external lead wiring exists, and the right side shows the cross section of the right edge part of transparent glass substrates SUB1 and SUB2 where external lead wiring does not exist. The sealing material SL shown on the left and right sides of FIG. 2B is configured to seal the liquid crystal LC, and the transparent glass substrates SUBI and S, excluding the liquid crystal sealing opening (not shown), are arranged to seal the liquid crystal LC.
It is shaped along the entire edge of UB2. The sealing material SL is made of, for example, epoxy resin. Common transparent pixel electrode IT on the upper transparent glass substrate SUBZ side
O2 is supplied to the silver paste material SI at least in one place.
It is connected by L to an external lead wiring formed on the lower transparent glass substrate SUBI side. This external lead wiring is the gate electrode GT. Source electrode SDI. drain electrode SD
It is formed using the same manufacturing process as each of the two. - Orientation films ORII, ORI2, transparent pixel electrode ITO1, common transparent pixel electrode IT○2, maintenance! ! Membrane psv1, PSV2
, the respective layers of the insulating film GI are formed inside the sealing material SL. Polarizing plates POL1 and POL2 are respectively a lower transparent glass substrate SUBI and an upper transparent glass substrate SUB2.
shaped on the outer surface of the Liquid crystal LC uses a thousand parts alignment film ORI to set the orientation of liquid crystal molecules.
I and the upper alignment film ORI2, and the seal part S
It is sealed by L. The lower alignment film ORII is formed on the protective film PSVI on the lower transparent glass substrate SUB1 side. The inner surface (liquid crystal LC side) of the upper transparent glass substrate SUB2 is provided with a light shielding film BM, a color filter FIL, and a protective film P.
SV2, a common transparent pixel electrode tiIT○2 (COM), and an upper alignment film ORI2 are sequentially laminated. In this liquid crystal display device, the layers on the lower transparent glass substrate SUBl side and the upper transparent glass substrate SUB2 side are formed separately, and then the upper and lower transparent glass substrates SUBI. It is assembled by overlapping the SUB2 and filling the liquid crystal LC between them. <Thin Film Transistor TFT> The thin film transistor TPT operates such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and drain becomes small, and when the bias is reduced to zero, the channel resistance becomes large. The thin film transistor TPT of each pixel has three
It is divided into two (plurality) of thin film transistors (divided thin film transistors) TFTI, TFT2, and TFT3. Each of the U-film transistors TPT1 to TFT3 has substantially the same size (channel length and width are the same). Each of the divided thin film transistors TPTI to TFT3 mainly has a gate electrode GT.
, gate insulating film GI, i type (intrinsi
c. It consists of an i-type semiconductor layer AS made of non-quality silicon (Si) (not doped with conductivity type determining impurities), a pair of source electrodes SDI, and a drain electrode +mSD2. Note that the Sodes train is determined by the bias polarity between the two, and in this liquid crystal display circuit, the polarity is reversed during operation, so it should be understood that the source and drain are interchanged during operation. However, in the following description as well, for convenience, one side is fixed as a source and the other side is fixed as a drain. <Gate electrode GT> The gate electrode GT is the first conductive film g1 in FIG. 4 (FIG. 2A,
As shown in detail in the plan view depicting only the second conductive film g2 and the i-type semiconductor layer AS, the structure has a shape that protrudes vertically from the scanning signal line OL (upward in FIGS. 2A and 4). (branched into a T-shape). Gate electrode GT is thin film transistor TPTI~TFT3
It is constructed so that it protrudes to the respective formation areas. ? The gate electrodes GT of each of the J membrane transistors TPTI to TFT3 are integrated (as a common gate electrode).
It is configured to be continuous with the scanning signal line OL. The gate electrode GT is composed of a single-layer first conductive film g1 so as not to form a large step in a certain region of the thin film transistor TPT. The first conductive film g1 is, for example, a chromium (Cr) film formed by sputtering,
0 [Form with a film thickness comparable to that of a human. As shown in FIGS. 2A, 2B, and 4, this gate electrode GT is formed to be thicker than the i-type semiconductor MAS so as to completely cover it (as viewed from below). Therefore, when a backlight BL such as a fluorescent lamp is attached below the lower transparent glass substrate SUBI, the gate electrode GT made of opaque chrome forms a shadow, and the backlight light does not shine on the i-type semiconductor IAS. The 1115% conductivity phenomenon, that is, deterioration of the off-characteristics of the thin film transistor TPT due to light irradiation becomes less likely to occur. Note that the original size of the gate electrode GT is the same as that of the source electrode SDI and the drain electrode SD2.
(including the alignment margin between the gate electrode GT, the source electrode tmsD1, and the drain electrode SD2), and the depth length that determines the channel width W is the minimum width required to straddle between the source electrode SDI and the source electrode SDI. Drain electrode SD2
It is determined by the factor W/L that determines the ratio between the distance (channel length) L, that is, the mutual conductance gm. The size of the gate electrode GT in this liquid crystal display device 1 is, of course, made larger than the original size mentioned above. Note that if we consider only from the gate and light shielding function of the gate electrode GT, the gate electrode GT and the scanning signal line GL
may be integrally formed in a single layer, in which case the opaque i
Aluminum (Al) containing silicon is used as an electrical material.
), pure aluminum, aluminum containing palladium (Pd), etc. can be selected. <<Scanning Signal Line GL>> The scanning signal line OL is composed of a composite film including a first conductive film g1 and a second conductive film g2 provided on the first conductive film g1. The t-th conductive film g1 of this scanning signal line OL is the gate electrode G
It is formed in the same manufacturing process as the first conductive film g1 of T, and is configured integrally. The second conductive film g2 is formed using, for example, an aluminum film formed by sputtering, and has a film thickness of approximately 000 to 5500 mm. The second conductive film g2 is designed to reduce the resistance value of the scanning signal line GL and increase the signal transmission speed (improve the writing characteristics of pixel information). Furthermore, the width of the second conductive film g2 of the scanning signal line GL is configured to be smaller than the convergence dimension of the first conductive film g1. That is, the side wall of the scanning signal line GL has a gradual step shape. <Insulating film GI> i-color edge film GI: i-film transistors TPTI to TFT3
It is used as a gate insulating film for each. The isolation B film GI is formed in the upper layer of the gate electrode GT and the scanning signal line GL. at> film GI is a silicon nitride film formed by plasma CVD, for example, and
Formed with a film thickness of approximately <J-Type Semiconductor Layer AS> As shown in FIG. 4, the i-type semiconductor/QAS is used as a channel type region of each of the plurality of thin film transistors TPTI to TFT3. i type semiconductor y
! The JAs is formed of a non-quality silicon film or a polycrystalline silicon film, and is formed with a film thickness of about 1.800 mm. This i-type semiconductor layer AS is made of Si by changing the amount of supplied gas.
Following the formation of the insulating film GI, which is made of 3N4 and is used as the gate #@edge film, it is formed in the same plasma CVD apparatus without being exposed to the outside from the plasma CVD apparatus. Further, a P-doped N1 type semiconductor layer do (FIG. 2B) for ohmic contact is similarly continuously formed to a thickness of about 40 mm. Thereafter, the lower transparent glass substrate SUBI is taken out from the CVD apparatus, and N+ type semiconductor layers do and i are formed using photo processing technology.
The type semiconductor WjAS is patterned into independent islands as shown in FIGS. 2A, 2B, and 4. As shown in detail in FIGS. 2A and 4, the I-type semi-JI layer AS is also provided between the intersection of the scanning signal line OL and the video signal line DL (crossover section). . The i-type semiconductor layer AS at this intersection is configured to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection. <<Source electrode SDI, drain electrode SD2> The source electrode SDI and drain electrode SD2 of each of the thin film transistors TPTI to TFT3 divided into a plurality of
As shown in detail in FIGS. 2B, 2B, and 5 (a plan view depicting only the first to third conductive films d1 to d3 in FIG. 2A), they are provided separately on the i-type semiconductor layer AS. It is being Each of the source electrode SDI and drain electrode SD2 is
A first conductive film d1, a second conductive film d2, and a third conductive film d3 are sequentially stacked one on top of the other from the lower layer side in contact with the N+ type semiconductor layer dO. First conductive film d of source electrode SDI
1. The second conductive film d2 and the third conductive film d3 are formed in the same manufacturing process as the first conductive film d1, second conductive film 11id2, and third conductive film d3 of the drain electrode SD2. The first conductive film d1 is a chromium film formed by sputtering,
The film thickness is 500 to 1000 [in] (in this liquid crystal display device, the film thickness is about 600 [in]). The thicker the chromium film is, the greater the stress will be, so
Shape within a range that does not exceed a film thickness of about 0 [A]. The chromium film has good contact with the N+ type semiconductor layer do. In the chromium film, does aluminum of the second conductive film d2, which will be described later, diffuse into the N+ type semiconductor layer do? The so-called Paris 7 layer 4+i is formed to prevent this. As the first conductive film d1, in addition to the chromium film, a high melting point metal (
Mo. Ti. Ta. W) film, high melting point metal silicide (M
It may also be formed of an oSi2, TiSi2, TaSi2, WSi2) film. After patterning the first conductive film d1 by photo processing, the N+ type semiconductor J1 and dO are removed using the same photo processing mask or using the first conductive film d1 as a mask. In other words, the portion of the N+ type semiconductor NdO remaining on the i-type semiconductor layer As except for the first conductive film d1 is removed by the self-alignment process.6 At this time, the entire thickness of the N+ type semiconductor layer do is removed. Since the i-type semiconductor layer AS is etched to a certain extent, the surface portion of the i-type semiconductor layer AS is also slightly etched, but the degree of etching can be controlled by the etching time. Thereafter, the second conductive film d2 is formed by sputtering aluminum to a thickness of 3000 to 55 (10 [λ] (in this liquid crystal display device, a film thickness of about 3500 [lambda]). The aluminum film is made of chromium. The stress on the film is small compared to κ, and it is possible to form a thick film, making it possible to create a film with a large thickness.
1. It is designed to reduce the resistance values of the train electrode SD2 and the video signal line DL. The second conductive film d2 may be formed of an aluminum film containing silicon or copper (Cu) as an additive instead of an aluminum film. After patterning the second conductive film d2 using photo processing technology,
A third conductive film d3 is formed. This third conductive film d3 is a transparent conductive film (Induim-
Tin-Oxide I T○: consists of
1000-2000 [Input film thickness (this liquid crystal display'!A
7l, it is formed with a film thickness of about 1200 [A]). This third conductive film d3 constitutes the source electrode SD↓, the drain electrode SD2, and the video signal line DL, and also constitutes the transparent pixel electrode IT○1. lth conductive film d1 of source electrode SDI, drain electrode SD
Each of the second conductive films d1 is a second conductive film d1 which is an upper layer of the second conductive film d1.
The conductive film d2 and the third conductive film d3 are largely inward (into the channel region). In other words, the first conductive film d1 in these parts has a gate length L of the thin film transistor TPT, regardless of the second conductive film d2 and the third conductive film d3.
It is structured so that it can be specified. The source electrode SDI is connected to the transparent pixel electrode ITOI. The source electrode SDI has a step shape of the i-type semiconductor IAs (a step corresponding to the sum of the thickness of the first conductive film g1, the thickness of the N+ type semiconductor layer dO, and the thickness of the i-type semiconductor layer AS). It is constructed along the Specifically, the source electrode SD1 is connected to a first conductive film d1 formed along the step shape of the i-type semiconductor layer AS, and a transparent pixel electrode ITOI on the upper part of the first conductive film d1. A second conductive film d2 whose side is smaller in size, and a third conductive film d1 connected to the first conductive film d1 exposed from the second conductive film d2.
It is composed of a conductor 1j[d3. The second conductive film d2 of the source electrode SDI is the lth conductive film clL.
Since the chromium film cannot be made thick due to increased stress and cannot overcome the stepped shape of the i-type semiconductor layer AS, it is configured to overcome the i-type semiconductor layer AS. In other words, the stepping force barrier is improved by forming the second conductive film d2 thickly. Since the second conductive film d2 can be formed thickly, it greatly contributes to reducing the resistance value of the source electrode SDI (the same applies to the drain electrode SD2 and the video signal line DL). Since the third conductive film d3 cannot overcome the step shape caused by the i-type semiconductor layer AS of the second conductive film d2, by reducing the size of the second conductive film d2, the exposed first conductive film d1 is is configured to connect. The first conductive film dl and the third conductive film d3 not only have good adhesion, but also have a small step shape at the connection between them, so that the source electrode SDI and the transparent pixel electrode ITO
can be reliably connected. <<Transparent Pixel Electrode IT○1>> The transparent pixel electrode ITO1 is provided for each pixel and constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITOI has three transparent pixel electrodes corresponding to each of the thin film transistors TPTI to TFT3 divided into plural parts of the pixel.
Two divided transparent pixels f! It is divided into one pole E1, E2, and E3. The divided transparent pixel electrodes E1 to E3 are each connected to the source electrode SDI of the screen transistor TPT. Each of the divided transparent pixel electrodes E1 to E3 is patterned to have substantially the same area. In this way, the thin film transistor TPT of one pixel is divided into a plurality of thin film transistors TPT1 to TFT3,
The thin film transistors TPTI to TF divided into a plurality of
By connecting each of the divided transparent pixel electrodes +mE1 to E3 to each of T3, even if a divided part (for example, }''Jt film transistor TFTI) becomes a point defect, it is no longer a point defect when looking at the entire pixel. (Thin film transistor TFT2 and thin film transistor TFT3 are not defective.) Therefore, the probability of point defects can be reduced and the defect can be made difficult to see.In addition, each of the divided transparent pixel electrodes E1 to E3 can be formed with substantially the same area. By configuring the divided transparent pixel electrode E
It is possible to make the respective liquid crystal capacitances Cρix made uniform by each of the electrodes 1 to E3 and the common transparent pixel electrode IT○2. <<Protective Film PSV1>> A protective film PSV↓ is provided over the thin film transistor TPT and the transparent pixel electrode T○1. The protective film PSVI is formed mainly to protect the thin film transistor TPT from moisture, etc., and a film with high transparency and good moisture resistance is used. The protective film PSVI is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and is formed to have a thickness of about 80QO[λ]. <<Light-shielding film BM>> A shielding film BM is provided on the upper transparent glass substrate SUB2 side to prevent external light (light from above in FIG. 2B) from entering the i-type semiconductor WAS used as the channel-forming region.
is provided, and the shielding film BM has a pattern as shown by hatching in FIG. Note that FIG. 6 is a plan view depicting only the third conductive film d3 made of the IT◯ film, the color filter FIL, and the light shielding film BM in FIG. 2A. The light shielding film BM is formed of, for example, an aluminum film or a chromium film having a high light shielding property, and in this liquid crystal display device, the chromium film is formed by sputtering to a film thickness of about 1300[lambda]. Therefore, i of thin film transistors TFT1 to TFT3
type semiconductor/ffAs has upper and lower light shielding films BM and a thick gate M. It is sandwiched by the pole GT, and that part is not exposed to external natural light or backlight light. The light shielding film BM is formed around the pixel as shown by the hatched area in FIG. There is. Therefore, the outline of each pixel becomes clear due to the light shielding film BM, and the contrast is improved. In other words, the light shielding film BM is an i-type semiconductor WJAS.
It has two functions: light shielding and black matrix. Note that the backlight can be attached to the upper transparent glass substrate SUB2 side, and the lower transparent glass substrate SUBl can be set as the rA detection side (externally exposed side). <<Common transparent pixel electrode IT○2>> The common transparent pixel electrode IT○2 is connected to the lower transparent glass substrate SU
Opposed to the transparent pixel electrode IT○1 provided for each pixel on the BI side, the optical state of the liquid crystal LC changes in response to the potential difference (electric field) between each pixel electrode IT01 and the common transparent pixel electrode ITO2. do. A common voltage Vcom is applied to this common transparent pixel electrode rTO2. The common voltage vcOIa is the same as the low level opening voltage V d min applied to the video signal line DL and the high level!
It is an intermediate potential with the IJ voltage V d wax. <Color Filter FIL> The color filter FIL is constructed by applying a dye to a dyed base material formed from a resin material such as acrylic resin. The color filter FIL is shaped like a dot for each pixel at a position facing the pixel (Figure 7), and is dyed differently.
Figure 7 shows the third conductive film ld3 and color filter F in Figure 3.
It depicts only IL, R. G. Each color filter FIL in B is 45'', 135', and cross-hatched, respectively).The color filter FIL covers all of the transparent pixels Ryukoku ITOI (El- to E3) as shown in Figure 6. The light shielding film BM is formed inward from the surrounding area of the transparent pixel electrode ■T○1 so as to overlap with the edge portion of the color filter FIL and the transparent pixel Rt=nIT○1.Color filter FIL can be formed as follows. First, a dyed base material is formed on the surface of the upper transparent glass substrate SUB2, and the dyed base material other than a certain area in the red filter shape is removed using photolithography technology. After this, The dyed base material is dyed with a red dye and subjected to a fixation treatment to form a red filter R. Next, by performing the same process, a green filter G and a blue filter B are sequentially formed. <<Protective film PSV2 )) The protective film PSV2 is provided to prevent the dyes used to dye the color filter FIL into different colors from leaking into the liquid crystal LC.The protective film PSV2 is made of a transparent resin material such as acrylic resin or epoxy resin. <Pixel Arrangement> As shown in FIGS. 3 and 7, a plurality of pixels of the liquid crystal display section are arranged in the same column direction as the direction in which the scanning signal line GL extends. Each pixel column Xi, X2, X3, etc.
Each pixel of X4,... is a thin film transistor T
The FTI-TFT 3 and the divided transparent pixel electrodes E1 to E3 are arranged in the same position. In other words, odd pixel row
In each of the pixels i, X3, . . . , the thin film transistors TPT1 to TFT3 are arranged on the left side, and the divided transparent pixel electrodes E1 to E3 are arranged on the right side. Each pixel in the even numbered pixel columns X2, X4, . . . adjacent to each of the odd numbered pixel columns Xi, X3, . Each of the pixels 1, X3, . That is, pixel column X2
, X4,... each pixel is a capillary transistor T
The arrangement position of PTI~TFT3 is on the right side, transparent pixel electrode E1
~ E3 is arranged on the left side 6 And each pixel of pixel rows X2, X4, ... is arranged in pixel row XI
, X3, . . . are shifted (shifted) by half a pixel in the column direction. In other words, each pixel interval of pixel row X is]. ．． O (1.0 pitch), the next pixel row
0.5 pitch) shifted. The video signal line DL extending in the row direction between each pixel is configured to extend in the column direction by a half pixel interval (0.5 pitch) between each pixel column X. As a result, as shown in FIG. 7, a pixel formed with a predetermined color filter in the previous pixel row pixels (for example, pixel row X
4) are spaced apart by 1.5 pixels (1.5 pitch), and the RGB color filters IL are arranged in a triangle. Color filter F
The triangular arrangement structure of RGB of IL can improve the color mixing of each color, so that the resolution of a color image can be improved. Further, since the video signal line DL extends in the column direction by only a half pixel interval between each pixel column X, it does not intersect with the adjacent video signal IDL. Therefore, video signal line D
It is possible to eliminate the routing of L and reduce its occupied area, and it is also possible to eliminate the detour of the video signal line DL and eliminate the multilayer wiring structure. <<Equivalent circuit of entire display device>> The equivalent circuit of this liquid crystal display device is shown in FIG. XiG, Xi+IG, . . . are video signals vADL connected to the pixels on which the green filter G is shaped. XiB, Xi+IB, . is a video signal line DL connected to the pixel in which the blue filter B is formed. Xi+IR, Xi+2R, . . . are video signal lines DL connected to the pixels in which the red filter R is formed. These video signal lines DL are selected by a video signal transition circuit. Yi is a scanning signal line GL that selects the pixel column X1 shown in FIGS. 3 and 7. Similarly, each of Yi+l, Yi+2, . . . is a running signal line GL that selects each of the pixel columns X2, X3, . These scanning signal lines GL are connected to a rectangular scanning circuit. <<Structure of storage capacitance element C add>> Each of the divided transparent pixels ffl+ME1 to E3 is connected to the adjacent scanning signal at the end opposite to the end connected to the diaphragm transistor TPT. fAGI. L so that it overlaps with
It is bent and shaped like a letter. As is clear from FIG. 2C, this superposition is caused by the divided transparent pixel electrodes E1 to
Each of E3 is used as one electrode PL2, and the adjacent scanning signal line a[. 2, the other ' constitutes a holding capacitor element (electrostatic capacitor element) Cadd, which is the pole P L 1. The hyperelectric film of this storage capacitance element C add is a thin film transistor T
It is made of the same layer as the insulating film GI used as the gate insulating film of the PT. As is clear from FIG. 4, the storage capacitor element Cadd is formed in the widened portion of the first conductive film g1 of the gate line OL. Note that the ① conductive film GL at the portion intersecting with the video signal IDL is designed to reduce the probability of short circuit with the video signal line DL. IB< has been done. Each of the divided transparent pixel voltages t4El to E3 and the voltage ÷MP which are superimposed to form the storage capacitor C add
Similar to the source electrode 1-isD1, a first conductive film d1 and a second conductive film d are provided in a part between the source electrode 1 and LL to prevent the transparent pixel's electrode ITOI from being disconnected when going over the step shape.
There is an island area organized by 2. This island region is designed to be as small as possible so as not to reduce the area (aperture ratio) of the transparent pixel electrode ITOl. <<Equivalent circuit of storage capacitor element C add and its operation>> 2nd
FIG. 9 shows an equivalent circuit of the pixel shown in FIG. In FIG. 9, Cgs is a parasitic capacitance formed between the gate electrode GT of the thin film transistor TPT and the source voltage tiSD1. The parasitic ncgs' flood body membrane is! ! !
It is a gingival GI. C pix is transparent pixel electrode ITOI
(PIX) and common transparent pixel electrode I T○2 (COM)
This is the liquid crystal capacity that is expressed between the two. Liquid crystal capacity C pi
The dielectric films x are a liquid crystal LC, a protective film PSVI, and alignment films ○Rll and ORI2. v1c is the midpoint potential. The storage capacitor element C add has a midpoint potential (pixel electrode potential) Vi when the thin film transistor TPT switches.
It works to reduce the influence of gate potential change Δ■g on e. This spacer can be expressed as an equation as shown below. ΔV lc= (C gs/(C gs+C add+
c pix)) XΔVg Here, ΔVlc represents the change in midpoint potential due to ΔVg. This change Δvlc causes a certain amount of direct current applied to the liquid crystal LC, but the holding capacity ff
The larger icadd is, the smaller its value can be. In addition, a storage capacitor element C. ] dd also has the effect of lengthening the discharge time, so that video information is stored for a long time after the thin film transistor TPT is turned off. A certain reduction in the direct current applied to the liquid crystal LC can improve the life of the liquid crystal LC and reduce so-called burn-in, in which the previous image remains when switching liquid crystal display screens. As mentioned above, the gate XTit , the opposite effect occurs that the midpoint potential Vlc becomes more susceptible to the influence of the gate (scanning) signal Vg.However, the storage capacitance element C
By providing add, this disadvantage 1- can also be solved by Solution 7}
1 can be done. The storage capacitance of the storage capacitor element C add is 4 to 8 times (4・C
pix<C add<8・C pix). 8 to 32 times (8 ・C g
Set to a value of approximately s<C add<32・C gs). <How to connect the holding capacitance M element C add electrode wire> The final stage scanning signal line GL (or the first stage scanning signal line OL) used only as a capacitive voltage line is a common wire as shown in FIG. Connect to transparent pixel voltage T○2 (Vcom). Common transparent pixel YX. As shown in FIG. 2B, the pole I T 02 is connected to the external wiring at the periphery of the liquid crystal display device by means of a silver paste material SL. Moreover,
A part of the external lead wiring fflFd (g1 and g2) is constructed in the same -10 process as the scanning signal line GL. As a result, the final stage scanning signal line (capacitive electrode line) GL can be easily connected to the common transparent pixel electrode T T O 2 . Alternatively, as shown by the dotted line in FIG. 8, the final stage (first stage) scanning signal line (fu horizontal line) GL may be connected to the first stage (final stage) scanning signal line GL. Note that this connection can be made by internal wiring within the liquid crystal display section or external wiring. Figure 1○ shows the voltage waveform VY of the scanning signal line GL;
, ■Y1 and video signal line D L (7) m Pressure waveform VX
The midpoint potential (pixel electrode potential) Vlc in case of i is shown. Since the VY;-1 waveform enters through the storage capacitance element C add, the midpoint potential Vlc changes once greatly. However, since the thin film transistor TPT is turned on by the VYi waveform, writing starts from this point. The DC voltage applied to the liquid crystal LC is ΔV1. Indicated by c. It is important to reduce this ΔVlc. FIG. IA is a schematic plan view showing a part of the liquid crystal display section of an active matrix type color liquid crystal display device according to the present invention, FIG. IB is a schematic view showing 15 sections of scanning signal lines, and FIG. is a waveform diagram showing scanning (iE). In the figure, GLI.OL2 is the first and second scanning signal line provided for each pixel column, and GTI.GT2 is connected to the scanning signal line GLI.GL2. first and second gate electrodes,
PLII is an electrode of the storage capacitive element Cadd connected to the scanning signal line GLI, and g11 is the scanning signal % line GL1, the gate electrode GTI, a part of the scanning signal line GL2, the gate electrode GT2, and the electrode PLII. The conductive film GLL is provided on the lower transparent glass SUBI. gl2 is a conductor that forms part of the scanning signal line GL2. l
In the i-film, the conductive film gl2 is provided on the Itoirobayashi l1ΔG structure. T H is a through hole provided in the 2S47 film GI, and the conductive film gll and the conductive/electric film gl2 are connected at the through hole TH portion. ASI and AS2 are gate electrodes GTI. i-type semiconductor layer provided above GT2.
SD11 and SDl2 are source electrodes provided corresponding to the i-type semiconductor layers ASI and AS2. SD21 and SD22 are i
1-rain electrode provided corresponding to type semiconductor layers ASI, AS2, gate electrodes GTI, GT2, i-type semiconductor layers Ask, AS2, source electrode SDI. 1, SD↓
2. D-film transistors TFT11 and TFT12 are configured with drain electrodes SD21 and SD22. GD↓, GD2 are scanning signal lines GLI, GL2
This is a gate driver that sends out a scanning signal as shown in FIG. 1C. In this liquid crystal display device, gate driver GDI.
From GD2 to scanning signal line GLI. When a scanning signal is sent to GL2, the thin film transistors TFT11 and TFT12 operate, so that the actual ratio W/L of channel width to channel length increases. Therefore, if scanning signals are sent to the scanning signal lines GLI and GL2 at low temperatures, writing defects to the pixel electrodes will not occur. On the other hand, a scanning signal is sent from gate driver GD1 to scanning signal line GLI1'
And if the scanning signal is not sent from the gate driver GD2 to the scanning signal line GL2 (if -20V is applied to the scanning signal 1!IfAar-2), what? T-film transistor TFTl
Since only 1 operates, the actual W/L becomes small. In addition, the parasitic capacitance due to the overlapping of the gate electrode GTI and the source electrode SDI1 is C4sl, and the gate electrode GT2
and source power rfi. Assuming that the parasitic capacitance due to the superposition with SD12 is &cgs2, the amount of drop in the video signal Δ■1 due to the parasitic capacitance when the scanning signals are sent to the scanning signal lines GLI and GL2 is expressed by the following equation. On the other hand, when the scanning signal is sent only to the scanning signal line GLI, the amount of drop ΔV2 in the video signal due to the parasitic capacitance is expressed by the following equation. ? Therefore, since the drop amount Δ■2 is smaller than the drop amount Δ■1, if the scanning signal is sent only to the scanning signal line GLI, the drop in the video signal can be reduced. In this way, if the scanning signal is sent only to the scanning signal line GLI, the actual W/L becomes smaller and the image C'll (N
Therefore, if the scanning signal is sent only to the scanning signal line GLI when the temperature is high, dark spots will not occur. Therefore, good images can be obtained regardless of temperature. As above, the invention made by the present inventor has been specifically explained based on the above embodiments, but this invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course. For example, in the above embodiments, an inverted staggered structure is shown in which the gate electrode is formed → gate insulating film type, → semiconductor layer type, → source/drain electrode type, etc. However, a staggered structure in which the vertical relationship or the order of formation is reversed is also possible. But this invention is effective. [Effects of the Invention] As explained above, in the liquid crystal display device according to the present invention, first and second scanning signal lines are provided for each pixel column, and the first and second scanning signal lines are connected to each other. Since the first and second gate electrodes are connected, when a scanning signal is sent to the first and second scanning signal lines, the ratio of channel width to channel length of the 7-layer transistor becomes large, so at low temperatures. 1st. If the scanning signal is sent to the second scanning signal line, writing defects to the pixel electrode will not occur.On the other hand, if the scanning signal is sent only to the first scanning signal line, the channel width and channel length of the thin film transistor Since the ratio of 1 and 2 decreases and the amount of drop in the video signal due to parasitic capacitance decreases, black unevenness will not occur if the scanning signal is sent only to the first video signal line at high temperatures. Therefore, good images can be obtained regardless of temperature. As described above, the effects of this invention are remarkable.

[Brief explanation of drawings]

FIG. IA is a schematic plan view showing a part of a liquid crystal display section of an active matrix color liquid display device according to the present invention, FIG. 1B is a schematic diagram showing a sliding part of a scanning signal line,
FIG. 2A is a waveform diagram showing a scanning signal, FIG. 2A is a plan view of a main part showing one pixel of a liquid crystal display section of an active matrix color liquid display device to which the present invention is applied, and FIG. 2B is a waveform diagram showing a scanning signal. Figure 2C is a cross-sectional view of the area cut along the line ■B-■B in Figure 2A and the area around the seal, and Figure 2C is the line ■c-n in Figure 2A.
3 is a cross-sectional view taken along the cutting line C, and FIG. 3 is a plan view of the main part of a liquid crystal display section in which a plurality of pixels shown in FIG. 2A are arranged, and FIGS. 4 to 6 are
The figure is a plan view depicting only a predetermined layer of the pixel shown in FIG. 2A, FIG. 7 is a plan view of the main part depicting only the pixel electrode layer and color filter layer shown in FIG. 3, and FIG. An equivalent circuit diagram showing the liquid crystal display section of a matrix type color liquid crystal display device, FIG. 9 is an equivalent circuit diagram of the pixel shown in FIG. 2A, and FIG. 10 shows the driving voltage of the scanning signal line using the DC cancellation method. This is a time chart. SUB...Transparent glass substrate GL...Scanning signal line DL...Visual signal line GI...Insulating film GT...Gate electrode As...I-type semiconductor layer Sp...Source electrode or drain lpsv ...Protective film BM...Light shielding film LC...Liquid crystal TPT...Thin film transistor ITO...Transparent pixel electronic chess g. d... Conductive film C add... Holding capacitance element Cgs... Parasitic capacitance C pix... Liquid capacitance Figure IA GTI, GT2---1st, 20th +1 pole Figure IB Figure IC

Claims (1)

[Claims] 1. In an active matrix liquid crystal display device in which a thin film transistor and a pixel electrode are constituent elements of a pixel, first and second scanning signal lines are provided for each pixel column, and the first and second scanning signal lines are provided for each pixel column. A liquid crystal display device characterized in that first and second gate electrodes are connected to a scanning signal line.