JPH0362031B2 - - Google Patents

Info

Publication number
JPH0362031B2
JPH0362031B2 JP58056595A JP5659583A JPH0362031B2 JP H0362031 B2 JPH0362031 B2 JP H0362031B2 JP 58056595 A JP58056595 A JP 58056595A JP 5659583 A JP5659583 A JP 5659583A JP H0362031 B2 JPH0362031 B2 JP H0362031B2
Authority
JP
Japan
Prior art keywords
layer
paste
silicon wafer
impurity diffusion
diffusion prevention
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58056595A
Other languages
Japanese (ja)
Other versions
JPS59182577A (en
Inventor
Hiroshige Tawara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hokusan Co Ltd
Original Assignee
Hokusan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hokusan Co Ltd filed Critical Hokusan Co Ltd
Priority to JP58056595A priority Critical patent/JPS59182577A/en
Publication of JPS59182577A publication Critical patent/JPS59182577A/en
Publication of JPH0362031B2 publication Critical patent/JPH0362031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00Manufacture or treatment of devices covered by this subclass
    • H10F71/121The active layers comprising only Group IV materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Silicon Compounds (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 本発明はP型シリコンウエハによつて、太陽電
池に用いられるn+P P+接合のシリコンウエハを
製造するための方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing n + PP + junction silicon wafers used in solar cells by means of P-type silicon wafers.

従来から効率のよいBSF(Back Surface
Field)化されたシリコンウエハが太陽電池に用
いられているが、当該ウエハの製造は、次の如き
工程を経て実施されている。
Traditionally efficient BSF (Back Surface
Silicon wafers are used in solar cells, and the wafers are manufactured through the following steps.

すなわち第1図の工程説明図が示す通り、先ず
イにあつて用意されたP型シリコンウエハに対
し、燐、ボロン等の3価の不純物を拡散させるこ
とにより、ロの如くP型シリコンウエハの全表面
に、シリコン酸化膜Aにより被覆されたn+層が
形成されてP n+接合を得る。
In other words, as shown in the process diagram of FIG. 1, by first diffusing trivalent impurities such as phosphorus and boron into the P-type silicon wafer prepared in step A, the P-type silicon wafer is An n + layer covered with a silicon oxide film A is formed on the entire surface to obtain a P n + junction.

次に上記シリコン酸化膜Aを弗化水素溶液にて
除去した後、n+層の裏面にAlペーストBをスク
リーン印刷し、これを空気中にて焼成することで
Alをn+層からP型シリコンウエハのP層に拡散
させ、これによつてP+層を形成することにより
n+P P+接合とするBSF化処理を行ない、このと
き上記P+層の下面に付着残存しているAlペース
ト酸化物CをHCl、NaOH等による溶液に除去す
るものである。
Next, after removing the silicon oxide film A with a hydrogen fluoride solution, screen printing Al paste B on the back side of the n + layer and baking it in the air.
By diffusing Al from the n + layer into the P layer of a P-type silicon wafer, thereby forming a P + layer.
A BSF process is performed to form an n + PP + bond, and at this time, the Al paste oxide C remaining attached to the lower surface of the P + layer is removed with a solution of HCl, NaOH, etc.

もちろん、上記のようにして得られたn+P P+
接合のシリコンウエハは、その裏面側に裏面電極
を、表面側に表面電極を形成して太陽電池となる
のであるが、第1図のヘに示した上記の状態にあ
つては、n+層の外周側部分がP+層と接触したも
のとなるため、当該接触が太陽電池としての出力
を低下させることになり、このためヘにつき、そ
の外周縁にスピングラインダー等による機械研磨
をかけ、n+層の外周側部分とP+層の外周側部分
とを削除することにより、トの如き最終のシリコ
ンウエハを得るようにしている。
Of course, n + PP + obtained as above
The bonded silicon wafer becomes a solar cell by forming a back electrode on the back side and a front electrode on the front side, but in the above state shown in Figure 1 F, the n + layer Since the outer periphery of the P + layer contacts the P + layer, this contact reduces the output of the solar cell. By removing the outer circumferential portion of the + layer and the outer circumferential portion of the P + layer, a final silicon wafer as shown in (g) is obtained.

このため従来法によるときは、極めて薄いシリ
コンウエハの外周縁を研磨するといつた面倒な工
程を強いられ、生産性が悪くなると共に、研磨中
に当該ウエハを破損することもあり、かつトの研
削端縁Dが粗面となつてしまうため太陽電池とし
ての効率も低下してしまうといつた欠陥があつ
た。
For this reason, when using the conventional method, it is necessary to perform a cumbersome process such as polishing the outer periphery of an extremely thin silicon wafer, resulting in poor productivity and the possibility of damaging the wafer during polishing. There was a defect that the edge D became a rough surface, resulting in a decrease in efficiency as a solar cell.

本発明は上記難点に鑑み、研削手段を施すこと
なしに、n+層とP+層との接触なきn+P P+接合シ
リコンウエハを製造し得るようになし、もつてそ
の生産性と太陽電池の効率とを向上させようとす
るもので、その特徴とするところは、P型シリコ
ンウエハの裏面外周部に、SiO2、TiO2、MgO2
等のペーストによる不純物拡散防止層を印刷し、
これに燐、ボロン等による拡散処理を施すことに
より、当該不純物拡散防止層を除く全表面に、シ
リコン酸化膜で覆われたn+層を形成し、次に弗
化水素等の溶液処理によつて当該シリコン酸化膜
と前記不純物拡散防止層を除去した後、その裏面
中央部に露呈した裏面側n+層の下面にAlペース
トを印刷し、これを空気中にて焼成することによ
り、当該Alペーストを上記裏面中央部のn+層か
ら当該P型シリコンウエハのP層に拡散させ、こ
れによるP+層を形成することでn+P P+とする
BSF化処理を行ない、さらに上記P+層の下面に
形成されているAlペースト酸化層をHCl、
NaOH等による溶液処理によつて除去するよう
にしたことにある。
In view of the above-mentioned difficulties, the present invention makes it possible to manufacture an n + PP + bonded silicon wafer without contact between the n + layer and the P + layer without applying any grinding means, thereby improving its productivity and solar cells. The main feature is that SiO 2 , TiO 2 , MgO 2 is added to the outer periphery of the back surface of the P-type silicon wafer
Print an impurity diffusion prevention layer using a paste such as
By performing a diffusion treatment using phosphorus, boron, etc., an n + layer covered with a silicon oxide film is formed on the entire surface except for the impurity diffusion prevention layer, and then by a solution treatment using hydrogen fluoride, etc. After removing the silicon oxide film and the impurity diffusion prevention layer, an Al paste is printed on the lower surface of the backside n + layer exposed at the center of the backside, and this is baked in the air. Diffuse the paste from the n + layer at the center of the back surface to the P layer of the P-type silicon wafer, thereby forming a P + layer to form n + PP + .
After BSF treatment, the Al paste oxide layer formed on the bottom surface of the above P + layer is treated with HCl.
The reason is that it is removed by solution treatment with NaOH or the like.

本発明を第2図の工程説明図によつて詳記すれ
ば、イに示す如く例えば直径3インチ、厚さ
300μm、比抵抗1ΩcmのP型シリコンウエハ1を
用意し、先ず当該ウエハ1の裏面1′にあつて、
その外周部に不純物拡散防止層2を環状にスクリ
ーン印刷法等により印刷する。
The present invention will be described in detail with reference to the process diagram of FIG. 2. As shown in FIG.
A P-type silicon wafer 1 of 300 μm and a specific resistance of 1 Ωcm is prepared, and first, on the back side 1' of the wafer 1,
An impurity diffusion prevention layer 2 is printed on the outer periphery in a ring shape by a screen printing method or the like.

この際上記拡散防止層2の素材としては、
SiO2、TiO2、MgO2等のセラミツク系酸化物を
用いるのがよく、印刷に際しては例えば上記
SiO2を主成分としたペーストを用いることにな
るが、ペーストを得るには既知の如くSiO2等が
セルロース系有機バインダー、有機溶剤により調
合される。
At this time, the material for the diffusion prevention layer 2 is as follows:
Ceramic oxides such as SiO 2 , TiO 2 and MgO 2 are preferably used, and when printing, for example, the above
A paste containing SiO 2 as a main component is used, and in order to obtain the paste, SiO 2 and the like are mixed with a cellulose-based organic binder and an organic solvent, as is known.

次に上記ロのものに対し燐、ボロン等の不純物
による拡散処理を第1図のロに示す場合と同じく
施すことで、ハの通り上記不純物拡散防止層2を
除く全表面にn+層を形成するのであり、従つて
当該n+層としては、表面から外周側面にかけて
の表面側n+層3と裏面中央部における裏面側n+
層3′とが、分断状に形成されることゝなり、こ
れらn+層3,3′の表面にはシリコン酸化膜4が
形成されているのであり、こゝで上記n+層の面
抵抗は50Ω/□、拡散層の深さは0.2μmであつた。
Next, by applying the diffusion treatment using impurities such as phosphorus and boron to the above item B in the same manner as shown in Fig. 1B, an n + layer is formed on the entire surface except for the impurity diffusion prevention layer 2 as shown in C Therefore, the n + layer includes the front side n + layer 3 from the front surface to the outer peripheral side, and the back side n + layer 3 at the center of the back surface .
The layer 3' is formed in a segmented manner, and the silicon oxide film 4 is formed on the surface of these n + layers 3 and 3', which reduces the sheet resistance of the n + layer. was 50Ω/□, and the depth of the diffusion layer was 0.2 μm.

次に上記のものに対し弗化水素溶液にて処理す
ることにより、上記のシリコン酸化膜4と、
SiO2等による前記不純物拡散防止層2とを除去
することにより、同図のニの状態となし、次にホ
に示す如く裏面側n+層3′の下面にAlペースト5
をスクリーン印刷等の手段にて印刷するのであり
この際用いられるAlペースト5としては、350メ
ツシユ以上のアルミニウム粉を主成分となし、前
記SiO2ペーストと同じようにして調合したもの
を用いることができ、当該印刷による層厚は20〜
40μmとした。
Next, by treating the above material with a hydrogen fluoride solution, the silicon oxide film 4 and
By removing the impurity diffusion prevention layer 2 made of SiO 2 etc., the state shown in (D) in the same figure is obtained. Next, as shown in (E), Al paste 5 is applied to the lower surface of the n + layer 3' on the back side.
is printed by means such as screen printing, and the Al paste 5 used at this time may be one containing aluminum powder of 350 mesh or more as a main component and prepared in the same manner as the SiO 2 paste described above. The layer thickness due to the printing is 20 ~
It was set to 40 μm.

さらに上記のものを空気中にて800℃〜900℃の
温度により、1〜5分間焼成するのであるが、当
該処理によつてAlペースト5のAlは、裏面側n+
層3′を突き破りP型シリコンウエハ1のP層に
まで拡散して行き、これによりヘの如くP層に隣
接したP+層を形成することができ、かくしてn+P
P+接合とするBSF化処理が完結される。
Furthermore, the above-mentioned material is fired in air at a temperature of 800°C to 900°C for 1 to 5 minutes, and by this process, the Al of the Al paste 5 is
It penetrates through the layer 3' and diffuses into the P layer of the P type silicon wafer 1, thereby forming a P + layer adjacent to the P layer as shown in f, thus n + P.
The BSF processing to form a P + junction is completed.

最後に上記ヘにあつてP+層の下面に形成され
ているAlペースト酸化層6をHCl等により除去
することで、太陽電池用シリコンウエハ7がトの
如く製造し得ることゝなり、このP+層下面に裏
面電極を、表面側n+層3の上面に表面電極を形
成し、さらに当該電極を反射防止膜により被覆し
て、太陽電池を得ることゝなる。
Finally, by removing the Al paste oxide layer 6 formed on the lower surface of the P + layer with HCl or the like in the above step, a silicon wafer 7 for solar cells can be manufactured as shown in FIG. A back electrode is formed on the lower surface of the + layer, a front electrode is formed on the upper surface of the n + layer 3 on the front side, and the electrode is further coated with an antireflection film to obtain a solar cell.

本発明は上記の説示により明らかな通り、n層
形成のための拡散処理前に、予めP型シリコンウ
エハの裏面外周部に不純物拡散防止層を形成して
おくようにしたので、P型シリコンウエハの裏面
には表面側n+層と分断状に、しかもその中央部
だけに裏面側n+層が形成されることゝなり、こ
の結果n+層とP+層との接触なき製品が労せずし
て得られるので、従来法の如き研磨作業は不要と
なり作業性を改善できると共に、研磨による粗面
も生じないので効率のよい太陽電池が得られ、作
業中にウエハを破損するといつた難点も解消され
る。
As is clear from the above explanation, in the present invention, an impurity diffusion prevention layer is formed in advance on the outer periphery of the back surface of the P-type silicon wafer before the diffusion treatment for forming the n-layer. On the back side, the n + layer on the front side is separated from the n + layer on the front side, and the n + layer on the back side is formed only in the center. As a result, the product can be easily manufactured without contact between the n + layer and the P + layer. Since the polishing work required in the conventional method is not required, workability can be improved, and since no rough surfaces are generated due to polishing, highly efficient solar cells can be obtained, and the disadvantages of damaging the wafer during work can be avoided. It will be resolved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図のイ〜トは従来の太陽電池用シリコンウ
エハ製造法を示す工程説明図、第2図のイ〜トは
本発明に係る同製造法の工程説明図である。 1……P型シリコンウエハ、2……不純物拡散
防止層、3……表面側n+層、3′……裏面側n+
層、4……シリコン酸化膜、5……Alペースト、
6……Alペースト酸化層。
I to I in FIG. 1 are process explanatory diagrams showing a conventional method for manufacturing silicon wafers for solar cells, and I to I in FIG. 2 are process explanatory diagrams showing the same manufacturing method according to the present invention. 1... P-type silicon wafer, 2... Impurity diffusion prevention layer, 3... Front side n + layer, 3'... Back side n +
Layer, 4... silicon oxide film, 5... Al paste,
6...Al paste oxide layer.

Claims (1)

【特許請求の範囲】[Claims] 1 P型シリコンウエハの裏面外周部に、SiO2
TiO2、MgO2等のペーストによる不純物拡散防止
層を印刷し、これに燐、ボロン等による拡散処理
を施すことにより、当該不純物拡散防止層を除く
全表面に、シリコン酸化膜で覆われたn+層を形
成し、次に弗化水素等の溶液処理によつて当該シ
リコン酸化膜と前記不純物拡散防止層を除去した
後、その裏面中央部に露呈した裏面側n+層の下
面にAlペーストを印刷し、これを空気中にて焼
成することにより、当該AlペーストのAlを上記
裏面中央部のn+層から当該P型シリコンウエハ
のP層に拡散させ、これによるP+層を形成する
ことでn+P P+接合とするBSF化処理を行ない、
さらに上記P+層の下面に形成されているAlペー
スト酸化層をHCl、NaOH等による溶液処理によ
つて除去するようにしたことを特徴とする太陽電
池用シリコンウエハの製造方法。
1 SiO 2 ,
By printing an impurity diffusion prevention layer made of a paste such as TiO 2 or MgO 2 and performing a diffusion treatment using phosphorus, boron, etc., the entire surface except for the impurity diffusion prevention layer is covered with a silicon oxide film. + layer is formed, and then the silicon oxide film and the impurity diffusion prevention layer are removed by solution treatment such as hydrogen fluoride, and then Al paste is applied to the bottom surface of the n + layer on the back side exposed at the center of the back side. By printing this and firing it in the air, the Al of the Al paste is diffused from the N + layer at the center of the back surface to the P layer of the P type silicon wafer, thereby forming a P + layer. By doing this, we perform BSF processing to form an n + PP + junction.
A method for manufacturing a silicon wafer for a solar cell, further comprising removing the Al paste oxide layer formed on the lower surface of the P + layer by solution treatment with HCl, NaOH, or the like.
JP58056595A 1983-03-31 1983-03-31 Method for manufacturing silicon wafers for solar cells Granted JPS59182577A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58056595A JPS59182577A (en) 1983-03-31 1983-03-31 Method for manufacturing silicon wafers for solar cells

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58056595A JPS59182577A (en) 1983-03-31 1983-03-31 Method for manufacturing silicon wafers for solar cells

Publications (2)

Publication Number Publication Date
JPS59182577A JPS59182577A (en) 1984-10-17
JPH0362031B2 true JPH0362031B2 (en) 1991-09-24

Family

ID=13031551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58056595A Granted JPS59182577A (en) 1983-03-31 1983-03-31 Method for manufacturing silicon wafers for solar cells

Country Status (1)

Country Link
JP (1) JPS59182577A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0682853B2 (en) * 1988-07-22 1994-10-19 シャープ株式会社 Solar cell manufacturing method
DE10021440A1 (en) 2000-05-03 2001-11-15 Univ Konstanz Process for producing a solar cell and solar cell produced by this process
EP1321446A1 (en) 2001-12-20 2003-06-25 RWE Solar GmbH Method of forming a layered structure on a substrate
TW201332897A (en) * 2012-01-10 2013-08-16 Hitachi Chemical Co Ltd Barrier layer forming composition, solar cell substrate manufacturing method, and solar cell element manufacturing method
TW201331312A (en) * 2012-01-10 2013-08-01 Hitachi Chemical Co Ltd Mask forming composition, solar cell substrate manufacturing method, and solar cell element manufacturing method
TW201335070A (en) * 2012-01-10 2013-09-01 Hitachi Chemical Co Ltd Barrier layer forming composition, barrier layer, method for producing solar cell substrate, and method for manufacturing solar cell element

Also Published As

Publication number Publication date
JPS59182577A (en) 1984-10-17

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