JPH0529390A - Method for manufacturing multichip module - Google Patents
Method for manufacturing multichip moduleInfo
- Publication number
- JPH0529390A JPH0529390A JP17987691A JP17987691A JPH0529390A JP H0529390 A JPH0529390 A JP H0529390A JP 17987691 A JP17987691 A JP 17987691A JP 17987691 A JP17987691 A JP 17987691A JP H0529390 A JPH0529390 A JP H0529390A
- Authority
- JP
- Japan
- Prior art keywords
- film
- chip
- wiring board
- solder ball
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims 4
- 229910000679 solder Inorganic materials 0.000 claims abstract description 27
- 229920006015 heat resistant resin Polymers 0.000 claims abstract description 12
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 claims abstract description 5
- 230000000149 penetrating effect Effects 0.000 claims abstract description 5
- 229920001721 polyimide Polymers 0.000 claims abstract description 4
- 239000009719 polyimide resin Substances 0.000 claims abstract description 3
- 229920002050 silicone resin Polymers 0.000 claims abstract description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 229910000846 In alloy Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 5
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 229910020220 Pb—Sn Inorganic materials 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/11334—Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】
【目的】 マルチチップモジュールのフリップチップボ
ンディング方法に関し，工程を簡略化したフリップチッ
プ法によって実装できることを目的とする。
【構成】 耐熱性樹脂からなるフイルム１に，フィルム
１を貫通する接続用電極２を形成し，フィルム１をＩＣ
チップ３と配線基板４との間に挟み込み, 熱処理して,
ＩＣチップ３と配線基板４とを接続用電極２にボンディ
ングを行うように，また，上記耐熱性樹脂からなるフィ
ルム１がポリイミド樹脂，或いはシリコーン樹脂からな
るフィルムであるように，更に，上記接続用電極２が錫
ー鉛系の半田ボール６からなるように構成する。
(57) [Summary] [Objective] Regarding the flip-chip bonding method of a multi-chip module, the purpose is to be able to mount by a flip-chip method with a simplified process. [Structure] A connection electrode 2 penetrating the film 1 is formed on a film 1 made of a heat-resistant resin, and the film 1 is formed into an IC.
Sandwiched between chip 3 and wiring board 4, heat treated,
For bonding the IC chip 3 and the wiring board 4 to the connecting electrode 2, and for the film 1 made of the heat-resistant resin to be a film made of a polyimide resin or a silicone resin, and further for the connection described above. The electrode 2 is composed of a tin-lead solder ball 6.
Description
【０００１】[0001]
【産業上の利用分野】本発明は，マルチチップモジュー
ルのフリップチップボンディング方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip chip bonding method for a multi chip module.
【０００２】近年のＬＳＩチップの開発は，高集積化，
高速化，多ピン化，低消費電力化のスピードが著しく，
それにともなうＩＣチップと配線基板との間の接続技術
の開発が要求されている。In recent years, the development of LSI chips is highly integrated,
High speed, high pin count, low power consumption,
Accordingly, development of a connection technology between the IC chip and the wiring board is required.
【０００３】そのため，様々なＩＣチップへの対応と，
デバイス性能を引き出す技術が必要となる。Therefore, various IC chips can be supported,
Technology is required to bring out device performance.
【０００４】[0004]
【従来の技術】図３は従来例の説明図である。図におい
て，10はＩＣチップ，11は配線基板, 12はバンプ電極,
13は電極, 14は電極である。2. Description of the Related Art FIG. 3 is an explanatory view of a conventional example. In the figure, 10 is an IC chip, 11 is a wiring board, 12 is a bump electrode,
13 is an electrode and 14 is an electrode.
【０００５】従来のボンディング方法においては，図３
（ａ）に示すように，ＩＣチップ10側，或いは，図３
（ｂ）に示すように，配線基板側11，若しくは，図３
（ｃ）に示すように，ＩＣチップ10と配線基板11の両方
にバンプ電極12を形成し，配線基板11にＩＣチップ10を
位置合わせして，バンプ電極12を構成している半田を融
点以上に加熱することにより，ＩＣチップ10上の電極13
と配線基板11上の電極12をバンプ電極12に同時にボンデ
ィング接着していた。In the conventional bonding method, as shown in FIG.
As shown in (a), the IC chip 10 side, or FIG.
As shown in (b), the wiring board side 11, or FIG.
As shown in (c), bump electrodes 12 are formed on both the IC chip 10 and the wiring substrate 11, the IC chip 10 is aligned with the wiring substrate 11, and the solder forming the bump electrodes 12 is melted at a temperature above the melting point. The electrode 13 on the IC chip 10 is heated to
The electrodes 12 on the wiring substrate 11 were simultaneously bonded and bonded to the bump electrodes 12.
【０００６】ところが，ＩＣチップ10或いは配線基板11
のどちらか一方には, 少なくとも,バンプ電極を形成す
る必要があるため，技術的問題の他に工程数が増え，更
に,実装後には接続した周辺部を湿度等から守るため,
保護用の樹脂によって封じする必要があった。However, the IC chip 10 or the wiring board 11
Since it is necessary to form a bump electrode on at least one of the above, the number of processes increases in addition to the technical problem, and in addition, after mounting, in order to protect the connected peripheral part from humidity etc.,
It had to be sealed with a protective resin.
【０００７】[0007]
【発明が解決しようとする課題】従って，スループット
が悪くなり，また，バンプ電極の点同士の接続となるた
め，ＩＣチップと配線基板の間にねじれ等，ストレスが
生ずるといった問題を生じていた。Therefore, since the throughput is deteriorated and the bump electrodes are connected to each other at points, there is a problem that a stress such as a twist is generated between the IC chip and the wiring board.
【０００８】本発明は，以上の点を鑑み，バンプ電極を
わざわざＩＣチップや配線基板上に形成しなくても，フ
リップチップ法によって実装できることを目的とする。In view of the above points, it is an object of the present invention to be mounted by a flip chip method without forming a bump electrode on an IC chip or a wiring board.
【０００９】[0009]
【課題を解決するための手段】図１は本発明の原理説明
図である。図において，１はフィルム，２は接続用電
極，３はＩＣチップ，４は配線基板，５は孔，６は半田
ボール，７は電極，８は電極，９は表面保護膜である。FIG. 1 is a diagram for explaining the principle of the present invention. In the figure, 1 is a film, 2 is a connecting electrode, 3 is an IC chip, 4 is a wiring substrate, 5 is a hole, 6 is a solder ball, 7 is an electrode, 8 is an electrode, and 9 is a surface protective film.
【００１０】上記の問題点を解決するためには, あらか
じめ，耐熱性樹脂のフィルムの開孔部に接続用電極を貫
通埋め込み形成したものを用いれば良い。これにより，
工程の簡略化の他，ＩＣチップと配線基板間のストレス
もなくなり，信頼性の高いマルチチップモジュールが得
られる。In order to solve the above-mentioned problems, it is sufficient to use a film of a heat-resistant resin in which a connecting electrode is formed so as to be embedded through the opening. By this,
Besides the simplification of the process, the stress between the IC chip and the wiring board is eliminated, and a highly reliable multi-chip module can be obtained.
【００１１】即ち，本発明の目的は，図１に示すよう
に，耐熱性樹脂からなるフイルム１に，該フィルム１を
貫通する接続用電極２を形成し，該フィルム１をＩＣチ
ップ３と配線基板４との間に挟み込み, 熱処理して, 該
ＩＣチップ３と該配線基板４とを該接続用電極２にボン
ディングを行うことにより，或いは，図２（ａ）に示す
ように，耐熱性樹脂からなるフィルム１の接続用電極２
埋め込み位置に孔５を開ける工程と，図２（ｂ）に示す
ように，該フィルム１の該孔５に，該孔５よりサイズの
大きい半田ボール６を載置する工程と，図２（ｃ）に示
すように，該半田ボール６を加熱して，該孔５に埋め込
む工程と，図２（ｄ）に示すように，該半田ボール６の
表面にＩＣチップ３の電極７を，該半田ボール６の裏面
に該配線基板４の電極８をそれぞれ位置合わせして，該
フィルム１の両面を該ＩＣチップ３と該配線基板４で挟
み込む工程と，図２（ｅ）に示すように，該ＩＣチップ
３，該フィルム１，該配線基板４を加熱する工程とを含
むことにより，また，上記耐熱性樹脂からなるフィルム
１がポリイミド樹脂，或いはシリコーン樹脂からなるフ
ィルムであることにより，更に，上記接続用電極２が錫
ー鉛系の半田ボール６からなることにより達成される。That is, as shown in FIG. 1, an object of the present invention is to form a connecting electrode 2 penetrating the film 1 on a film 1 made of a heat resistant resin, and connecting the film 1 to an IC chip 3 and wiring. It is sandwiched between a substrate 4 and heat-treated to bond the IC chip 3 and the wiring substrate 4 to the connecting electrode 2, or as shown in FIG. Connection electrode 2 of film 1
2 (c), a step of forming a hole 5 in the embedding position, a step of placing a solder ball 6 having a size larger than the hole 5 in the hole 5 of the film 1 as shown in FIG. 2), the solder ball 6 is heated to be embedded in the hole 5, and the electrode 7 of the IC chip 3 is attached to the surface of the solder ball 6 as shown in FIG. The steps of aligning the electrodes 8 of the wiring board 4 on the back surface of the ball 6 and sandwiching both sides of the film 1 between the IC chip 3 and the wiring board 4, as shown in FIG. By including a step of heating the IC chip 3, the film 1, and the wiring board 4, and the film 1 made of the heat-resistant resin is a film made of a polyimide resin or a silicone resin. The connecting electrode 2 is a tin-lead solder ball. It is accomplished by comprising a 6.
【００１２】[0012]
【作用】本発明では，マルチチップモジュールにおける
ＩＣチップと配線基板とのボンディングの際，耐熱性樹
脂からなるフィルムに予め孔を開け，接続用電極等を埋
め込むでおくことにより，工程の簡略化及びストレスの
緩和が図れ，かつ耐熱性樹脂そのものが加熱されて硬化
し，ＩＣチップ並びに配線基板の保護樹脂膜となって耐
湿性等が向上する。According to the present invention, when the IC chip and the wiring board in the multi-chip module are bonded, holes are preliminarily formed in the film made of the heat-resistant resin and the connecting electrodes and the like are embedded, thereby simplifying the process. The stress can be relieved, and the heat resistant resin itself is heated and hardened to form a protective resin film for the IC chip and the wiring substrate, thereby improving the moisture resistance and the like.
【００１３】[0013]
【実施例】図２は本発明の一実施例の工程順説明図であ
る。本発明の一実施例について，図２により工程順に説
明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 is an explanatory view in order of steps of one embodiment of the present invention. An embodiment of the present invention will be described in the order of steps with reference to FIG.
【００１４】図２（ａ）に示すように，両面に薄く接着
材が塗布されている 100μｍの厚さのポリイミドフィル
ム１の接続用電極２の埋め込み位置にフィルム１を貫通
する孔５を 100〜150 μｍの大きさに開ける。As shown in FIG. 2 (a), a hole 5 penetrating the film 1 is formed at a position where the connecting electrode 2 of the polyimide film 1 having a thickness of 100 μm, which is thinly coated on both sides, is embedded. Open to a size of 150 μm.
【００１５】図２（ｂ）に示すように，この孔５に, 必
ず孔５のサイズより一回り大きいサイズの 150〜200 μ
ｍ径の鉛ー錫系の半田ボール６を載せる。載置する方法
としては，フィルム１全体に沢山の半田ボール６を置
き，前後左右に揺動すると，半田ボール６が孔に落ち込
む。この方法で半田ボール６が孔５を全部埋め込むまで
揺する。As shown in FIG. 2B, the size of the hole 5 must be 150 to 200 μ, which is one size larger than the size of the hole 5.
A lead-tin based solder ball 6 of m diameter is placed. As a mounting method, a lot of solder balls 6 are placed on the entire film 1 and rocked back and forth and left and right, so that the solder balls 6 fall into the holes. In this way, the solder ball 6 is rocked until the hole 5 is completely filled.
【００１６】図２（ｃ）に示すように，半田ボール６を
300 ℃に加熱すると, 半田が溶けて孔に入り込み, 表面
張力で孔の両側に鍔状の庇を出したところで, 徐々に冷
却し, フィルムに固定する。As shown in FIG. 2C, the solder balls 6 are
When heated to 300 ° C, the solder melts and enters the holes, and when the surface tension produces a brim-shaped eaves on both sides of the hole, it is gradually cooled and fixed to the film.
【００１７】図２（ｄ）に示すように，半田ボール６の
表面にＩＣチップ３の電極７を，半田ボール６の裏面に
配線基板４の電極８をそれぞれ位置合わせして，フィル
ム１の両面をＩＣチップ３と配線基板４で挟み込む。As shown in FIG. 2D, the electrodes 7 of the IC chip 3 are aligned with the front surface of the solder ball 6 and the electrodes 8 of the wiring board 4 are aligned with the rear surface of the solder ball 6, respectively, and both surfaces of the film 1 are aligned. Is sandwiched between the IC chip 3 and the wiring board 4.
【００１８】図２（ｅ）に示すように，ＩＣチップ３，
フィルム１，配線基板４を 400℃に加熱すると, 半田ボ
ール６が再び溶けて, ＩＣチップ３側の電極と配線基板
側の電極８とを接着する接続用電極となる。As shown in FIG. 2E, the IC chip 3,
When the film 1 and the wiring board 4 are heated to 400 ° C., the solder balls 6 are melted again and become the connection electrodes for bonding the electrode on the IC chip 3 side and the electrode 8 on the wiring board side.
【００１９】と同時に，フィルムが溶融してＩＣチップ
３と配線基板４の空間を埋めた後，冷却硬化して，表面
保護樹脂膜として残る。また，フィルムを貫通する半田
電極の形成方法は，レジスト膜の剥離を利用して，蒸
着，めっき等の方法を用いても形成できる。At the same time, the film melts and fills the space between the IC chip 3 and the wiring substrate 4, and then is cooled and cured to remain as a surface protective resin film. Further, the method of forming the solder electrode penetrating the film can also be formed by utilizing the peeling of the resist film, such as vapor deposition, plating or the like.
【００２０】実施例では，鉛ー錫(Pb-Sn) 系の半田ボー
ルを使用したが, インジウム(In),或いは, インジウム
合金系, 例えば, In-Sn,In-Au,In-Ag,In-Ni,In-Pb等の
半田ボールを使用しても良い。In the examples, lead-tin (Pb-Sn) -based solder balls were used, but indium (In) or indium alloy-based solder balls such as In-Sn, In-Au, In-Ag, In were used. -Ni, In-Pb or other solder balls may be used.
【００２１】[0021]
【発明の効果】以上説明したように, 本発明によれば,
マルチチップモジュールにおけるＩＣチップと配線基板
とのボンディングの際，耐熱性樹脂からなるフィルムに
予め孔を開け，接続用電極等を埋め込むでおくことによ
り，工程の簡略化及びストレスの緩和が図れ，かつ耐熱
性樹脂そのものがＩＣチップ並びに配線基板の保護樹脂
膜となって耐湿性等，マルチチップモジュールの信頼性
の向上に大いに寄与することとなる。As described above, according to the present invention,
At the time of bonding the IC chip and the wiring board in the multi-chip module, holes can be preliminarily formed in the film made of heat-resistant resin and the connecting electrodes and the like can be embedded to simplify the process and reduce stress. The heat-resistant resin itself serves as a protective resin film for the IC chip and the wiring board, and greatly contributes to the improvement of the reliability of the multi-chip module such as moisture resistance.
【図１】 本発明の原理説明図FIG. 1 is an explanatory view of the principle of the present invention.
【図２】 本発明の一実施例の工程順模式断面図2A to 2D are schematic cross-sectional views in order of the processes of an embodiment of the present invention.
【図３】 従来例の説明図FIG. 3 is an explanatory diagram of a conventional example.
１ フィルム ２ 接続用電極 ３ ＩＣチップ ４ 配線基板 ５ 孔 ６ 半田ボール ７ 電極 ８ 電極 ９ 表面保護膜 1 film 2 connection electrodes 3 IC chips 4 wiring board 5 holes 6 solder balls 7 electrodes 8 electrodes 9 Surface protection film
Claims (4)
フィルム(1) を貫通する接続用電極(2) を形成し，該フ
ィルム(1) をＩＣチップ(3) と配線基板(4)との間に挟
み込み, 熱処理して, 該ＩＣチップ(3) と該配線基板
(4) とを該接続用電極(2) にボンディングを行うことを
特徴とするマルチチップモジュールの製造方法。1. A film (1) made of a heat-resistant resin is provided with a connection electrode (2) penetrating the film (1), and the film (1) is attached to an IC chip (3) and a wiring board (4). ) And heat-treat the IC chip (3) and the wiring board.
(4) is bonded to the connection electrode (2), and a method for manufacturing a multi-chip module, comprising:
用電極(2)埋め込み位置に孔(5) を開ける工程と， 該フィルム(1) の該孔(5) に，該孔(5) よりサイズの大
きい半田ボール(6) を載置する工程と， 該半田ボール(6) を加熱して，該孔(5) に埋め込む工程
と， 該半田ボール(6) の表面にＩＣチップ(3) の電極(7)
を，該半田ボール(6) の裏面に該配線基板(4) の電極
(8)をそれぞれ位置合わせして，該フィルム(1) の両面
を該ＩＣチップ(3) と該配線基板(4) で挟み込む工程
と， 該ＩＣチップ(3) ，該フィルム(1) ，該配線基板(4) を
加熱する工程とを含むことを特徴とするマルチチップモ
ジュールの製造方法。2. A step of forming a hole (5) at a position where a connecting electrode (2) is embedded in a film (1) made of a heat resistant resin, and the hole (5) is provided in the hole (5) of the film (1). ) A step of placing a solder ball (6) having a larger size, a step of heating the solder ball (6) and embedding it in the hole (5), and an IC chip (on the surface of the solder ball (6) ( 3) Electrodes (7)
The electrodes of the wiring board (4) on the back surface of the solder ball (6).
Aligning (8) with each other and sandwiching both sides of the film (1) between the IC chip (3) and the wiring board (4), the IC chip (3), the film (1), the And a step of heating the wiring board (4).
ポリイミド樹脂，或いはシリコーン樹脂からなるフィル
ムであることを特徴とする請求項１或いは２記載のマル
チチップモジュールの製造方法。3. The method for manufacturing a multi-chip module according to claim 1, wherein the film (1) made of the heat resistant resin is a film made of a polyimide resin or a silicone resin.
インジウム合金系の半田ボール(6) からなることを特徴
とする請求項１或いは２記載のマルチチップモジュール
の製造方法。4. The method of manufacturing a multi-chip module according to claim 1, wherein the connection electrode (2) is made of a tin-lead solder ball or an indium alloy solder ball (6).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17987691A JPH0529390A (en) | 1991-07-19 | 1991-07-19 | Method for manufacturing multichip module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17987691A JPH0529390A (en) | 1991-07-19 | 1991-07-19 | Method for manufacturing multichip module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0529390A true JPH0529390A (en) | 1993-02-05 |
Family
ID=16073449
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17987691A Withdrawn JPH0529390A (en) | 1991-07-19 | 1991-07-19 | Method for manufacturing multichip module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0529390A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0804056A2 (en) * | 1996-04-26 | 1997-10-29 | NGK Spark Plug Co. Ltd. | Improvements in or relating to connecting board |
| US5859407A (en) * | 1996-07-17 | 1999-01-12 | Ngk Spark Plug Co., Ltd. | Connecting board for connection between base plate and mounting board |
| US6080936A (en) * | 1996-04-26 | 2000-06-27 | Ngk Spark Plug Co., Ltd. | Connecting board with oval-shaped protrusions |
| US6372548B2 (en) | 1998-06-04 | 2002-04-16 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating a semiconductor package with a semiconductor device attached to a multilayered substrate |
| US6492715B1 (en) | 2000-09-13 | 2002-12-10 | International Business Machines Corporation | Integrated semiconductor package |
| JP2008053654A (en) * | 2006-08-28 | 2008-03-06 | Clover Denshi Kogyo Kk | Printed wiring board and its manufacturing process |
| JP2020088274A (en) * | 2018-11-29 | 2020-06-04 | 株式会社リコー | Semiconductor unit, electronic device, and semiconductor unit manufacturing method |
-
1991
- 1991-07-19 JP JP17987691A patent/JPH0529390A/en not_active Withdrawn
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0804056A2 (en) * | 1996-04-26 | 1997-10-29 | NGK Spark Plug Co. Ltd. | Improvements in or relating to connecting board |
| US6080936A (en) * | 1996-04-26 | 2000-06-27 | Ngk Spark Plug Co., Ltd. | Connecting board with oval-shaped protrusions |
| US6148900A (en) * | 1996-04-26 | 2000-11-21 | Ngk Spark Plug Co., Ltd. | Connecting board for connection between base plate and mounting board |
| EP0804056B1 (en) * | 1996-04-26 | 2009-06-17 | NGK Spark Plug Co. Ltd. | Improvements in or relating to a connecting board |
| US5859407A (en) * | 1996-07-17 | 1999-01-12 | Ngk Spark Plug Co., Ltd. | Connecting board for connection between base plate and mounting board |
| US6372548B2 (en) | 1998-06-04 | 2002-04-16 | Matsushita Electric Industrial Co., Ltd. | Method for fabricating a semiconductor package with a semiconductor device attached to a multilayered substrate |
| US6538315B2 (en) | 1998-06-04 | 2003-03-25 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of manufacturing same |
| US6492715B1 (en) | 2000-09-13 | 2002-12-10 | International Business Machines Corporation | Integrated semiconductor package |
| JP2008053654A (en) * | 2006-08-28 | 2008-03-06 | Clover Denshi Kogyo Kk | Printed wiring board and its manufacturing process |
| JP2020088274A (en) * | 2018-11-29 | 2020-06-04 | 株式会社リコー | Semiconductor unit, electronic device, and semiconductor unit manufacturing method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19981008 |
