JPS595373A - Data transfer system - Google Patents

Abstract

PURPOSE:To improve the speed of transfer processing by providing two RAMs between a main system and a floppy disk device. CONSTITUTION:The main system 1 performs data transfer between the RAM1 and RAM2 on programmed transfer basis by bringing tristate buffers B1-B4 under switching control. The RAM1 and RAM2 are connected to the floppy disk device 2 through the tristate buffers B5-B8. Further, data transfer is carried out between the RAM1 and RAM2, and floppy disk device 2 on DMA transfer basis under the control of a controller.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transfer method between a main system and a floppy disk device in an electronic computer system.

In a conventional computer system, when data is exchanged between the main system and a floppy disk device, one RAM (random access memory) is interposed between the two, and for example, a floppy disk device is used. When transferring data from the device to the main system, DMA (Direct Memory
By Acoesd transfer, data is first transferred from the floppy disk device to the RAM, and then data stored in the RAM is transferred from the RAM to the main system.

Incidentally, in a floppy disk device, as schematically shown in FIG. 1, each track is provided with a large number of sectors for storing data. Since the floppy disk is rotated at high speed and data is read and folded, the conventional method described above is used to transfer data from the floppy disk device to the RAM.
When data is transferred to the next sector, when reading data sequentially from consecutive sectors, the header may advance to the next sector before the read process from one sector is completed.
Therefore, reading data from the next sector often requires waiting until the floppy disk rotates once to reach the next sector. Also, if you read data from every other sector, you can prevent the above-mentioned problem, but if you read data from all sectors, as a result, each sector will be rotated twice. Otherwise, the problem that data transfer takes time cannot be solved at all.

This invention was made to improve the above-mentioned situation, and its purpose is to increase the speed of transfer processing by reducing the number of RAMs between the main system and the floppy disk device to two. The purpose of the present invention is to provide a data transfer method with

One embodiment will be described below with reference to FIGS. 2 and 3. FIG. 2 is a system configuration diagram of the electronic computer system. In the figure, the main system 1 consists of an 0PU (central processing unit), a main memory, a keyboard, a display device, a printing device, etc.
The first RAM (random access memory,
(hereinafter referred to as RAM M1). The main system 1 is also connected to a second RAM (hereinafter referred to as RAM2) via pass lines EUS, tri-state buffers B, E, and pass lines BUS3. Therefore, main system 1 has tristate buffer B, -
By controlling the opening and closing of B, RAM and RAM
2 and 2, respectively, using a program transfer method.

On the other hand, RAM is connected to the L floppy disk device 2 via a pass line BUS2, tristate buffers B, B, and pass line B41. Also R A M2
f'i pass line BUS3, tri-state buffer B
7, B8, and is connected to the floppy disk device 2 via a pass line BUS4. Then RAM.

Between the RAM 2 and the 70-bit disk device 2, DMA (Dir.
Data transfer is performed using the eot Memory Aoaeees) transfer method.

Next, the data transfer operation of the above embodiment will be explained with reference to the time charts of FIGS. 3(A) and 3(B). First, the case where data is transferred from the floppy disk device 2 to the main system 1 will be explained with reference to FIG. 3(A). However, at timing Tn, the main system 1 stores tri-state buffers B and -E.

Among them, only the tristate buffer island is opened, and the other tristate buffers E, , B, % B are closed.

Also, at this timing Tn'''C, a controller (not shown) opens only the tristate buffers among the tristate buffers B5 to B8, and closes the other tristate buffers B, 1% E, , B. R.A.
M, one sector worth of data is sent to the pass line BU, tri-state buffer B2, pass line BU
, and is transferred to the main system 1 by program transfer. At the same time, the data in a certain sector of the floppy disk device 2 is transferred to the pass line BU! %, ) is transferred to the RAM by DMA transfer via the license state buffer B8 and the pass line B U Sa.

Next, at timing T"-4-1, the main system 1 opens only the tri-state buffer B4 among the tri-state buffers B1 to B4. Also, the controller (not shown) opens the tri-state buffer B4 among the tri-state buffers B5 to B8. Only open the RA.
One sector worth of data transferred and stored at the timing Tn in M2 is transferred to the main memory 1 via the pass line BUS3,) to the current state buffer.
is transferred by program transfer. At the same time, the data in the next sector of the floppy disk device 20, that is, the next sector following the sector from which data was read at the timing Tn, is transferred to the pass line BtJS4, the license state buffer 9, and the pass line EUS2. Intermediate R
AM, by DMA transfer.

Next, at timing T''+2, the state is returned to the state described at the timing Tn, and when the operation at this timing T"+2 is completed, the state is returned to the state at the timing Tn11, and thereafter, at timing Tn, in exactly the same manner. The following states are repeated alternately, and data from consecutive sectors of the floppy disk drive 2 is read out in sequence.
DMA is transferred alternately to RAM and RAM2, and then to RAM
One sector worth of data is alternately transferred to the main system 1 as a program.

Next IC main system 1 to floppy disk device 2
The operation when transferring data to the computer will be explained with reference to FIG. At timing T'n, the main system 1 opens only the tri-state buffers among the tri-state buffers B1~, and the controller (not shown) opens only the tri-state buffers among the tri-state buffers 7B and B8. to open. Then, one sector worth of data from main system 1 is transferred to the pass line BUS,
,) license state buffer B1, pass line BUS
, via RAM.

Written to by program transfer. At the same time, R
AM, 1 sector worth of data is pass line BUR8%
) is written to a certain sector of the floppy disk drive 2 via the path line B4.

Next, at timing T'U+, the main system 1 opens only the tristate buffers among the tristate buffers B1 to Bρ. Further, a controller (not shown) opens only the tri-state buffers of tri-state buffers B and B8. And timing T
One sector worth of data written to the RAM in '□ is transferred to the pass line B U sz,
The DM is transferred to the next sector of the floppy disk device 2 via the pass line BUS, that is, the next sector following the sector in which data was written at the timing T'n.
Written by A transfer. At the same time, data for the next one sector is written from the main system 1 to the KA M2 by program transfer via the pass lines BUS, .

Next, when the timing "qg" is reached, the above timing T'
Return to the state described in n, and return to this timing T'yu+2
At the end of the pass, the state is returned to the above timing T', and thereafter, timing T'n and timing T' are reached in exactly the same manner.

The states of 10 and 10 are repeated alternately, and the main system 1 to 1
Sector-by-sector data is alternately program-transferred to KA4゜M, RAM2, and furthermore, one sector-worth of data is alternately DMA-transferred from RAM1% RAM to floppy disk device 2 and sequentially written to consecutive sectors. It will be done.

As explained above, the present invention interposes two RAMs between the main system of a computer and a floppy disk, and connects these RAMs alternately to the main system and floppy disk device, thereby creating a connection between the main system and the RAM. Since we have provided a data transfer method in which data is transferred using the program transfer method, and data is transferred using the 11i1A transfer method between the RAM and the floppy disk device, data reading and writing to and from the floppy disk device can be performed at high speed. However, there are 111 points that can be performed reliably, that is, read and write data to consecutive sectors can be reliably performed. Another advantage of GPUs is that they can be used more efficiently than before because the waiting time is reduced.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram of a floppy disk track, Figure 2
The figure is a system configuration diagram of one embodiment of this invention, and Fig. 3 (A
), (IIG are data transfer from floppy disk device 2 to main system 1 and main system 1, respectively.
3 is a time chart illustrating each operation of data transfer from the floppy disk device 2 to the floppy disk device 2. FIG. 1... Main system, 2... Floppy disk device, RAM1, R input Mi... Random access memory, B1-B,... Tri-state buffer. Patent applicant Casio Computer Co., Ltd.

Claims (1)

[Claims] Kameko Computer has a main system, a floppy disk device, and two RAMs (random access memories) interposed between the main system and the 70-bit disk device, and one RAM and the floppy disk device. a first data transfer mode for transferring data between the other RAM and the main system during data transfer; and a first data transfer mode for transferring data between the other RAM and the main system; A data transfer method characterized in that a second data transfer mode in which data is transferred is alternately executed.