JPS613395A - Semiconductor device - Google Patents

Abstract

PURPOSE:To know storage contents of a memory cell only by measuring a current by varying resistance values of respective load elements of two inverter for constituting a flip-flop of a memory cell for consisting of a flip-flop. CONSTITUTION:A memory cell 8 constitutes an FF for consisting of two inverters, while memory nodes 9a and 9b form complementary data. Two load resistances 2A and 2B are set to different resistance values. As a result, a current consumed in the memory cell varies in accordance with the storage state, and contents of the memory cell can be grasped with the aid of the magnitude of the current without access.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device using a flip-flop as a memory cell.

[Prior art]

Conventionally, there was a device for this building as shown in Figure 1.

In Fig. 1, 1a and 1b are inverter transistors (MOS FETs), 2a and 2b are load resistors, 3a,
3b is an access transistor, 4a, 4b1! power supply, 5
a and 5b are ground, 6a and 6b are bit lines, I is a word line, 8 is a memory cell consisting of each of the above parts, and 9a and 9b are d storage nodes.

Explain the missing behavior.

The memory cell 8 is a flip 70 consisting of two inverters.
It constitutes a storage node 9a.

9b1 memorize mutually complementary takes. Conventionally, the resistance values of the two load resistors 2a and 26 constituting the inverter, gb, were set to almost the same value. Therefore, the current flowing through the load resistor 2b when the storage node 9a is at a high potential and 9b is at a low potential is equal to the current flowing through the load resistor 2a when the storage node 9a is at a low potential and 9b is at a high potential.

Since the conventional memory device is configured as described above, it has a drawback that it is impossible to know the stored contents of the memory cell just by measuring the current flowing through the load resistor 2a and 2biC.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and by measuring only the current by changing the resistance values of the load elements of the inverters of a pair of memory cells, the memory of the memory cell can be improved. The present invention provides a semiconductor device whose contents can be known. An embodiment of the present invention will be described below with reference to the drawings.

[Embodiments of the invention]

FIG. 2 is an equivalent circuit diagram of a semiconductor device showing an embodiment of the present invention. In FIG. 2, 2A and 2B are load resistors, and the resistance values of these two load resistors and 2B are ⇠β'3 or RA>几. Note that the other components are the same as those shown in FIG. When the piezoresistance values are configured in this way, the resistance values of the two load resistors and 2B that constitute the inverter are different, so that the current consumed by the memory cell differs depending on the storage state. For example, RA<
16, when the storage node 9a is at a high potential and the storage node 9b is at a low potential, no current flows through the two people.
Current flows only in 2BK, and the current at this time is smaller than the current flowing through the two load resistors when storage node 9a is at a low potential and storage node 9b is at a high potential.

Therefore, depending on the magnitude of the current, stored information can be obtained without accessing the contents of the memory cell.

In the above embodiment, the pressure is shown in the case of one memory cell, but even in a memory in which n cells are two-dimensionally arranged in 7 lays as shown in FIG. 3, if the resistance values are made different,
The percentage of memory cells in the '1' or '0' state can be determined simply by measuring the current. At this time Ra 〉
The accuracy is further improved by setting n⇠ or J<R1/n.

In addition, in the above embodiment, a memory cell consisting of a flip-flop using an M'O3) transistor was explained.
Any element that can constitute a flip-flop can produce similar effects.

Furthermore, although the load resistors 2A and 2B are used as load elements, they are not limited to resistors.

〔Effect of the invention〕

As explained above, in a memory cell consisting of a 7-limp flop, the resistance values of the load elements of the two inverters constituting the 7-limp flop are made different from each other, so that current can be controlled without accessing the memory cell. It has the advantage of being able to know the storage contents of a memory cell just by measuring .

[Brief explanation of drawings]

FIG. 1 is an equivalent circuit diagram showing a conventional semiconductor device, FIG. 2 is an equivalent circuit diagram showing a semiconductor device according to an embodiment of the present invention, and FIG. 3 is a block diagram showing another embodiment of the invention. It is. In the figure, 1a, 1b are inverter transistors, 2A, 2
B is a load resistor, 3a and 3b are access transistors,
4a and 4b are power supplies, 5a and 5b are grounding, 6a and 6b are bit lines, 1 is a word line, 8 is a memory cell, and 9a and 9b are storage nodes. In addition, the same reference numerals in the figures indicate the same or equivalent parts. Agent: Masuo Oiwa (2 others) Figure 1 Figure 2 Figure 3 1 " ] 1, J

Claims (1)

[Claims] 1. A semiconductor device comprising a memory cell comprising a flip-flop, wherein the load elements of two inverters constituting the flip-flop have different resistance values.