JPS6171621A - Manufacture of semiconductor - Google Patents
Manufacture of semiconductorInfo
- Publication number
- JPS6171621A JPS6171621A JP19342684A JP19342684A JPS6171621A JP S6171621 A JPS6171621 A JP S6171621A JP 19342684 A JP19342684 A JP 19342684A JP 19342684 A JP19342684 A JP 19342684A JP S6171621 A JPS6171621 A JP S6171621A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- semiconductor
- helium
- silicon
- epitaxial growth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は酸化物単結晶基板上もしくはシリコン111結
晶話板に形成された酸化物単結晶膜上にシリコン等の半
導体をエピタキシャル成長させる半導1本の製造方法(
二関する。Detailed Description of the Invention (Industrial Application Field) The present invention relates to a semiconductor device 1 in which a semiconductor such as silicon is epitaxially grown on an oxide single crystal substrate or an oxide single crystal film formed on a silicon 111 crystal board. Book manufacturing method (
Two matters.
(従来技術)
一般に、凹接合分離方式に代えてシリコンの酸化物等の
絶縁体を利用して素子間の電気的な分離(アイソレージ
ラン)を行なう半導体装置では、酸化物単結晶基板もし
くはシリコン単結晶基板に形成された酸化物単結晶膜上
にシリコン等の半導体をエピタキシャル成長させ、この
エピタキシャル成長により形成された半導体層に素子か
形成されている。(Prior art) Generally, in semiconductor devices that use an insulator such as silicon oxide to electrically isolate elements (isolation run) instead of using a concave junction isolation method, oxide single crystal substrates or silicon A semiconductor such as silicon is epitaxially grown on a single crystal oxide film formed on a single crystal substrate, and elements are formed in the semiconductor layer formed by this epitaxial growth.
従来、たとえば、酸化物単結晶であるサフフイヤ基板上
に素子を形成したSOS <シリコン・オン・す7アイ
ヤ)方式の半導体装置において、す7フイヤ基板上にシ
リコン等に半導体をエピタキシャル成長させる場合には
、原料ガスとして、シラン、四塩化硅素もしくはンシラ
ン等のガスが使用され、キャリヤガスとしては水素力ス
か使用されている。Conventionally, for example, in an SOS (silicon-on-silicon) type semiconductor device in which elements are formed on a sapphire substrate, which is an oxide single crystal, when semiconductors are epitaxially grown on silicon or the like on the oxide substrate, A gas such as silane, silicon tetrachloride or silane is used as a raw material gas, and hydrogen gas is used as a carrier gas.
ところで、シリコン等の半導体をエピタキシャル成長さ
せるには950 ’(:’から1200 ’Cと高い温
度を必要とするため、キャリヤガスである水素と酸化物
単結晶とか還元反応を起し、酸化物単結晶の表面の一部
か金属と酸素に分解されることが知られている。たとえ
ば、酸化物単結晶としてす7アイヤ基板を使用した場合
、す7フイヤ基板の表面では次のような還元反応か起っ
ていると考えられている。By the way, epitaxial growth of semiconductors such as silicon requires high temperatures ranging from 950'(:') to 1200' C, which causes a reduction reaction between the carrier gas hydrogen and the oxide single crystal. It is known that a part of the surface of the oxide is decomposed into metal and oxygen.For example, when a Su7fire substrate is used as an oxide single crystal, the following reduction reaction occurs on the surface of the Su7fire substrate. is thought to be happening.
シート1゜ + ノ\1′″、○、 → A(′2()
+2H2()または、
2脹+AO,=03→2 A (l +02+8.0こ
の還元反応1こより分解した金属や酸素かエピタキシャ
ル成長中の半導体層中に混入および拡散し、」−導木層
の電気的特性と結晶性を著しく阻害Yる。Sheet 1゜ + ノ\1′″, ○, → A(′2()
+2H2 () or 2 + AO, = 03 → 2 A (l +02 + 8.0) The metal and oxygen decomposed from this reduction reaction 1 mix and diffuse into the semiconductor layer during epitaxial growth, and Significantly inhibits properties and crystallinity.
(発明の目的)
本発明は半導体製造時における上記問題点に鑑、春でな
されたものであって、酸化物単結晶基板上もしくはシリ
コン単結晶基板に形成された酸化物111帖晶膜上での
還元反応を抑乏、電気的特性およし入結晶性の良好なシ
リコン等の半導体をエピタキシャル成長させるようにし
た半導体の製造方法を提供rることを目的としている。(Object of the Invention) The present invention was made in the spring in view of the above-mentioned problems in semiconductor manufacturing, and is based on an oxide 111 crystal film formed on an oxide single crystal substrate or a silicon single crystal substrate. It is an object of the present invention to provide a method for manufacturing a semiconductor, which suppresses the reduction reaction of silicon and epitaxially grows a semiconductor such as silicon, which has good electrical characteristics and crystallinity.
(発明の構成)
このため、本発明は、酸化物単結晶基板上もしくはシリ
コン単結晶基板に形成された酸化物単結晶膜上にシリコ
ン等の半導体をエピタキシャル成長させるに際し、エピ
タキシャル成長の初期には、キャリヤがスとして水素ガ
スに代えて不活性のヘリウムガスを使用することを特徴
とするもので・ある。すなわち、本発明は、半導体のエ
ピタキシャル成長の初期にキャリヤガスとして不活性の
ヘリウムガスを使用して酸化物単結晶基板もしくはシリ
コン単結晶基板に形成された酸化物単結晶膜表面での還
元反応を抑えるようにしたちので、還元反応による汚染
のないエピタキシャル成長を行なうことができる。(Structure of the Invention) Therefore, in the present invention, when epitaxially growing a semiconductor such as silicon on an oxide single crystal substrate or an oxide single crystal film formed on a silicon single crystal substrate, carriers are This is characterized by the use of inert helium gas instead of hydrogen gas as gas. That is, the present invention suppresses a reduction reaction on the surface of an oxide single crystal film formed on an oxide single crystal substrate or a silicon single crystal substrate by using inert helium gas as a carrier gas in the early stage of semiconductor epitaxial growth. As a result, epitaxial growth can be performed without contamination due to reduction reactions.
(実施例) 以下、添付図面とともに本発明の詳細な説明する。(Example) Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
現在使用されている典型的なエピタキシャル装置として
は、第1図(a)に示す誘導加熱水平リアクタ、第1図
(b)に示す誘導加熱縦型パンケーキリアクタおよび第
1図(c)に示す輻射加熱によるシリンダをリアクタ等
がある。Typical epitaxial devices currently in use include the induction heating horizontal reactor shown in Figure 1(a), the induction heating vertical pancake reactor shown in Figure 1(b), and the induction heating vertical pancake reactor shown in Figure 1(c). There are reactors and other cylinders that use radiation heating.
いずれのタイプのエピタキシャル装置とも、ベルツヤ1
内に、酸化物単結晶基板もしくは表面に酸化物単結晶膜
が形1#、されたシリコン単結晶基板のウェハ2を載置
した加熱板3を配置し誘導加熱コイル・↓により95
+1 ’(:ないし1200 ’Cに加熱6几たウェハ
2に原料ガス導入口5より原料が入を導入し、ウェハ2
上にシリコン等の半導体をエピタキシャル成長すせるも
のである。For both types of epitaxial equipment, Beltsuya 1
A heating plate 3 on which a wafer 2 of an oxide single-crystal substrate or a silicon single-crystal substrate with an oxide single-crystal film formed on the surface is placed is placed inside the wafer 95 with an induction heating coil ↓.
A raw material is introduced from the raw material gas inlet 5 into the wafer 2 which has been heated to +1' (: to 1200'C for 6 liters).
A semiconductor such as silicon is epitaxially grown thereon.
本発明て′は、これら3つのタイプのエピタキシャル装
置のいずれのらのによってら実施することかでbろ。The present invention may be implemented in any of these three types of epitaxial devices.
次;こ1、これらエピタキシャル装置を使用してサファ
イヤ基板上にシリコンの半導体をエピタキシャル成[<
、’:せる場合の実施例を説明する。Next: 1. Using these epitaxial devices to epitaxially form a silicon semiconductor on a sapphire substrate [<
, ': An example will be described in which it is set.
先す、シリコンの半導体をエピタキシャル成長さでるす
7フイヤ基板(ウェハ2)を加熱板3に載置し、ベルツ
ヤ1内に収容・Vる。First, a 7-layer substrate (wafer 2) on which a silicon semiconductor is grown epitaxially is placed on a heating plate 3 and housed in a belt heater 1.
最初に、キャリヤガスとしてヘリウムを使用するため、
ヘリウムガスバルブ6を開き、ヘリウム容器7内のヘリ
ウムガスとモノシランガス容器8内のモノシランガス(
Si)(、)との混合原料ガスを、原料〃ス導入口5か
呟誘導加熱コイル4によって950 ’Cないし12
+) 0℃に加熱されたす7フイヤ基板2に供給する。First, because we use helium as the carrier gas,
Open the helium gas valve 6 and mix the helium gas in the helium container 7 and the monosilane gas in the monosilane gas container 8 (
The raw material gas mixed with Si) (,) is heated to 950'C to 12°C by the raw material gas inlet 5 or the induction heating coil 4.
+) Supply to the 7-fire substrate 2 heated to 0°C.
このヘリウムガスとの混合原料ガスの供給により、第2
図(、)に示すようにす7フイヤ基板2の表面に100
オングストロームないし500オングストロームの膜厚
にシリコンの半導体9aかエピタキシャル成長すると、
ヘリウムガスバルブ6を閉じて水素ガスバ′ルブ10を
開き、水素容器11内の水素ガスとモノシランガス容器
8内のモノシランガスとの混合原料ガスを原料ガス導入
口5からサフフイヤ基板2に供給し、第2図(a)に示
すように、上記半導体9aの上に引き続いてシリコンの
半導体9bを連続的に、必要な厚さとなるまでエピタキ
シャル成長させる。By supplying this raw material gas mixed with helium gas, the second
As shown in the figure (,), 100 yen is applied to the surface of the 7-layer substrate 2.
When the silicon semiconductor 9a is grown epitaxially to a film thickness of angstroms to 500 angstroms,
The helium gas valve 6 is closed, the hydrogen gas valve 10 is opened, and a raw material gas mixture of hydrogen gas in the hydrogen container 11 and monosilane gas in the monosilane gas container 8 is supplied from the raw material gas inlet 5 to the sapphire substrate 2, as shown in FIG. As shown in (a), a silicon semiconductor 9b is successively epitaxially grown on the semiconductor 9a to a required thickness.
このようにずれは、キャリヤガスをヘリウムガスから水
素ガスに切り替えた時点では、す7フイヤ基板2の表面
は、既に、シリコンの半導体装置dて覆われているため
、す7Tイヤ基板2か水素ガスで・還元されることかな
く、電気的特性および結晶性の良好な半導体9aおよび
91〕を形成する二、とかて′きる。This shift is caused by the fact that at the time the carrier gas is switched from helium gas to hydrogen gas, the surface of the 7T layer substrate 2 is already covered with silicon semiconductor devices, so the surface of the 7T layer substrate 2 is covered with hydrogen gas. It is possible to form semiconductors 9a and 91 with good electrical properties and crystallinity without being reduced by gas.
・Eic明は、サフフイヤ基板2のようなアルミニ′°
ツム等の酸化物単結晶基板の池に、第2図(1〕)に小
才ように、シリコン単結晶基板12の表面にスヒ不ル、
す7アイヤちしくは安定化ノルフニャ等の酸1ヒ物単結
晶膜13を形成したウェハ2を使用することもできる。・Eic light is aluminum '° like Saffire board 2.
On the surface of the silicon single crystal substrate 12, as shown in FIG. 2 (1), on the surface of the silicon single crystal substrate 12.
It is also possible to use a wafer 2 on which a monocrystalline film 13 of a monocrystalline arsenide such as stabilized Norfunya or the like is formed.
(発明の効果)
以上、詳述したことからも明らかなように、本発明は、
半導体のエピタキシャル成長の初期にキャリヤガスとし
て不活性のヘリウムガスを使用して半導体をエピタキシ
ャル成長させる酸化物単結晶基板もしくはシリコン単結
晶基板に形成された酸化物単結晶表面での還元反応を抑
えるようにしたから、酸化物単結晶の還元反応による半
導体の汚染かなく、電気的特性および結晶性の良好な半
導体をエピタキシャル成長させることができる。(Effects of the Invention) As is clear from the detailed description above, the present invention has the following effects:
Inert helium gas is used as a carrier gas in the early stage of semiconductor epitaxial growth to suppress the reduction reaction on the surface of the oxide single crystal formed on the oxide single crystal substrate or silicon single crystal substrate on which the semiconductor is epitaxially grown. Therefore, a semiconductor with good electrical characteristics and crystallinity can be epitaxially grown without contaminating the semiconductor due to the reduction reaction of the oxide single crystal.
また、本発明では、地球上でも資源量か少なく、高価な
ヘリウムガスを1史用しているか、このヘリウムガスの
使用はエピタキシャル成長の初期に必要最小限使用され
、以後は安価な水素ガスを使用しており、従って、工業
的にも安価に半導体装置を製造することか′できる。In addition, in the present invention, helium gas, which is one of the fewest resources on earth and is expensive, is used for the first time, or the use of helium gas is used to the minimum necessary in the initial stage of epitaxial growth, and thereafter, cheap hydrogen gas is used. Therefore, semiconductor devices can be manufactured industrially at low cost.
第1図(a)、第1図(1+)および第1図(C)は夫
々本発明に使用される半導本製造装置の説明図、第2図
(、)および第2図(I〕)は夫々本発明により製造さ
れた半導体の構造を示す断面図である。
2・・・ウェハ、 5・・・原料ガス導入ロー、
6・・・ヘリウムガスバルブ、 7・・・ヘリウム容
器、 8・・・モアシランガス容器、 9a、9b・
・・半導体、10・・・水素がスバルブ、 11・・
・水素容器、12・・・シリコン単結晶基板、 13
・・・酸化物単結晶膜。FIG. 1(a), FIG. 1(1+), and FIG. 1(C) are explanatory diagrams of the semiconductor book manufacturing apparatus used in the present invention, FIG. 2(,), and FIG. 2(I), respectively. ) are cross-sectional views showing the structure of semiconductors manufactured according to the present invention. 2... Wafer, 5... Raw material gas introduction row,
6... Helium gas valve, 7... Helium container, 8... More silane gas container, 9a, 9b.
・・・Semiconductor, 10...Hydrogen is Subaru, 11...
・Hydrogen container, 12...Silicon single crystal substrate, 13
...Oxide single crystal film.
Claims (1)
に形成された酸化物単結晶膜上にシリコン等の半導体を
エピタキシャル成長させる工程において、上記半導体の
キャリヤガスとして、上記半導体のエピタキシャル成長
の初期にはヘリウムガスを使用し、途中から水素ガスに
変えて半導体を連続的にエピタキシャル成長させること
を特徴とする半導体の製造方法。(1) In the process of epitaxially growing a semiconductor such as silicon on an oxide single-crystal substrate or an oxide single-crystal film formed on a silicon single-crystal substrate, it is used as a carrier gas for the semiconductor at the initial stage of the epitaxial growth of the semiconductor. A semiconductor manufacturing method characterized by using helium gas and changing it to hydrogen gas midway through to epitaxially grow a semiconductor continuously.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19342684A JPS6171621A (en) | 1984-09-14 | 1984-09-14 | Manufacture of semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19342684A JPS6171621A (en) | 1984-09-14 | 1984-09-14 | Manufacture of semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6171621A true JPS6171621A (en) | 1986-04-12 |
Family
ID=16307771
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19342684A Pending JPS6171621A (en) | 1984-09-14 | 1984-09-14 | Manufacture of semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6171621A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2571042A1 (en) * | 2010-05-14 | 2013-03-20 | Toyota Jidosha Kabushiki Kaisha | Method for vapor-phase epitaxial growth of semiconductor film |
-
1984
- 1984-09-14 JP JP19342684A patent/JPS6171621A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2571042A1 (en) * | 2010-05-14 | 2013-03-20 | Toyota Jidosha Kabushiki Kaisha | Method for vapor-phase epitaxial growth of semiconductor film |
EP2571042A4 (en) * | 2010-05-14 | 2015-02-18 | Toyota Motor Co Ltd | METHOD FOR STEAM-PHASE EPITAXIAL GROWTH OF SEMICONDUCTOR FILM |
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