KR102294170B1 - Organic Light Emitting Diode Display Device and Method of Fabricating the Same - Google Patents

Abstract

The present invention provides a substrate, a thin film transistor on the substrate, a first electrode connected to a drain electrode of the thin film transistor, and a through hole covering an edge of the first electrode and corresponding to the first electrode a bank layer, a light emitting layer located on the first electrode in the through hole, a second electrode on the light emitting layer, an auxiliary electrode located on the bank layer and in contact with the second electrode, and the auxiliary electrode It provides an organic light emitting diode display, characterized in that it includes a capping layer located on the upper portion of the second electrode except for.

Description

Organic Light Emitting Diode Display Device and Method of Fabricating the Same

The present invention relates to an organic light emitting diode display, and more particularly, to a large area, high resolution organic light emitting diode display capable of providing uniform luminance, and a method for manufacturing the same.

Recently, a flat panel display having excellent characteristics such as reduction in thickness, weight reduction, and low power consumption has been widely developed and applied to various fields.

Among flat panel display devices, an organic light emitting diode display device (OLED display device), also called an organic electroluminescent display device or an organic electroluminescent display device, includes a cathode and a hole as an electron injection electrode. It is a device that emits light by injecting electric charge into the light emitting layer formed between the anode, which is the injection electrode, and extinguishing after pairing of electrons and holes. Such an organic light emitting diode display can be formed on a flexible substrate such as plastic, and because it is a self-luminous type, the contrast ratio is large, and the response time is several microseconds (㎲), so moving images are realized. This is easy, there is no limitation of the viewing angle, is stable even at low temperature, and can be driven with a relatively low voltage of 5V to 15V of DC, so that it is easy to manufacture and design a driving circuit.

The organic light emitting diode display can be divided into a passive matrix type and an active matrix type depending on the driving method. is being used

1 is a circuit diagram of one pixel region of a general organic light emitting diode display.

As shown in FIG. 1 , the organic light emitting diode display includes a gate line GL and a data line DL that cross each other and define a pixel area P, and each pixel area P has a switching thin film. A transistor Ts, a driving thin film transistor Td, a storage capacitor Cst, and a light emitting diode De are formed.

In more detail, the gate electrode of the switching thin film transistor Ts is connected to the gate line GL and the source electrode is connected to the data line DL. The gate electrode of the driving thin film transistor Td is connected to the drain electrode of the switching thin film transistor Ts, and the source electrode is connected to the high potential voltage VDD. The anode of the light emitting diode De is connected to the drain electrode of the driving thin film transistor Td, and the cathode is connected to the low potential voltage VSS. The storage capacitor Cst is connected to the gate electrode and the drain electrode of the driving thin film transistor Td.

Looking at the image display operation of the organic light emitting diode display device, the switching thin film transistor Ts is turned on according to a gate signal applied through the gate wiring GL, and at this time, the data line DL is turned on. The applied data signal is applied to the gate electrode of the driving thin film transistor Td and one electrode of the storage capacitor Cst through the switching thin film transistor Ts.

The driving thin film transistor Td is turned on according to the data signal to control the current flowing through the light emitting diode De to display an image. The light emitting diode De emits light by the current of the high potential voltage VDD transmitted through the driving thin film transistor Td.

That is, since the amount of current flowing through the light emitting diode De is proportional to the size of the data signal, and the intensity of light emitted from the light emitting diode De is proportional to the amount of current flowing through the light emitting diode De, the pixel area P ) indicates different gray levels according to the size of the data signal, and as a result, the organic light emitting diode display displays an image.

The storage capacitor Cst maintains a charge corresponding to the data signal for one frame to keep the amount of current flowing through the light emitting diode De constant and to maintain a constant gradation level displayed by the light emitting diode De. do

The organic light emitting diode display is divided into a bottom light emitting type and a top light emitting type according to the light emission direction. In the bottom light emitting method, light from the light emitting diode is output through the anode toward the substrate on which the thin film transistor is formed, and in the top light emitting method, light from the light emitting diode is output through the cathode in the opposite direction to the substrate. In general, in an organic light emitting diode display, since the thin film transistor is formed under the light emitting diode, the effective light emitting area is limited by the thin film transistor in the bottom light emitting method, and the upper light emitting method has a larger effective light emitting area than the bottom light emitting method. Therefore, the upper light emitting method has a higher aperture ratio than the lower light emitting method, and thus is widely used in large area high-resolution display devices.

However, since the cathode is mainly formed using a metal material, in order for light to be output through the cathode in the top emission type organic light emitting diode display, the cathode must have a relatively thin thickness. Accordingly, the resistance of the cathode increases, and in the large-area high-resolution display device, a low potential voltage drop (VSS voltage drop) occurs due to the resistance of the cathode, resulting in a luminance non-uniformity problem.

The present invention has been proposed to solve the above problems, and an object of the present invention is to provide an organic light emitting diode display having a large area, high resolution, and uniform luminance, and a method for manufacturing the same.

In order to achieve the above object, the present invention provides a substrate, a thin film transistor on the substrate, a first electrode connected to a drain electrode of the thin film transistor, and covering an edge of the first electrode, A bank layer having a through hole corresponding to the electrode, a light emitting layer located on the first electrode in the through hole, a second electrode on the light emitting layer, and a second electrode located on the bank layer and in contact with the second electrode There is provided an organic light emitting diode display comprising an auxiliary electrode and a capping layer positioned on the second electrode except for the auxiliary electrode.

The organic light emitting diode display includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to the pixel.

Alternatively, the organic light emitting diode display includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to each of the sub-pixels.

Alternatively, the organic light emitting diode display includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to two adjacent pixels.

The auxiliary electrode overlaps the first electrode.

The auxiliary electrode is made of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof, and the capping layer is made of an organic material.

In addition, the present invention includes the steps of forming a thin film transistor on a substrate, forming a first electrode connected to a drain electrode of the thin film transistor on the thin film transistor, and a through hole exposing the first electrode. forming a bank layer having a bank layer having; forming a light emitting layer positioned on the first electrode in the through hole; forming a capping layer on the entire surface of the substrate; and spraying a conductive solution on the capping layer corresponding to the bank layer to form an auxiliary electrode in contact with the second electrode A method of manufacturing a light emitting diode display is provided.

The forming of the auxiliary electrode may include dissolving the capping layer on the bank layer by spraying the conductive solution, forming a conductive solution layer in contact with the second electrode, and drying the conductive solution layer. includes

The conductive solution includes a solute and a solvent of a metal material, and the solute is made of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof.

The light emitting layer includes a hole injection layer, a hole transport layer, a light emitting material layer, an electron transport layer and an electron injection layer, and at least one of the hole injection layer, the hole transport layer and the light emitting material layer is formed by a solution process using an organic solution, The solvent of the organic solution is the same as the solvent of the conductive solution.

In the present invention, an organic light emitting diode display having a high aperture ratio and a large area and high resolution is provided by allowing light emitted from the light emitting layer to be output to the outside through the second electrode, and by connecting the second electrode with the auxiliary electrode. The luminance can be made uniform by lowering the resistance of the electrode.

In this case, since the auxiliary electrode is formed on a layer different from the first electrode and can overlap the first electrode, the area of the first electrode is increased to increase the aperture ratio, and the efficiency and lifespan of the display device can be improved.

In addition, since the auxiliary electrode is formed through a solution process after forming the capping layer, the process is simplified and manufacturing time and cost can be reduced.

Meanwhile, since the thickness of the auxiliary electrode can be easily adjusted, it is possible to reduce the resistance of the second electrode while increasing the aperture ratio by reducing the area of the auxiliary electrode.

1 is a circuit diagram of one pixel region of a general organic light emitting diode display.
2 is a cross-sectional view illustrating an organic light emitting diode display device according to a first embodiment of the present invention.
3A is a plan view schematically illustrating an organic light emitting diode display according to a first embodiment of the present invention, and FIG. 3B is a schematic plan view of a bank layer of the organic light emitting diode display according to the first embodiment of the present invention. It is a flat view.
4 is a cross-sectional view illustrating an organic light emitting diode display device according to a second embodiment of the present invention.
5A is a plan view schematically showing an organic light emitting diode display according to a second embodiment of the present invention, and FIG. 5B is a schematic plan view of a bank layer of the organic light emitting diode display according to the second embodiment of the present invention. It is a flat view.
6A to 6G are cross-sectional views illustrating the display device at each stage in the manufacturing process of the organic light emitting diode display device according to the second embodiment of the present invention.
7A is a plan view schematically showing an organic light emitting diode display according to a third embodiment of the present invention, and FIG. 7B is a schematic diagram showing a bank layer of the organic light emitting diode display according to the third embodiment of the present invention. It is a flat view.

Hereinafter, an organic light emitting diode display device and a manufacturing method thereof according to an embodiment of the present invention will be described in detail with reference to the drawings.

-First embodiment-

2 is a cross-sectional view illustrating an organic light emitting diode display device according to a first embodiment of the present invention, and shows a structure corresponding to one pixel area. 3A is a plan view schematically illustrating an organic light emitting diode display according to a first embodiment of the present invention, and FIG. 3B is a schematic plan view of a bank layer of the organic light emitting diode display according to the first embodiment of the present invention. It is a plan view, and FIGS. 3A and 3B show a structure corresponding to one pixel. Here, one pixel includes red, green, and blue sub-pixels SP1, SP2, and SP3, and each of the sub-pixels SP1, SP2, and SP3 corresponds to one pixel area P. It has a structure corresponding to P).

First, as shown in FIG. 2 , a patterned semiconductor layer 122 is formed on the insulating substrate 110 . The substrate 110 may be a glass substrate or a plastic substrate. The semiconductor layer 122 may be made of an oxide semiconductor material. In this case, a light blocking pattern (not shown) and a buffer layer (not shown) may be formed below the semiconductor layer 122 , and the light blocking pattern is the semiconductor layer 122 . ) to prevent the semiconductor layer 122 from being deteriorated by the light by blocking the incident light. Alternatively, the semiconductor layer 122 may be made of polycrystalline silicon, and in this case, both edges of the semiconductor layer 122 may be doped with impurities.

A gate insulating layer 130 made of an insulating material is formed on the entire surface of the substrate 110 on the semiconductor layer 122 . The gate insulating layer 130 may be formed of an inorganic insulating material such as _{silicon oxide (SiO 2 ).} When the semiconductor layer 122 is made of polycrystalline silicon, the gate insulating layer 130 _{may be formed of silicon oxide (SiO 2} ) or silicon nitride (SiNx).

A gate electrode 132 made of a conductive material such as metal is formed on the gate insulating layer 130 to correspond to the semiconductor layer 122 . Also, a gate wiring (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 130 . The gate wiring extends along the first direction, and the first capacitor electrode is connected to the gate electrode 132 .

Meanwhile, in the embodiment of the present invention, the gate insulating layer 130 is formed on the entire surface of the substrate 110 , but the gate insulating layer 130 may be patterned in the same shape as the gate electrode 132 .

An interlayer insulating film 140 made of an insulating material is formed on the entire surface of the substrate 110 on the gate electrode 132 . The interlayer insulating layer 140 _{may be formed of an inorganic insulating material such as silicon oxide (SiO 2} ) or silicon nitride (SiNx), or an organic insulating material such as benzocyclobutene or photo acryl. .

The interlayer insulating layer 140 has first and second contact holes 140a and 140b exposing upper surfaces of both sides of the semiconductor layer 122 . The first and second contact holes 140a and 140b are positioned on both sides of the gate electrode 132 to be spaced apart from the gate electrode 132 . Here, the first and second contact holes 140a and 140b are also formed in the gate insulating layer 130 . In contrast, when the gate insulating layer 130 is patterned to have the same shape as the gate electrode 132 , the first and second contact holes 140a and 140b are formed only in the interlayer insulating layer 140 .

Source and drain electrodes 152 and 154 made of a conductive material such as metal are formed on the interlayer insulating layer 140 . In addition, a data line (not shown), a power line (not shown), and a second capacitor electrode (not shown) extending along the second direction may be formed on the interlayer insulating layer 140 .

The source and drain electrodes 152 and 154 are spaced apart from the center of the gate electrode 132 and contact both sides of the semiconductor layer 122 through the first and second contact holes 140a and 140b, respectively. Although not shown, the data line extends along the second direction and intersects the gate line to define the pixel region P, and the power line is positioned to be spaced apart from the data line. The second capacitor electrode is connected to the drain electrode 154 , and overlaps the first capacitor electrode to form a storage capacitor with the interlayer insulating layer 140 therebetween as a dielectric material.

Meanwhile, the semiconductor layer 122 , the gate electrode 132 , and the source and drain electrodes 152 and 154 form a thin film transistor. Here, the thin film transistor has a coplanar structure in which the gate electrode 132 and the source and drain electrodes 152 and 154 are positioned on one side of the semiconductor layer 122 , that is, on the semiconductor layer 122 .

Alternatively, the thin film transistor may have an inverted staggered structure in which the gate electrode is positioned under the semiconductor layer and the source and drain electrodes are positioned above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

Here, the thin film transistor corresponds to a driving thin film transistor of the organic light emitting diode display device, and a switching thin film transistor (not shown) having the same structure as the driving thin film transistor is further formed on the substrate 110 , the gate electrode of the driving thin film transistor Reference numeral 132 is connected to the drain electrode (not shown) of the switching thin film transistor, and the source electrode 152 of the driving thin film transistor is connected to a power supply line (not shown). In addition, the gate electrode (not shown) and the source electrode (not shown) of the switching thin film transistor are respectively connected to the gate line and the data line.

A protective layer 160 made of an insulating material is formed on the entire surface of the substrate 110 on the source and drain electrodes 152 and 154 . The passivation layer 160 has a flat top surface and has a drain contact hole 160a exposing the drain electrode 154 . Here, the drain contact hole 160a is illustrated as being formed directly above the second contact hole 140b, but may be formed to be spaced apart from the second contact hole 140b.

The passivation layer 160 may be formed of an organic insulating material such as benzocyclobutene or photoacrylic.

A first electrode 162 is formed on the passivation layer 160 using a conductive material having a relatively high work function. The first electrode 162 is formed for each pixel region P, and is in contact with the drain electrode 154 through the drain contact hole 160a. For example, the first electrode 162 may be formed of a transparent conductive material such as indium tin oxide (IZO) or indium zinc oxide (IZO).

Meanwhile, the first electrode 162 may further include a reflective layer (not shown) made of an opaque conductive material. For example, the reflective layer may be formed of an aluminum-palladium-copper (APC) alloy, and the first electrode 162 may have a triple layer structure of ITO/APC/ITO.

In addition, an auxiliary electrode 164 is formed on the passivation layer 160 to be spaced apart from the first electrode 162 , and the auxiliary electrode 164 may be made of the same material as the first electrode 162 .

The auxiliary electrode 164 is formed along the edge of the pixel region P. Referring to FIG. 3A , in more detail, the auxiliary electrode 164 has a lattice shape extending in the first direction and the second direction on the substrate 110 and including one opening for each pixel area P. Referring to FIG. The first electrode 162 is positioned in the opening of the auxiliary electrode 164 .

The bank layer 170 is formed of an insulating material on the first electrode 162 and the auxiliary electrode 164 . The bank layer 170 covers the edges of the first electrode 162 and the auxiliary electrode 164 , and has a through hole 170a exposing the first electrode 162 . Also, referring to FIG. 3B , the bank layer 170 is patterned to correspond to each pixel region P, and the auxiliary electrode 164 between the adjacent bank layers 170 is exposed.

The light emitting layer 180 is formed on the first electrode 162 exposed through the transmission hole 170a of the bank layer 170 . The emission layer 180 includes a hole injecting layer 181 sequentially stacked from an upper portion of the first electrode 162 , a hole transporting layer 182 , and a light-emitting material layer. ) 183 , an electron transporting layer 184 , and an electron injecting layer 185 . The light emitting material layer 183 may be one of red, green, and blue light emitting material layers.

Here, the hole injection layer 181 , the hole transport layer 182 , the electron transport layer 184 , and the electron injection layer 185 are substantially formed on the entire surface of the substrate 110 except the upper part of the auxiliary electrode 164 , and the light emitting material The layer 183 is formed only in the through hole 170a. In contrast, the hole injection layer 181 , the hole transport layer 182 , and the light emitting material layer 183 are formed only in the transmission hole 170a, and the electron transport layer 184 and the electron injection layer 185 are formed on the substrate 110 . It may be formed on the front side.

A second electrode 192 made of a conductive material having a relatively low work function is formed on the light emitting layer 180 over the entire surface of the substrate 110 . The second electrode 192 is in contact with the auxiliary electrode 164 exposed between the adjacent bank layers 170 . Here, the second electrode 192 may be formed of aluminum, magnesium, silver, or an alloy thereof, and has a relatively thin thickness to transmit light. In this case, the light transmittance of the second electrode 192 may be about 45-50%.

The first electrode 162, the light emitting layer 180, and the second electrode 192 form an organic light emitting diode, the first electrode 162 serves as an anode, and the second electrode 192 serves as a cathode ( acts as a cathode). Here, the organic light emitting diode display is a top emission type in which light emitted from the light emitting layer 180 is output to the outside through the second electrode 192 .

In addition, a capping layer 194 is formed on the second electrode 192 over the entire surface of the substrate 110 . The capping layer 194 improves light extraction efficiency in the top emission type organic light emitting diode display.

In the organic light emitting diode display according to the first embodiment of the present invention, by connecting the second electrode 192 with the auxiliary electrode 164 , the resistance of the second electrode 192 can be lowered and the luminance non-uniformity problem can be improved. .

However, in such an organic light emitting diode display device, the hole injection layer 181 and the hole transport layer 182 , the electron transport layer 184 and the electron injection layer 185 , or the electron transport layer 184 and the electron injection layer 186 are Since they are formed on the entire surface of the substrate 110 , these layers are also formed on the auxiliary electrode 164 . Accordingly, in order to bring the second electrode 192 into contact with the auxiliary electrode 164 , the hole injection layer 181 , the hole transport layer 182 , the electron transport layer 184 and the electron injection layer 185 on the auxiliary electrode 164 . , or the electron transport layer 184 and the electron injection layer 186 must be removed, and for this purpose, a photolithography process is required. Since the photolithography process includes several steps such as application of a photoresist film, exposure using a mask, development of the photoresist film, and etching of the target film, the addition of the photolithography process increases manufacturing time and cost.

In addition, in the organic light emitting diode display according to the first embodiment of the present invention, since the auxiliary electrode 164 is formed on the same layer as the first electrode 162 , the first electrode 162 is equal to the area of the auxiliary electrode 164 . ) is reduced, and the effective light emitting area according to the area of the first electrode 162 is reduced. Accordingly, the aperture ratio is reduced, and the efficiency and lifespan of the display device are deteriorated.

-Second embodiment-

4 is a cross-sectional view illustrating an organic light emitting diode display device according to a second embodiment of the present invention, and shows a structure corresponding to one pixel area. 5A is a plan view schematically showing an organic light emitting diode display according to a second embodiment of the present invention, and FIG. 5B is a schematic plan view of a bank layer of the organic light emitting diode display according to the second embodiment of the present invention. It is a plan view, and FIGS. 5A and 5B show a structure corresponding to one pixel. Here, one pixel includes red, green, and blue sub-pixels SP1, SP2, and SP3, and each of the sub-pixels SP1, SP2, and SP3 corresponds to one pixel area P. It has a structure corresponding to P).

First, as shown in FIG. 4 , a patterned semiconductor layer 222 is formed on the insulating substrate 210 . The substrate 210 may be a glass substrate or a plastic substrate. The semiconductor layer 222 may be made of an oxide semiconductor material. In this case, a light blocking pattern (not shown) and a buffer layer (not shown) may be formed under the semiconductor layer 222 , and the light blocking pattern is the semiconductor layer 222 . ) to prevent the semiconductor layer 222 from being deteriorated by the light by blocking the light incident thereon. Alternatively, the semiconductor layer 222 may be made of polycrystalline silicon, and in this case, both edges of the semiconductor layer 222 may be doped with impurities.

A gate insulating layer 230 made of an insulating material is formed on the entire surface of the substrate 210 on the semiconductor layer 222 . The gate insulating layer 230 may be formed of an inorganic insulating material such as _{silicon oxide (SiO 2 ).} When the semiconductor layer 222 is formed of polycrystalline silicon, the gate insulating layer 230 _{may be formed of silicon oxide (SiO 2} ) or silicon nitride (SiNx).

A gate electrode 232 made of a conductive material such as metal is formed on the gate insulating layer 230 to correspond to the semiconductor layer 222 . Also, a gate line (not shown) and a first capacitor electrode (not shown) may be formed on the gate insulating layer 230 . The gate wiring extends along the first direction, and the first capacitor electrode is connected to the gate electrode 232 .

Meanwhile, in the embodiment of the present invention, the gate insulating layer 230 is formed on the entire surface of the substrate 210 , but the gate insulating layer 230 may be patterned in the same shape as the gate electrode 232 .

An interlayer insulating layer 240 made of an insulating material is formed on the entire surface of the substrate 210 on the gate electrode 232 . The interlayer insulating layer 240 _{may be formed of an inorganic insulating material such as silicon oxide (SiO 2} ) or silicon nitride (SiNx), or an organic insulating material such as benzocyclobutene or photo acryl. .

The interlayer insulating layer 240 has first and second contact holes 240a and 240b exposing upper surfaces of both sides of the semiconductor layer 222 . The first and second contact holes 240a and 240b are positioned at both sides of the gate electrode 232 to be spaced apart from the gate electrode 232 . Here, the first and second contact holes 240a and 240b are also formed in the gate insulating layer 230 . In contrast, when the gate insulating layer 230 is patterned to have the same shape as the gate electrode 232 , the first and second contact holes 240a and 240b are formed only in the interlayer insulating layer 240 .

Source and drain electrodes 252 and 254 made of a conductive material such as metal are formed on the interlayer insulating layer 240 . In addition, a data line (not shown), a power line (not shown), and a second capacitor electrode (not shown) extending along the second direction may be formed on the interlayer insulating layer 240 .

The source and drain electrodes 252 and 254 are spaced apart from the center of the gate electrode 232 and contact both sides of the semiconductor layer 222 through the first and second contact holes 240a and 240b, respectively. Although not shown, the data line extends along the second direction and intersects the gate line to define the pixel region P, and the power line is positioned to be spaced apart from the data line. The second capacitor electrode is connected to the drain electrode 254 , and overlaps the first capacitor electrode to form a storage capacitor using the interlayer insulating layer 240 therebetween as a dielectric.

Meanwhile, the semiconductor layer 222 , the gate electrode 232 , and the source and drain electrodes 252 and 254 form a thin film transistor. Here, the thin film transistor has a coplanar structure in which the gate electrode 232 and the source and drain electrodes 252 and 254 are positioned on one side of the semiconductor layer 222 , that is, on the semiconductor layer 222 .

Alternatively, the thin film transistor may have an inverted staggered structure in which the gate electrode is positioned under the semiconductor layer and the source and drain electrodes are positioned above the semiconductor layer. In this case, the semiconductor layer may be made of amorphous silicon.

Here, the thin film transistor corresponds to a driving thin film transistor of the organic light emitting diode display device, and a switching thin film transistor (not shown) having the same structure as the driving thin film transistor is further formed on the substrate 210 , the gate electrode of the driving thin film transistor Reference numeral 232 is connected to the drain electrode (not shown) of the switching TFT, and the source electrode 252 of the driving TFT is connected to a power supply line (not shown). In addition, the gate electrode (not shown) and the source electrode (not shown) of the switching thin film transistor are respectively connected to the gate line and the data line.

A passivation layer 260 made of an insulating material is formed over the entire surface of the substrate 210 on the source and drain electrodes 252 and 254 . The passivation layer 260 has a flat top surface and has a drain contact hole 260a exposing the drain electrode 254 . Here, the drain contact hole 260a is illustrated as being formed directly above the second contact hole 240b, but may be formed to be spaced apart from the second contact hole 240b.

The passivation layer 260 may be formed of an organic insulating material such as benzocyclobutene or photoacrylic.

A first electrode 262 is formed on the passivation layer 260 using a conductive material having a relatively high work function. The first electrode 262 is formed for each pixel region P, and contacts the drain electrode 254 through the drain contact hole 260a. For example, the first electrode 262 may be formed of a transparent conductive material such as indium tin oxide (IZO) or indium zinc oxide (IZO).

Meanwhile, the first electrode 262 may further include a reflective layer (not shown) made of an opaque conductive material. For example, the reflective layer may be formed of an aluminum-palladium-copper (APC) alloy, and the first electrode 262 may have a triple layer structure of ITO/APC/ITO.

A bank layer 270 made of an insulating material is formed on the first electrode 262 . The bank layer 270 covers the edge of the first electrode 262 and has a through hole 270a exposing the first electrode 262 . Referring to FIG. 5B , the bank layers 270 corresponding to the adjacent pixel regions P are connected to each other and integrally formed.

The light emitting layer 280 is formed on the first electrode 262 exposed through the transmission hole 270a of the bank layer 270 . The light emitting layer 280 includes a hole injection layer 281 sequentially stacked from the top of the first electrode 262 , a hole transport layer 282 , a light emitting material layer 283 , an electron transport layer 284 , and an electron injection layer 285 . ) is included. The light-emitting material layer 283 may be one of red, green, and blue light-emitting material layers.

Here, the hole injection layer 281 , the hole transport layer 282 , and the light emitting material layer 283 are formed only in the transmission hole 270a , and the electron transport layer 284 and the electron injection layer 285 are substantially formed on the substrate 210 . ) is formed in the front. On the other hand, the hole injection layer 281 , the hole transport layer 282 , the electron transport layer 284 , and the electron injection layer 285 are substantially formed on the entire surface of the substrate 210 , and the light emitting material layer 283 is a through hole. It may be formed only within 270a. Alternatively, the hole injection layer 281 , the hole transport layer 282 , the light emitting material layer 283 , the electron transport layer 284 , and the electron injection layer 285 may all be formed only in the transmission hole 270a.

A second electrode 292 made of a conductive material having a relatively low work function is formed on the light emitting layer 280 over the entire surface of the substrate 210 . Here, the second electrode 292 may be formed of aluminum, magnesium, silver, or an alloy thereof, and has a relatively thin thickness to transmit light. In this case, the light transmittance of the second electrode 292 may be about 45-50%.

The first electrode 262, the light emitting layer 280, and the second electrode 292 form an organic light emitting diode, the first electrode 262 serves as an anode, and the second electrode 292 is a cathode ( acts as a cathode). Here, the organic light emitting diode display is a top emission type in which light emitted from the light emitting layer 280 is output to the outside through the second electrode 292 .

Next, an auxiliary electrode 296 is formed on the second electrode 292 on the bank layer 270 , and a capping layer 294 is substantially formed on the second electrode 292 except for the auxiliary electrode 296 . is formed on the entire surface of the substrate 210 . In FIG. 4 , it is shown that the auxiliary electrode 296 is not formed on the bank layer 270 on the drain electrode 254 , but the auxiliary electrode 296 is also on the bank layer 270 on the drain electrode 254 . may be formed, and if necessary, the auxiliary electrode 296 may be omitted on the bank layer 270 on the drain electrode 254 .

The capping layer 294 may be made of an organic material, and improve light extraction efficiency in a top emission type organic light emitting diode display.

Referring to FIG. 5A , the auxiliary electrode 296 extends in the first direction and the second direction on the substrate 210 and has a lattice shape including one opening for each pixel area P. Referring to FIG. The auxiliary electrode 296 may be formed of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof. The auxiliary electrode 296 may partially overlap the first electrode 262 .

In the organic light emitting diode display according to the second embodiment of the present invention, by connecting the second electrode 292 to the auxiliary electrode 296 , the resistance of the second electrode 292 can be lowered and the luminance non-uniformity problem can be improved. .

Since the auxiliary electrode 296 is formed on a different layer from the first electrode 262 and can overlap the first electrode 262 , the area of the first electrode 262 is increased to increase the area of the first electrode 262 . As a result, the effective light emitting area is increased. Accordingly, the aperture ratio is increased, and the efficiency and lifespan of the display device can be improved.

A method of manufacturing the organic light emitting diode display according to the second embodiment of the present invention will be described with reference to the drawings.

6A to 6G are cross-sectional views illustrating the display device at each stage in the manufacturing process of the organic light emitting diode display device according to the second embodiment of the present invention.

As shown in FIG. 6A , a semiconductor material layer (not shown) is formed by depositing a semiconductor material on the insulating substrate 210, and then the semiconductor material layer is selectively removed through a photolithography process using a mask to remove the semiconductor layer. (222).

Here, the insulating substrate 210 may be a glass substrate or a plastic substrate. In addition, the semiconductor layer 222 may be made of an oxide semiconductor material, and the oxide semiconductor material is indium gallium zinc oxide (IGZO) or indium tin zinc oxide (ITZO). ), indium zinc oxide (IZO), zinc oxide (ZnO), indium gallium oxide (IGO) or indium aluminum zinc oxide : IAZO). In this case, a light blocking pattern (not shown) and a buffer layer (not shown) may be further formed under the semiconductor layer 222 .

Alternatively, the semiconductor layer 222 may be made of polycrystalline silicon.

Next, an insulating material is deposited on the semiconductor layer 222 by a method such as chemical vapor deposition to form a gate insulating layer 230 on the entire surface of the substrate 210 . The gate insulating layer 230 may be formed of an inorganic insulating material such as silicon _{oxide (SiO 2 ) or silicon nitride (SiNx).} When the semiconductor layer 222 is formed of an oxide semiconductor material, the gate insulating layer 230 is preferably formed of _{silicon oxide (SiO 2 ).}

Next, a first conductive material layer (not shown) is formed by depositing a conductive material such as a metal on the gate insulating layer 230 by a method such as sputtering, and then the first conductive material layer is subjected to a photolithography process using a mask. is selectively removed to form the gate electrode 232 . The gate electrode 232 has a narrower width than the semiconductor layer 222 and is positioned to correspond to the center of the semiconductor layer 222 .

The gate electrode 232 may be formed of at least one of aluminum (A), copper (Cu), molybdenum (Mo), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof.

Meanwhile, a first capacitor electrode (not shown) and a gate wiring (not shown) are formed together with the gate electrode 232 . Although not shown, the first capacitor electrode is connected to the gate electrode 232 , and the gate wiring extends along the first direction.

Next, an insulating material is deposited or coated on the gate electrode 232 to form the interlayer insulating layer 240 on the entire surface of the substrate 210 , and the interlayer insulating layer 240 and the gate insulating layer 230 are formed through a photolithography process using a mask. ) is selectively removed to form first and second contact holes 240a and 240b exposing both upper surfaces of the semiconductor layer 222 . The first and second contact holes 240a and 240b are positioned at both sides of the gate electrode 232 to be spaced apart from the gate electrode 232 .

The interlayer insulating layer 240 _{may be formed of an inorganic insulating material such as silicon oxide (SiO 2} ) or silicon nitride (SiNx), or an organic insulating material such as benzocyclobutene or photo acryl. .

Next, a second conductive material layer (not shown) is formed by depositing a conductive material such as a metal on the upper portion of the interlayer insulating layer 240 by sputtering or the like, and then the second conductive material layer is subjected to a photolithography process using a mask. are selectively removed to form source and drain electrodes 252 and 254 . The source and drain electrodes 252 and 254 are spaced apart from each other with respect to the gate electrode 232 and contact both sides of the semiconductor layer 222 through the first and second contact holes 240a and 240b, respectively.

The source and drain electrodes 252 and 254 may be formed of at least one of aluminum (A), copper (Cu), molybde (Mo), chromium (Cr), nickel (Ni), tungsten (W), or an alloy thereof. can

Meanwhile, a data line (not shown), a second capacitor electrode (not shown), and a power supply line (not shown) are formed together with the source and drain electrodes 252 and 254 . Although not shown, the data line extends along the second direction and crosses the gate line to define a pixel area. The second capacitor electrode is connected to the drain electrode 254 , and the power line is spaced apart from the data line.

Next, as shown in FIG. 6B, an insulating material is deposited or coated on the source and drain electrodes 252 and 254 to form a protective film 260 on the entire surface of the substrate 210, and a photolithography process using a mask is performed. The passivation layer 260 is selectively removed through the drain contact hole 260a exposing the drain electrode 254 to form. The drain contact hole 260a is formed directly above the second contact hole 240b, and the drain contact hole 260a may be formed to be spaced apart from the second contact hole 240b.

The passivation layer 260 _{may be formed of an inorganic insulating material such as silicon oxide (SiO 2} ) or silicon nitride (SiNx), or an organic insulating material such as benzocyclobutene or photo acryl. It is preferably formed of an organic insulating material to have a flat surface.

Next, a conductive material having a relatively high work function is deposited on the passivation layer 260 by a method such as sputtering to form a first electrode material layer (not shown), and a photolithography process using a mask to form the first electrode material layer is selectively removed to form the first electrode 262 . The first electrode 262 is located in each pixel region and contacts the drain electrode 254 through the drain contact hole 260a.

The first electrode 262 may include a transparent conductive layer and a reflective layer. The transparent conductive layer may be made of indium tin oxide (ITO) or indium zinc oxide (IZO), and the reflective layer is an aluminum-palladium-copper (APC) alloy. can be made with For example, the first electrode 262 may have a triple layer structure of ITO/APC/ITO.

Next, as shown in FIG. 6C , an insulating material is deposited or coated on the first electrode 262 to form a bank material layer (not shown) on the entire surface of the substrate 210 , and a photolithography process using a mask The bank layer 270 having the through hole 270a is formed by selectively removing the bank material layer. The bank layer 270 covers the edge of the first electrode 262 , and the first electrode 262 is exposed through the through hole 270a.

Next, as shown in FIG. 6D , the hole injection material and the hole transport material by a solution process using an injector (not shown) on the exposed first electrode 262 in the through hole 270a. and a light-emitting material, respectively, to sequentially form the hole injection layer 281 , the hole transport layer 282 , and the light-emitting material layer 283 . A printing method or a coating method may be used as the solution process, and for example, an ink-jetting method, a nozzle printing method, or a screen printing method may be used.

Here, the light emitting material layer 283 of FIG. 6D may be any one of red, green, and blue light emitting material layers, and the remaining light emitting material layers are sequentially formed in adjacent pixel areas. For example, the light emitting material layer 283 of FIG. 6D may be a red light emitting material layer in the red pixel region. Accordingly, a red light-emitting material layer 283 is formed in a red pixel region by forming a red light-emitting material through a solution process, and a green light-emitting material layer (not shown) in a green pixel area by forming a green light-emitting material through a solution process A blue light emitting material layer (not shown) is formed in the blue pixel region by forming a blue light emitting material through a solution process. The formation order of the red, green, and blue light emitting material layers may be changed.

Next, as shown in FIG. 6E , an electron transporting material and an electron injection material are vacuum-deposited on the light emitting material layer 283 , and the electron transporting layer 284 and the electron injection layer 285 are sequentially formed on the entire surface of the substrate 210 . to form

The hole injection layer 281 , the hole transport layer 282 , the light emitting material layer 283 , the electron transport layer 284 , and the electron injection layer 285 on the first electrode 262 form the light emitting layer 280 .

When the hole injection layer 281, the hole transport layer 282, the light emitting layer 283, the electron transport layer 284, and the electron injection layer 285 are formed for each pixel area by vacuum deposition using a fine metal mask, Problems such as alignment precision and mass productivity between the mask and the substrate 210 occur, and as the size of the substrate 210 increases, problems such as sagging of the mask may occur. In the example, the hole injection layer 281 , the hole transport layer 282 , and the light emitting material layer 283 are formed through a solution process, and the electron transport layer 284 and the electron injection layer 285 are vacuumed on the entire surface of the substrate 210 . Since it is formed by a vapor deposition method, problems such as alignment accuracy problems and mask sagging between the mask and the substrate 210 can be prevented.

Meanwhile, the hole injection layer 281 and the hole transport layer 282 may be formed by vacuum deposition. In this case, the hole injection layer 281 and the hole transport layer 282 are formed on the entire surface of the substrate 210 .

Next, a second electrode 292 is formed on the entire surface of the substrate 210 by depositing a conductive material having a relatively low work function on the electron injection layer 285 by sputtering or the like. The second electrode 292 may be formed of a metal material such as aluminum, magnesium, or silver, and has a relatively thin thickness to allow light to pass therethrough.

Next, an organic material is vacuum-deposited on the second electrode 292 to form a capping layer 294 on the entire surface of the substrate 210 .

Next, as shown in FIG. 6F , the conductive solution layer 296a is formed by spraying the conductive solution on the bank layer 270 using the spraying device 298 . The conductive solution layer 296a melts the capping layer 294 on the bank layer 270 and contacts the lower second electrode 292 . Here, the conductive solution layer 296a may be formed by an ink jetting method, a nozzle printing method, a screen printing method, or _{the like in a nitrogen (N 2 ) atmosphere at normal pressure.} At this time, since the thickness of the conductive solution layer 296a varies according to the number of applications, the required thickness can be obtained by controlling the number of applications. do. Accordingly, the conductive solution layer 296a having a desired thickness can be formed by performing 1 to 10 coatings in the case of the inkjet method and 1 to 2 times in the printing method.

The conductive solution includes a solute of the metal material and a solvent capable of dissolving the organic material of the capping layer 294 . The solute may be at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof, and the form is not limited as long as it can be dissolved in a solvent, and for example, a nanowire (nanowire) or paste. In addition, the solvent dissolves the organic material of the capping layer 294 , makes it easy for the solute to contact the second electrode 292 , and forms the hole injection layer 281 , the hole transport layer 282 or the light emitting material layer 283 . It may be the same as the solvent of the organic solution used in the solution process. For example, the solvent is ethylene glycol, 4-methylanisole, ethyl benzoate, isopropyl alcohol (IPA), acetone, or N-methylpyro It may be ridone (N-methyl pyrrolidone).

Next, as shown in FIG. 6G , the conductive solution layer ( 296a in FIG. 6F ) is dried to form an auxiliary electrode 296 made of a solute of a metal material on the bank layer 270 . The auxiliary electrode 296 is in contact with the second electrode 292 to lower the resistance of the second electrode 292 . In this case, the conductive solution layer ( 296a in FIG. 6F ) may be dried by vacuum drying and/or heat drying. For example, in the case of vacuum drying, ^{it may be carried out for about 5 to 60 minutes at a pressure of 10 -2} torr or less, and in the case of heat drying, it may be carried out for 0.5 to 4 hours at a pressure of ^{10 3 torr or less,} After vacuum drying, the step of heating and drying may be repeated one or more times.

In the organic light emitting diode display device according to the second embodiment of the present invention, after the capping layer 294 is formed, the auxiliary electrode 296 is formed through a solution process, thereby simplifying the process and reducing manufacturing time and cost.

In addition, the thickness of the auxiliary electrode 296 formed by the solution process can be easily adjusted. Accordingly, the area of the auxiliary electrode 296 may be reduced by increasing the thickness of the auxiliary electrode 296 , and thus the aperture ratio may be increased.

-Third embodiment-

7A is a plan view schematically showing an organic light emitting diode display according to a third embodiment of the present invention, and FIG. 7B is a schematic diagram showing a bank layer of the organic light emitting diode display according to the third embodiment of the present invention. It is a plan view, and FIGS. 7A and 7B show a structure corresponding to one pixel. Here, one pixel includes red, green, and blue sub-pixels SP1, SP2, and SP3, and each of the sub-pixels SP1, SP2, and SP3 corresponds to one pixel area P. The organic light emitting diode display according to the third embodiment of the present invention has the same structure as the organic light emitting diode display according to the second embodiment shown in FIG. 4 , and a description thereof will be omitted.

7A and 7B , a first electrode 362 is formed in each pixel region P, and a bank layer 370 is formed on the first electrode 362 . The bank layer 370 covers the edge of the first electrode 362 and has a through hole 370a exposing the first electrode 262 . The bank layers 370 corresponding to the adjacent pixel regions P are connected to each other and integrally formed.

Next, a light emitting layer (not shown) is formed on the first electrode 362 exposed through the transmission hole 370a of the bank layer 370 , and a second electrode (not shown) is formed on the light emitting layer by a substrate (not shown). not) is formed on the front side. An auxiliary electrode 396 is formed on the second electrode on the bank layer 370 , and a capping layer (not shown) is formed on the second electrode except for the auxiliary electrode 396 .

The auxiliary electrode 396 extends in the first direction and the second direction on the substrate and has a lattice shape including one opening for each pixel. That is, the auxiliary electrode is not formed between the adjacent sub-pixels SP1 , SP2 , and SP3 within one pixel.

Accordingly, the width of the bank layer 370 between the adjacent sub-pixels SP1, SP2, and SP3 in one pixel can be narrower than the width of the bank layer (270 in FIG. 5B) in the second embodiment, and each pixel area P ) can be enlarged to increase the aperture ratio. At this time, by adjusting the thickness of the auxiliary electrode 396, the resistance of the second electrode can be made the same as in the second embodiment.

Meanwhile, although not shown, the auxiliary electrode may have one opening corresponding to two pixels. That is, the auxiliary electrode has one opening corresponding to the adjacent first and second pixels, and between the first pixel and the second pixel, between the adjacent sub-pixels within the first pixel, and the adjacent sub-pixels within the second pixel. An auxiliary electrode is not formed between them.

Accordingly, the width of the bank layer between the first pixel and the second pixel can be narrowed than the width of the bank layer (370 in FIG. 7B ) between adjacent pixels in the third embodiment, and accordingly, the area of each pixel region P is further increased. It can be widened to further increase the aperture ratio. At this time, by adjusting the thickness of the auxiliary electrode, the resistance of the second electrode can be made the same as in the third embodiment.

Although the above has been described with reference to the preferred embodiment of the present invention, those of ordinary skill in the art can variously modify the present invention within the scope without departing from the spirit and scope of the present invention described in the claims below. and may be changed.

110, 210: substrate 122, 222: semiconductor layer
130, 230: gate insulating film 132, 232: gate electrode
140, 240: interlayer insulating film 140a, 240a, 140b, 240b: first and second contact holes
152, 252: source electrode 154, 254: drain electrode
160, 260: passivation layer 160a, 260a: drain contact hole
162, 262, 362: first electrode 164, 296, 396: auxiliary electrode
170, 270, 370: bank layer 170a, 270a, 370a: through hole
170b: auxiliary contact hole 180, 280: light emitting layer
181, 281: hole injection layer 182, 282: hole transport layer
183, 283: light emitting material layer 184, 284: electron transport layer
185, 285: electron injection layer 192, 292: second electrode
194, 294: capping layer 298: injection device
P: pixel area SP1, SP2, SP3: sub-pixel

Claims (10)

a substrate;
a thin film transistor on the substrate;
a first electrode connected to the drain electrode of the thin film transistor;
a bank layer covering an edge of the first electrode and having a through hole corresponding to the first electrode;
a light emitting layer positioned on the first electrode in the through hole;
a second electrode on the light emitting layer;
an auxiliary electrode positioned on the bank layer and in contact with the second electrode;
A capping layer positioned on the second electrode except for the auxiliary electrode
An organic light emitting diode display comprising a.
According to claim 1,
The organic light emitting diode display device includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to the pixel.
According to claim 1,
The organic light emitting diode display device includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to each of the sub-pixels.
According to claim 1,
The organic light emitting diode display device includes a pixel including a plurality of sub-pixels, and the auxiliary electrode has one opening corresponding to two adjacent pixels.
According to claim 1,
and the auxiliary electrode overlaps the first electrode.
According to claim 1,
The auxiliary electrode is made of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof, and the capping layer is made of an organic material. .
forming a thin film transistor on a substrate;
forming a first electrode connected to a drain electrode of the thin film transistor on the thin film transistor;
forming a bank layer having a through hole exposing the first electrode;
forming a light emitting layer located on the first electrode in the through hole;
forming a second electrode on the entire surface of the substrate over the light emitting layer;
forming a capping layer on the entire surface of the substrate over the second electrode;
forming an auxiliary electrode in contact with the second electrode by spraying a conductive solution on the capping layer corresponding to the bank layer
It is characterized in that it comprises
The forming of the auxiliary electrode may include dissolving the capping layer on the bank layer by spraying the conductive solution, forming a conductive solution layer in contact with the second electrode, and drying the conductive solution layer. A method of manufacturing an organic light emitting diode display comprising a.
delete 8. The method of claim 7,
The conductive solution includes a solute and a solvent of a metal material, and the solute is organic light-emitting, characterized in that it is made of at least one of gold (Au), silver (Ag), aluminum (Al), copper (Cu), and alloys thereof. A method of manufacturing a diode display device.
10. The method of claim 9,
The light emitting layer includes a hole injection layer, a hole transport layer, a light emitting material layer, an electron transport layer and an electron injection layer, and at least one of the hole injection layer, the hole transport layer and the light emitting material layer is formed by a solution process using an organic solution, The method of manufacturing an organic light emitting diode display, characterized in that the solvent of the organic solution is the same as the solvent of the conductive solution.

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