LU72605A1 - - Google Patents
Info
- Publication number
- LU72605A1 LU72605A1 LU72605A LU72605A LU72605A1 LU 72605 A1 LU72605 A1 LU 72605A1 LU 72605 A LU72605 A LU 72605A LU 72605 A LU72605 A LU 72605A LU 72605 A1 LU72605 A1 LU 72605A1
- Authority
- LU
- Luxembourg
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19742445091 DE2445091A1 (en) | 1974-09-20 | 1974-09-20 | Storage FET with insulated storage gate - has insulated control gate and is fitted with high internal capacitance between gates |
| DE19742445078 DE2445078C3 (en) | 1974-09-20 | Electronic memory produced using integrated technology | |
| DE2445137A DE2445137C3 (en) | 1974-09-20 | 1974-09-20 | Method for operating an n-channel memory FET, n-channel memory FET for carrying out the method and applying the method to the n-channel memory FETs of a memory matrix |
| DE2445079A DE2445079C3 (en) | 1974-09-20 | 1974-09-20 | Storage field effect transistor |
| DE2505816A DE2505816C3 (en) | 1974-09-20 | 1975-02-12 | Method for operating an n-channel memory FET, n-channel memory FET for carrying out the method and applying the method to the n-channel memory FETs of a memory matrix |
| DE2513207A DE2513207C2 (en) | 1974-09-20 | 1975-03-25 | n-channel memory FET |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| LU72605A1 true LU72605A1 (en) | 1975-08-21 |
Family
ID=27544228
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| LU72605A LU72605A1 (en) | 1974-09-20 | 1975-05-28 |
Country Status (1)
| Country | Link |
|---|---|
| LU (1) | LU72605A1 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2603154A1 (en) * | 1976-01-28 | 1977-08-04 | Siemens Ag | LSI programmable 3 dimensional matrix memory - has eight two dimensional 8x64 matrix memory circuits of insulated gate FET's |
| DE2711895A1 (en) * | 1976-03-26 | 1977-10-06 | Hughes Aircraft Co | FIELD EFFECT TRANSISTOR WITH TWO GATE ELECTRODES AND METHOD FOR MANUFACTURING IT |
| DE2727419A1 (en) * | 1976-06-18 | 1977-12-29 | Ncr Co | MATRIX MEMORY |
| DE2638730A1 (en) * | 1974-09-20 | 1978-03-02 | Siemens Ag | N-channel storage FET with floating storage gate - has storage gate controlled channel bounding FET source with thin insulator in between |
| DE2643932A1 (en) * | 1974-09-20 | 1978-03-30 | Siemens Ag | N-Channel storage FET with one or several gates - has two conductive strips coupled to storage gate, each covering part of drain and source respectively |
| DE2643948A1 (en) * | 1976-09-29 | 1978-03-30 | Siemens Ag | Component module with matrix of storage FETs - has substrate layer on support, containing drain, channel and source regions partly coated by insulation |
| DE2643987A1 (en) * | 1974-09-20 | 1978-03-30 | Siemens Ag | N-Channel storage FET with one or more gates - has semiconductor region insulated by charge reversing region from both main path connecting regions |
-
1975
- 1975-05-28 LU LU72605A patent/LU72605A1/xx unknown
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2638730A1 (en) * | 1974-09-20 | 1978-03-02 | Siemens Ag | N-channel storage FET with floating storage gate - has storage gate controlled channel bounding FET source with thin insulator in between |
| DE2643932A1 (en) * | 1974-09-20 | 1978-03-30 | Siemens Ag | N-Channel storage FET with one or several gates - has two conductive strips coupled to storage gate, each covering part of drain and source respectively |
| DE2643987A1 (en) * | 1974-09-20 | 1978-03-30 | Siemens Ag | N-Channel storage FET with one or more gates - has semiconductor region insulated by charge reversing region from both main path connecting regions |
| DE2603154A1 (en) * | 1976-01-28 | 1977-08-04 | Siemens Ag | LSI programmable 3 dimensional matrix memory - has eight two dimensional 8x64 matrix memory circuits of insulated gate FET's |
| DE2711895A1 (en) * | 1976-03-26 | 1977-10-06 | Hughes Aircraft Co | FIELD EFFECT TRANSISTOR WITH TWO GATE ELECTRODES AND METHOD FOR MANUFACTURING IT |
| DE2727419A1 (en) * | 1976-06-18 | 1977-12-29 | Ncr Co | MATRIX MEMORY |
| DE2643948A1 (en) * | 1976-09-29 | 1978-03-30 | Siemens Ag | Component module with matrix of storage FETs - has substrate layer on support, containing drain, channel and source regions partly coated by insulation |
