US3650822A - Method of producing epitactic semiconductor layers on foreign substrates - Google Patents
Method of producing epitactic semiconductor layers on foreign substrates Download PDFInfo
- Publication number
- US3650822A US3650822A US860942A US3650822DA US3650822A US 3650822 A US3650822 A US 3650822A US 860942 A US860942 A US 860942A US 3650822D A US3650822D A US 3650822DA US 3650822 A US3650822 A US 3650822A
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- United States
- Prior art keywords
- melt
- substrate body
- substrate
- semiconductor material
- semiconductor
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- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 30
- 239000000155 melt Substances 0.000 claims abstract description 21
- 239000000463 material Substances 0.000 claims abstract description 19
- 239000000203 mixture Substances 0.000 claims abstract description 8
- 239000000126 substance Substances 0.000 claims abstract description 8
- 229910052596 spinel Inorganic materials 0.000 claims description 8
- 239000011029 spinel Substances 0.000 claims description 8
- 238000001556 precipitation Methods 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical group [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 3
- 229910003023 Mg-Al Inorganic materials 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 3
- 239000002019 doping agent Substances 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical group [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims 1
- 229910052593 corundum Inorganic materials 0.000 claims 1
- 229910001845 yogo sapphire Inorganic materials 0.000 claims 1
- 239000013078 crystal Substances 0.000 description 5
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- -1 gallium arsenide Chemical class 0.000 description 1
- 230000009548 growth disturbance Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/007—Pulling on a substrate
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
- C30B15/32—Seed holders, e.g. chucks
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B19/00—Liquid-phase epitaxial-layer growth
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/065—Gp III-V generic compounds-processing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/072—Heterojunctions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/107—Melt
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/15—Silicon on sapphire SOS
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/967—Semiconductor on specified insulator
Definitions
- ABSTRACT [30] Foreign Application Priority Data A method of producing thin, monocrystalline layers of semiconductor material, upon a monocrystalline, preferably Sept. 30, 1968 Germany ..P 17 94 273.3 wafebshaped, substrate y of another chemical composi tion, but having the same or a similar lattice structure, by an [52] US. Cl ..117/201, 117/120, 23/301 SP epitacfic growth procem
- the substrate body is immersed into [51] 3'- 1/18, 0117/40 a melt comprising the appropriate semiconductor material.
- a Fleld Of Search ..1 A temperature balance between the substrate and the melt is established. Thereafter the semiconductor material epitactically grown on the surface of the substrate body, by slowly pulling the substrate body out from the melt.
- My invention relates to a method to produce epitaxially thin, monocrystalline layers comprised of semiconductor material, upon a monocrystalline, preferably wafer-shaped, substrate body comprised of another chemical composition but having the same or similar lattice structure.
- Precipitations in the substrate which can occur, when heat treatments in the substrate at the temperature range of precipitation should not produce growth disturbances in the growing layer;
- the method of the invention eliminates the aforedescribed disadvantages by immersing the substrate body into a melt, comprised of the respective semiconductor material.
- An epitactic growth of semiconductor material be effected on the surface of the substrate body by establishing a temperature balance between the substrate body and the melt and thereafter slowly pulling the substrate body out from the melt.
- a substrate body which possesses properties of electrical insulation, and, preferably, a spinel structure.
- Very satisfactory results were obtained when a Mg-Al spinel crystal, is used as a substrate, having a composition of MgO:Al O as 1:] to 123.5, and preferably 1:1 to 1:25 It is preferable that the substrate surface, intended for coating, have a 100) plane orientation.
- the substrate surface selected for coating is oriented in the (001) plane.
- Silicon, germanium or A'"B" compounds, particularly gallium arsenide, can be deposited as semiconductor materials.
- dopant substances are being added to the melt.
- the method of the invention affords the possibility to produce thin-layer semiconductor components on foreign substances and, if necessary, to form the same from multiple monocrystalline layers.
- FIG. 1 shows the body produced by the invention
- FIG. 2 schematically illustrates the producing of the body.
- FIG. 1 illustrates a simple layer sequence, which occurs by the invention, the monocyrstalline substrate body 1, is a Mg- Al spinel, preferably wafer-shaped, of the following composition: MgO:Al O; '-1:2.5.
- a silicon layer 2, approximately 1011. thick, is deposited by epitactic precipitation upon the substrate body.
- the silicon layer which occurs, of necessity, on the bottom side of the substrate body is removed by mechanical means, or through etching.
- The, thus obtained, spinel crystal provided with the semiconductor layer, IS being further processed according to known methods of the planar technique, into integrated semiconductor circuits, having an insulated foreign substrate.
- FIG. 2 schematically illustrates a device for performing the method of the invention.
- 3 indicates the semiconductor metal, located in a crucible 4.
- a semiconductor layer 2 is epitactically produced on the surfaces oriented in a plane by pulling, from said semiconductor melt at a velocity of 50 mm./hr., in the direction of arrow 5, a monocrystalline Mg-Al spinel crystal 1 as a seed.
- a method of producing thin, monocrystalline layers of semiconductor material, upon a monocrystalline, preferably wafer-shaped substrate body of another chemical composition, but having the same or a similar lattice structure by employing an epitactic growth process, which comprises immersing a substrate which has electrically insulating properties and a spinel structure into a melt comprising the appropriate semiconductor material establishing a temperature balance between the substrate body and the melt, and thereafter slowing pulling the substrate body from the melt at a velocity of 50 to 100 mm./hr. to effect an epitactic growth of semiconductor material on the surface of the substrate body.
- melt is gallium arsenide
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
A method of producing thin, monocrystalline layers of semiconductor material, upon a monocrystalline, preferably wafershaped, substrate body of another chemical composition, but having the same or a similar lattice structure, by an epitactic growth process. The substrate body is immersed into a melt comprising the appropriate semiconductor material. A temperature balance between the substrate body and the melt, is established. Thereafter the semiconductor material epitactically grown on the surface of the substrate body, by slowly pulling the substrate body out from the melt.
Description
United States Patent Grabmaier Mar. 21, 1972 [54] METHOD or PRODUCING EPITACTIC Lsgl ReterelLes tilted SEMICONDUCTOR LAYERS ON UNITED STATES PATENTS FOREIGN SUBSTRATES 3,341,361 9/1967 Gorski ...1 17/120 [72] Inventor: Josef Grabmaier, Unterhaching, Germany 3 411 94 11 19 3 T a 1 17 20 [73] Assign: Siemens Aktiengmuschafi Berlin" Gap 3,414,434 12/1968 I Manasevrt ..117/201 many Primary ExaminerWilliam P. Jarvis [22] Filed: Sept. 25, 1969 Anomey-Curt M. Avery, Arthur E. Wilfond, Herbert L.
Lerner and Daniel J. Tick [21] Appl. No.: 860,942
' [57] ABSTRACT [30] Foreign Application Priority Data A method of producing thin, monocrystalline layers of semiconductor material, upon a monocrystalline, preferably Sept. 30, 1968 Germany ..P 17 94 273.3 wafebshaped, substrate y of another chemical composi tion, but having the same or a similar lattice structure, by an [52] US. Cl ..117/201, 117/120, 23/301 SP epitacfic growth procem The substrate body is immersed into [51] 3'- 1/18, 0117/40 a melt comprising the appropriate semiconductor material. A Fleld Of Search ..1 A; temperature balance between the substrate and the melt is established. Thereafter the semiconductor material epitactically grown on the surface of the substrate body, by slowly pulling the substrate body out from the melt.
2-- i 3 k ewinsfis r s METHOD OF PRODUCING EPITACTIC SEMICONDUCTOR LAYERS ON FOREIGN SUBSTRATES My invention relates to a method to produce epitaxially thin, monocrystalline layers comprised of semiconductor material, upon a monocrystalline, preferably wafer-shaped, substrate body comprised of another chemical composition but having the same or similar lattice structure.
When integrated semiconductor circuits are produced on a foreign substrate material, it is desirable to precipitate, the thinnest possible layers of semiconductor material upon a foreign substrate with high crystal perfection. This is done to prevent the following:
1. Crystal errors of the substrate do not migrate into the grown layer which layer is responsible for the function of the integrated semiconductor circuit;
2. Precipitations in the substrate, which can occur, when heat treatments in the substrate at the temperature range of precipitation should not produce growth disturbances in the growing layer;
3. Outside or apparatus influences should not cause disturbances in form of contaminating particles in the layer;
4. Lattice deviations of the growth layer from the lattice of the substrate, should not produce errors in the growth layer.
The method of the invention eliminates the aforedescribed disadvantages by immersing the substrate body into a melt, comprised of the respective semiconductor material. An epitactic growth of semiconductor material be effected on the surface of the substrate body by establishing a temperature balance between the substrate body and the melt and thereafter slowly pulling the substrate body out from the melt.
It is within the scope of the invention to use a pulling velocity of 50 to 100 mm./hr. for pulling the substrate body, coated with the semiconductor layer.
According to a particularly preferred embodiment of the teaching according to my invention, a substrate body is employed which possesses properties of electrical insulation, and, preferably, a spinel structure. Very satisfactory results were obtained when a Mg-Al spinel crystal, is used as a substrate, having a composition of MgO:Al O as 1:] to 123.5, and preferably 1:1 to 1:25 It is preferable that the substrate surface, intended for coating, have a 100) plane orientation.
According to another embodiment of the invention, when sapphire (or corrundum) are employed as substrate bodies, the substrate surface selected for coating, is oriented in the (001) plane.
Silicon, germanium or A'"B" compounds, particularly gallium arsenide, can be deposited as semiconductor materials.
To produce semiconductor layers of variable conductance type and/or variable conductivity, dopant substances are being added to the melt.
It is in the scope of the invention to precipitate a plurality of semiconductor layers of variable conductivity, from the same or from a different semiconductor material, in an appropriate sequence. The substrate body that is coated with the last applied epitactic layer, is used as the original substrate body for the next epitactic precipitation of semiconductor material.
The method of the invention affords the possibility to produce thin-layer semiconductor components on foreign substances and, if necessary, to form the same from multiple monocrystalline layers.
The invention will be more fully described with respect to the drawing in which:
FIG. 1 shows the body produced by the invention; and
FIG. 2 schematically illustrates the producing of the body.
FIG. 1 illustrates a simple layer sequence, which occurs by the invention, the monocyrstalline substrate body 1, is a Mg- Al spinel, preferably wafer-shaped, of the following composition: MgO:Al O; '-1:2.5. A silicon layer 2, approximately 1011. thick, is deposited by epitactic precipitation upon the substrate body. The silicon layer which occurs, of necessity, on the bottom side of the substrate body is removed by mechanical means, or through etching. The, thus obtained, spinel crystal provided with the semiconductor layer, IS being further processed according to known methods of the planar technique, into integrated semiconductor circuits, having an insulated foreign substrate.
FIG. 2 schematically illustrates a device for performing the method of the invention. 3 indicates the semiconductor metal, located in a crucible 4. A semiconductor layer 2 is epitactically produced on the surfaces oriented in a plane by pulling, from said semiconductor melt at a velocity of 50 mm./hr., in the direction of arrow 5, a monocrystalline Mg-Al spinel crystal 1 as a seed.
1 claim:
1. A method of producing thin, monocrystalline layers of semiconductor material, upon a monocrystalline, preferably wafer-shaped substrate body of another chemical composition, but having the same or a similar lattice structure, by employing an epitactic growth process, which comprises immersing a substrate which has electrically insulating properties and a spinel structure into a melt comprising the appropriate semiconductor material establishing a temperature balance between the substrate body and the melt, and thereafter slowing pulling the substrate body from the melt at a velocity of 50 to 100 mm./hr. to effect an epitactic growth of semiconductor material on the surface of the substrate body.
2. The method of claim 1, wherein the substrate is a Mg-A| spinel of the composition: MgO:Al O =l:l to 1:35
3. The method of claim 1, wherein the substrate is sapphire or corrundum, and is oriented in the (001) plane.
4. The method of claim 1, wherein the melt is a silicon melt.
5. The method of claim 1, wherein the melt is a germanium melt.
6. The method of claim 1, wherein the melt is an A'"B" compound.
7. The method of claim 6, wherein the melt is gallium arsenide.
8. The method of claim 1, wherein dopant substances are added to the semiconductor melt.
9. The method of claim 1, wherein several semiconductor layers of variable conductivity and comprised of the same or of different semiconductor material, are sequentially applied, upon the substrate body, and the substrate body, which was last coated with the layer serves as the substrate body for the next epitactic precipitation.
Claims (8)
- 2. The method of claim 1, wherein the substrate is a Mg-Al spinel of the composition: MgO:Al2O3 1:1 to 1:3.5.
- 3. The method of claim 1, wherein the substrate is sapphire or corrundum, and is oriented in the (001) plane.
- 4. The method of claim 1, wherein the melt is a silicon melt.
- 5. The method of claim 1, wherein the melt is a germanium melt.
- 6. The method of claim 1, wherein the melt is an AIIIBV compound.
- 7. The method of claim 6, wherein the melt is gallium arsenide.
- 8. The method of claim 1, wherein dopant substances are added to the semiconductor melt.
- 9. The method of claim 1, wherein several semiconductor layers of variable conductivity and comprised of the same or of different semiconductor material, are sequentially applied, upon the substrate body, and the substrate body, which was last coated with the layer serves as the substrate body for the next epitactic precipitation.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19681794273 DE1794273A1 (en) | 1968-09-30 | 1968-09-30 | Process for producing epitaxial semiconductor layers on foreign substrates |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US3650822A true US3650822A (en) | 1972-03-21 |
Family
ID=5707933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US860942A Expired - Lifetime US3650822A (en) | 1968-09-30 | 1969-09-25 | Method of producing epitactic semiconductor layers on foreign substrates |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US3650822A (en) |
| JP (1) | JPS4844834B1 (en) |
| AT (1) | AT307506B (en) |
| CH (1) | CH500592A (en) |
| DE (1) | DE1794273A1 (en) |
| FR (1) | FR2019190A1 (en) |
| GB (1) | GB1243295A (en) |
| NL (1) | NL6912007A (en) |
| SE (1) | SE359457B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3902924A (en) * | 1973-08-30 | 1975-09-02 | Honeywell Inc | Growth of mercury cadmium telluride by liquid phase epitaxy and the product thereof |
| US3914525A (en) * | 1974-03-15 | 1975-10-21 | Rockwell International Corp | Mercury sulfide films and method of growth |
| US4113548A (en) * | 1976-05-13 | 1978-09-12 | Hermann Sigmund | Process for the production of silicon layers |
| US4211821A (en) * | 1976-06-14 | 1980-07-08 | Agence Nationale De Valorisation De La Recherche (Anvar) | Monocrystalline like layers, processes of manufacturing such layers, and articles comprising such layers |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3341361A (en) * | 1963-02-21 | 1967-09-12 | Union Carbide Corp | Process for providing a silicon sheet |
| US3411946A (en) * | 1963-09-05 | 1968-11-19 | Raytheon Co | Process and apparatus for producing an intermetallic compound |
| US3414434A (en) * | 1965-06-30 | 1968-12-03 | North American Rockwell | Single crystal silicon on spinel insulators |
-
1968
- 1968-09-30 DE DE19681794273 patent/DE1794273A1/en active Pending
-
1969
- 1969-08-06 NL NL6912007A patent/NL6912007A/xx unknown
- 1969-09-25 US US860942A patent/US3650822A/en not_active Expired - Lifetime
- 1969-09-26 CH CH1453369A patent/CH500592A/en not_active IP Right Cessation
- 1969-09-29 AT AT919769A patent/AT307506B/en not_active IP Right Cessation
- 1969-09-29 JP JP44077009A patent/JPS4844834B1/ja active Pending
- 1969-09-29 GB GB47762/69A patent/GB1243295A/en not_active Expired
- 1969-09-29 FR FR6933104A patent/FR2019190A1/fr not_active Withdrawn
- 1969-09-30 SE SE13467/69A patent/SE359457B/xx unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3341361A (en) * | 1963-02-21 | 1967-09-12 | Union Carbide Corp | Process for providing a silicon sheet |
| US3411946A (en) * | 1963-09-05 | 1968-11-19 | Raytheon Co | Process and apparatus for producing an intermetallic compound |
| US3414434A (en) * | 1965-06-30 | 1968-12-03 | North American Rockwell | Single crystal silicon on spinel insulators |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3902924A (en) * | 1973-08-30 | 1975-09-02 | Honeywell Inc | Growth of mercury cadmium telluride by liquid phase epitaxy and the product thereof |
| US3914525A (en) * | 1974-03-15 | 1975-10-21 | Rockwell International Corp | Mercury sulfide films and method of growth |
| US4113548A (en) * | 1976-05-13 | 1978-09-12 | Hermann Sigmund | Process for the production of silicon layers |
| US4211821A (en) * | 1976-06-14 | 1980-07-08 | Agence Nationale De Valorisation De La Recherche (Anvar) | Monocrystalline like layers, processes of manufacturing such layers, and articles comprising such layers |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4844834B1 (en) | 1973-12-27 |
| NL6912007A (en) | 1970-04-01 |
| DE1794273A1 (en) | 1971-09-23 |
| GB1243295A (en) | 1971-08-18 |
| SE359457B (en) | 1973-09-03 |
| AT307506B (en) | 1973-05-25 |
| CH500592A (en) | 1970-12-15 |
| FR2019190A1 (en) | 1970-06-26 |
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