US5877773A - Multi-pass clipping in a geometry accelerator - Google Patents
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- 238000000034 method Methods 0.000 claims abstract description 49
- 208000019300 CLIPPERS Diseases 0.000 claims description 106
- 208000021930 chronic lymphocytic inflammation with pontine perivascular enhancement responsive to steroids Diseases 0.000 claims description 106
- 238000013523 data management Methods 0.000 claims 2
- 230000006870 function Effects 0.000 description 13
- 238000010586 diagram Methods 0.000 description 12
- 238000013507 mapping Methods 0.000 description 12
- 230000008569 process Effects 0.000 description 11
- 230000008901 benefit Effects 0.000 description 7
- 238000012545 processing Methods 0.000 description 6
- 238000009877 rendering Methods 0.000 description 6
- 230000009466 transformation Effects 0.000 description 5
- 230000009467 reduction Effects 0.000 description 4
- 230000001419 dependent effect Effects 0.000 description 3
- 239000013598 vector Substances 0.000 description 3
- 230000002708 enhancing effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000844 transformation Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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Definitions
- the present invention relates generally to computer graphics and animation systems and, more particularly, to geometry accelerators that perform clipping operations in a computer graphics and animation system.
- Computer graphics systems are commonly used for displaying two- and three-dimensional graphical representations of objects on a two-dimensional video display screen.
- Current computer graphics systems provide highly detailed representations and are used in a variety of applications.
- an object or model to be represented on the display screen is broken down into a plurality of graphics primitives.
- Primitives are basic components of a graphics display and may include, for example, points, lines, vectors, and polygons such as triangles and quadrilaterals.
- a hardware/software scheme is implemented to render, or draw, the graphics primitives that represent a view of one or more objects being represented on the display screen.
- the primitives of the three-dimensional object to be rendered are defined by a host computer in terms of primitive data.
- the host computer may define the primitives in terms of the coordinates (X, Y, Z, and W) of its vertices, as well as the red, green and blue and alpha (R, G, B and ⁇ ) color values of each vertex.
- Additional primitive data may be used in specific applications.
- Rendering hardware interpolates the primitive data to compute the display screen pixels that represent each primitive, and the R, G, and B color values for each pixel.
- the basic components of a computer graphics system typically include a geometry accelerator, a rasterizer, and a frame buffer.
- the system may also include other hardware such as texture mapping hardware.
- the geometry accelerator receives primitive data from the host computer that defines the primitives that make up the model view to be displayed.
- the geometry accelerator performs transformations on the primitive data and may also perform such functions as lighting, clipping, and plane equation calculations for each primitive.
- the output of the geometry accelerator referred to as rendering data, is used by the rasterizer and the texture mapping hardware to generate final screen coordinate and color data for each pixel in each primitive.
- the pixel data from the rasterizer and the pixel data from the texture mapping hardware if available, are combined and stored in the frame buffer for display on the video display screen.
- Clipping determines what portion of a graphics primitive is to be displayed in what is known as a "clip region."
- the clip region can be a two-dimensional area such as a window, or it can be a three-dimensional view volume.
- the primitives that are displayed in the clip region can be one-dimensional primitives (e.g., points or lines) or two-dimensional primitives (e.g., polygons).
- view clipping The clipping of graphics primitives to a three-dimensional view volume is termed "view clipping".
- the three-dimensional view volume is defined by 6 orthogonal clipping planes, for example, Xmax, Xmin, Ymax, Ymin, Zmax, Zmin.
- View clipping of primitives is required due to the finite size of the video display, but may also be required by downstream hardware rasterizers to prevent overflow of the rasterizer's internal counters. View clipping can also be used to increase performance of the graphics system, as further processing on primitives that lie outside the view volume need not be performed.
- many graphics systems also perform "model clipping" of graphics primitives.
- Model clipping allows a user to specify one or more model clipping planes that may be used to further restrict the viewing volume or to remove portions of an object or model from view.
- the commonly available OpenGL® graphics interface requires the graphics systems to support at least 6 model clipping planes. Accordingly, many graphics systems support 6 or more model clipping planes. By removing certain portions of the object or model from view, other areas of the model that were previously hidden from view can be visualized.
- OpenGL is a registered trademark of Silicon Graphics, Inc.
- Sutherland-Hodgman polygon clipping technique is perhaps the most widely used and generally applicable technique for clipping an input polygon against an arbitrary number of clipping planes.
- the Sutherland-Hodgman technique can be used to clip an input polygon against an arbitrary number of clipping planes by using the output from a first clip as the input to the next clip, until all clipping planes have been processed.
- the Sutherland-Hodgman technique clips each edge of the input polygon (as defined by the vertices of the input polygon) against a first clipping plane of the view volume to generate a first set of output vertices.
- Each edge of the output polygon defined by the first set of output vertices is then clipped against a second clipping plane of the view volume to generate a second set of output vertices.
- the resulting polygon defined by the second set of output vertices is then clipped against a third clipping plane and so on, until all of the clipping planes defining the view volume have been processed.
- the set of output vertices from the last clip then define a geometrically-shaped primitive (simple referred to as a "geometry" herein) that is bounded by the 6 orthogonal clipping planes of the view volume.
- the other polygon clipping techniques perform similar operations of successively clipping an input polygon against each plane of an arbitrary number of clipping planes.
- Each of these conventional clipping techniques involves computationally intensive graphical manipulations, particularly when clipping polygons against a three dimensional clip region, such as a view volume.
- the clipping of graphics primitives may be performed within the geometry accelerator by means of a hardware-based clipping machine, it is frequently performed by the graphics system in software, or in a combination of both software and hardware.
- the clipping of simple graphics primitives, such as points and lines is straight-forward and well known in the art, and may be performed by dedicated hardware within the geometry accelerator.
- the clipping of more complex graphics primitives, such as triangles and other polygons is more complex, and is conventionally performed by software.
- each vertex of a graphic primitive may contain up to sixteen 32 bit words (e.g., spatial coordinate data X, Y, Z, and W, color coordinate data R, G, B, and a, and texture data SR, SG, SB, TS, TT, TR, TQ, D).
- a complex primitive for example a triangle
- a new vertex can be created.
- the memory needs to be able to store at least 15 vertices; the 12 potential new vertices, and the original 3 vertices of the triangle.
- the present invention is a clipping machine controller that instructs an associated clipper to overwrite memory locations containing selected view-clipped vertex data with model-clipped vertex data when the clipping machine is performing view and model clipping.
- This reduces the number of memory locations that must be dedicated to clipping functions performed in a geometry accelerator.
- This reduction in hardware enables clipping of complex primitives that are most frequently encountered (e.g., triangles, quadrilaterals, and vectors) to be performed in hardware rather than software. This, in turn, results in increased speed and efficiency of the computer graphics systems.
- a clipping machine for use in a geometry accelerator of a computer graphics system.
- the clipping machine includes a conventional clipper that determines the intersections of edges of a graphics primitive with at least one clipping plane to define a clipped geometry.
- the clipper stores the resulting clipped vertex data defining the clipped geometry in a memory of the geometry accelerator.
- the clipped vertex data includes view-clipped vertex data resulting from the intersection of the graphics primitive with at least one view clipping plane, and model-clipped vertex data resulting from the intersection of the graphics primitive with at least one model clipping plane.
- a clipping controller instructs the clipper to overwrite the view-clipped vertex data with the model-clipped vertex data.
- the clipping controller instructs the clipper to model clip each of view clipped triangle and store the resulting view- and model-clipped vertex data in the memory locations previously occupied by the view-clipped vertex data.
- the clipping controller instructs the clipper to again determine the intersection of the graphics primitive with the at least one view clipping plane and store the view-clipped vertex data in the memory, as the previous view-clipped vertex data may have been overwritten.
- the clipping machine processes the next graphics primitive.
- the continuous re-utilization of geometry accelerator memory enables the clipping machine to perform most clipping functions (points, lines, vectors, triangles and quadrilaterals) in hardware, thereby achieving significant performance increases over systems which distribute such functionality among hardware and software. Furthermore, this performance increase is achieved with minimal tradeoffs associated with the repeated determination of view-clipped vertex data, as such repetition is performed only when both view and model clipping are required, and only when the view-clipped vertex data forms multiple view clipped triangles.
- the clipping controller may instruct the clipper to view clip the same graphics primitive a number of times, depending upon the number of view-clipped vertices formed by the view-clipped vertex data.
- re-calculating the view-clipped vertices of the graphics primitive only needs to be performed when the intersection of the edges of the input primitive and the view clipping planes generate a multiple triangles, and then, only when both view clipping and model clipping are required.
- most graphics primitives will not need to be both view clipped and model clipped. But, the reduction in the amount of memory that is required to both view and model clip a graphics primitive permits the clipping machine to be implemented in hardware within a single geometry accelerator, without sacrificing some other function.
- clipped vertex data is written to the memory only when the intersections of the edges of the graphics primitive with a clipping plane generates a new vertex of the clipped geometry.
- a disadvantage of conventional graphics systems is the amount of data manipulation that is required. For example, when the output vertices formed by clipping the graphics primitive are written into memory after each clipping plane is processed, a significant amount of time can be spent on simply writing clipped vertex data to memory. Each vertex of a graphics primitive can require the writing of up to sixteen 32 bit words for each vertex.
- an advantage of the present invention is that only new vertex data (e.g., that formed by an intersection of an edge of the graphics primitive with a clipping plane) is written into memory, thus dramatically reducing the amount of data manipulation would be conventionally performed. This increase in efficiency is particularly significant when compared to a software clipping implementation that writes clipped vertex data to a main memory of a host computer.
- a method of reducing an amount of memory used to store clipped vertex data includes view clipping a graphics primitive with at least one view clipping plane to determine a view-clipped geometry, storing view-clipped vertex data defining vertices of the view-clipped geometry in selected locations of a memory, model clipping a view clipped triangle formed by the view-clipped geometry with at least one model clipping plane to determine a model-clipped geometry, and storing model-clipped vertex data defining vertices of the model clipped geometry in at least one of the selected locations of the memory.
- the steps of view clipping the input graphics primitive, storing the view-clipped vertex data, model clipping a view-clipped triangle, and storing the model-clipped vertex data are repeated for each view-clipped triangle formed by the vertices of the view-clipped geometry.
- a method of clipping a graphics primitive that intersects at least one view clipping plane and at least one model clipping plane includes view clipping the graphics primitive with the at least one view clipping plane to determine a view-clipped geometry, selecting a view-clipped primitive forming a portion of the view-clipped geometry, model clipping the view-clipped primitive with the at least one model clipping plane to determine a view- and model-clipped geometry, and repeating the steps of view clipping, selecting and model clipping for each view-clipped primitive forming the view-clipped geometry.
- An advantage of embodiments of the present invention is that memory for storing only 12 vertices are needed to store clipped vertex data, even when each of the 6 view clipping planes and each of the up to 6 user define model clipping planes generates a new vertex.
- This reduction in the amount of memory allows view clipping and model clipping of complex graphics primitives to be performed within the geometry accelerator, without sacrificing some other function such as lighting, and plane equation calculation.
- view clipping and model clipping are performed in hardware, functions that are performed prior to clipping, for example, vertex transformation, can also be performed in hardware, thereby further enhancing the performance of the graphics system. This is because geometry accelerators are frequently pipelined architectures.
- a further advantage of the present invention is that any of the aforementioned polygon clipping techniques may be used for the actual clipping of polygons, as the present invention is not limited to one particular technique.
- FIG. 1 is a block diagram of an exemplary computer graphics system suitable for incorporating a geometry accelerator according to an embodiment of the present invention
- FIG. 2 is a block diagram of a geometry accelerator that includes a clipping machine according to an embodiment of the present invention
- FIG. 3 is a block diagram of a clipping machine according to an embodiment of the present invention.
- FIG. 4 illustrates a diagram of a input triangle being clipped to a two-dimensional clipping boundary
- FIG. 5 depicts an example of the contents of a vertex look up table and a vertex memory for use in a clipping machine in accordance with an aspect of the present invention
- FIG. 6 illustrates a three-dimensional diagram of input triangle defined by vertices that is clipped by 6 orthogonal view clipping planes
- FIG. 7 illustrates a two-dimensional diagram of the input triangle of FIG. 6 that is clipped by view clipping planes and model clipping planes;
- FIG. 8 is a flowchart exemplifying the operation of a clipping machine according to an embodiment of the present invention.
- FIG. 9 is a flowchart exemplifying the operation of a clipping machine according to a preferred embodiment of the present invention.
- FIG. 1 is a simplified block diagram of an exemplary computer graphics system 100 suitable for incorporation of a geometry accelerator 120 that includes a clipping machine of the present invention.
- the graphics system 100 includes a front-end subsystem 102, a texture mapping subsystem 104 and a frame buffer subsystem 106.
- the front-end subsystem 102 receives primitives to be rendered from the host computer 108 over bus 110.
- the primitives are typically specified by X, Y, Z, and W coordinate data, N x , N y , and N z normal data, R, G, B, and ⁇ color data, and S, T, R, and Q texture data for portions of the primitives, such as vertices.
- Data representing the primitives in three dimensions is provided by the front-end subsystem 102 to the frame buffer subsystem 106 over bus 112 to the optional texture mapping subsystem 104.
- the texture mapping subsystem 104 interpolates the received primitive data to compute the screen display pixels that will represent the primitive, and determine its corresponding resulting texture data for each primitive pixel.
- the resulting texture data is provided to the frame buffer subsystem 106 over one or more buses 114.
- the frame buffer subsystem 106 interpolates the primitive data received from the front-end subsystem 102 to compute the pixels on the display screen that will represent each primitive, and to determine object color values and Z values for each pixel.
- the frame buffer subsystem 106 combines, on a pixel-by-pixel basis, the object color values with the resulting texture data provided from the optional texture mapping subsystem 104, to generate resulting image R, G, and B values for each pixel.
- R, G, and B color control signals for each pixel are respectively provided over R, G and B lines 116 to control the pixels of the display screen (not shown) to display a resulting image on the display screen that represents the texture-mapped primitive.
- the front-end subsystem 102 includes a distributor 118 and one or more three-dimensional geometry accelerators 120A-120P (collectively and generally referred to as geometry accelerators 120).
- the distributor 118 receives the coordinate and other primitive data over bus 110 from a graphics application on the host computer 108.
- the distributor 118 dynamically allocates the primitive data, including vertex state (coordinate) and property state (color, lighting, etc.) data, among the geometry accelerators 120 and provides each geometry accelerator with primitive data over bus 126.
- Rendering data generated by the geometry accelerators 120 is provided over output bus 128 to distributor 118.
- Distributor 118 reformats the primitive output data (that is, rendering data) received from the geometry accelerators 120, reorders the rendering data if necessary, performs a floating point to fixed point conversion, and provides the primitive data stream over bus 112 to optional texture-mapping subsystem 104 and subsequently to frame buffer subsystem 106.
- the texture mapping subsystem 104 and frame buffer subsystem 106 may be any well-known systems now or later developed. Furthermore, the front-end subsystem 102, texture mapping subsystem 104 and frame buffer subsystem 106 are preferably pipelined and operate on multiple primitives simultaneously. While the texture mapping subsystem 104 and the frame buffer subsystem 106 operate on primitives previously provided by the front-end subsystem 102, the front-end subsystem 102 continues to operate and provide new primitives until the pipelines in the subsystems 104 and 106 become full.
- FIG. 2 is a functional block diagram of a geometry accelerator 120 that includes a clipping machine 204 configured in accordance with the present invention.
- the clipping machine 204 supports clipping on 6 view clipping planes and on up to 6 user-defined model clipping planes at any orientation, although additional or fewer model clipping planes may be implemented.
- the geometry accelerator 120 includes a number of specialized machines 218, including a transform machine 200, a light machine 202, a clipping machine 204, and a plane equation machine 206.
- Each of the specialized machines 218 is preferably implemented in cell logic and as separate and distinct state machines.
- the transform machine 200 receives the primitive vertex data from the distributor 118 over bus 126 and performs transformations on the vertex data, such as scaling or moving a vertex in space.
- the transform machine 200 also calculates view clip codes and model clip codes for each vertex of a primitive to determine whether the primitive may be trivially accepted or trivially rejected by the clipping machine 204.
- the calculation of clip codes and the determination of trivial acceptance and rejection is well known in the art and is not described in detail herein.
- the primitive when the clip codes indicate that each of the vertices of the primitive lie within the clipping volume, then the primitive can be trivially accepted.
- the clip codes indicate that each of the vertices of a primitive lie outside of one of the clipping planes of the clipping volume, then the primitive can be trivially rejected.
- the primitive When the primitive is trivially rejected, the transformed vertex data is simply discarded by the transform machine 200 as it is completely outside the clipping boundaries, and a next primitive is processed.
- the transform machine 200 provides control information to the clipping machine 204 via lines 210 indicating whether the primitive is to be view clipped, model clipped, view clipped and model clipped, or not clipped at all.
- the transform machine 200 provides two signals to the clipping machine 204 via lines 210 to control the operation of the clipping machine 204.
- the first signal, designated view -- accept indicates whether the primitive needs to be view clipped by the clipping machine 204.
- the second signal, designated model -- accept indicates whether the primitive needs to be model clipped by the clipping machine 204.
- the clipping machine 204 will be used to determine the intersections, if any, of the primitive with both the view clipping boundaries and the model clipping boundaries.
- the light machine 202 receives transformed vertex data for primitives that are not trivially rejected from the transform machine 200 via bus 208.
- the light machine 202 enhances image data by simulating light conditions, and provides the enhanced vertex data to the clipping machine 204 via bus 212.
- the clipping machine 204 receives the vertex data from the light machine 202, and determines what form of clipping, if any, is to be performed, on each primitive.
- the clipping machine 204 clips the primitive to the view clipping boundaries and/or model clipping boundaries and provides clipped (view clipped, model clipped, or both view clipped and model clipped) vertex data to the plane equation machine 206, via bus 214.
- the plane equation machine 206 receives the clipped vertex data from the clipping machine 204 and calculates plane equations defining the clipped primitives in terms of mathematical floating point plane equations.
- the plane equations defining the clipped primitive are then provided to the distributor 118, wherein the distributor provides the rendering data to the texture mapping subsystem 104, and subsequently to frame buffer subsystem 106.
- FIG. 3 is a schematic block diagram of one embodiment of the clipping machine 204 according to the present invention.
- the clipping machine 204 includes a clipping control unit 302, a vertex look up table (VLUT) 304, a vertex RAM (VRAM) 306, and a clipping processor 308 (hereafter termed "a clipper").
- the clipping control unit 302, the VLUT 304, the VRAM 306, and the clipper 308 communicate with each other over bus 310.
- the VLUT 304 and the VRAM 306 are fast memory accessible by both the clipping control unit 302 and the clipper 308.
- the VLUT 304 and the VRAM 306 need not be implemented within the clipping machine 204 as depicted in FIG.
- the clipping control unit 302 receives the control information (view -- accept, and model -- accept) via lines 210A and 210B, and the light-enhanced vertex data via bus 212, and provides the clipped vertex data to the plane equation machine 206 over bus 214.
- the clipping machine 204 receives light-enhanced vertex data defining more complex graphics primitives such as lines, triangles, and quadrilaterals, with quadrilaterals being processed as two triangles.
- the clipping of simple primitives can be performed by the transform machine 200 based on clip codes, and need not be performed by the clipping machine 204, while more complex primitives, such as polygons and triangle strips, can broken down into triangles prior to being processed by the clipping machine 204. Accordingly, further description of the clipping machine 204 is primarily described in terms of triangles, although other primitives will be discussed where necessary for a complete understanding.
- the clipping control unit 302 stores the light-enhanced vertex data defining the input primitive in VRAM 306, and stores vertex indices corresponding to the vertex data that is stored in the VRAM 306 in the VLUT 304. As described further below, the use of vertex indices and the VLUT 304 dramatically reduces the amount of data manipulation performed by the clipping machine 204. Dependent on the control information received from the transform machine 200 over lines 210, the operation of the clipping control unit 302 will vary. For example, when the control information indicates that no clipping need be performed, the clipping control unit 302 simply provides the light-enhanced vertex data to the plane equation machine 206.
- the clipping control unit 302 selects the appropriate intersection equations and clip codes for the clipper 308 to use, loads the indices of the vertices that define the input primitive into the VLUT 304, and instructs the clipper 308 to determine the intersections of the input primitive, if any, with the appropriate clipping boundaries.
- the clipping boundaries are defined by plane equations of the form Ax+By+Cz+Dw for each of the view and/or model clipping planes in a conventional manner.
- the coefficients (A, B, C, D) that define these planes are stored in predetermined memory locations known to the clipper 308, such as within VRAM 306. Alternatively, they may also be stored in a register location (not shown).
- the clipper 308 clips the input primitive according to the equations set by the clipping control unit 302, stores clipped vertex data in the VRAM 306, and updates the vertex indices in the VLUT 304 to point to the clipped vertex data. When control is returned to the clipping control unit 302, the clipping control unit 302 provides the clipped vertex data to the plane equation machine 206.
- the clipping control unit 302 performs both view clipping and model clipping using only a minimal amount of memory in accordance with the present invention.
- the clipper 308 is called to view clip the input primitive and write the view-clipped vertices in the VRAM 306 and update the VLUT 304.
- the clipper 308 is then called to model clip the view clipped geometry that is defined by the view-clipped vertices and write the model-clipped vertices into the VRAM 306 and update the VLUT 304, whereupon the clipping control unit 302 then provides the model-clipped vertices to the plane equation machine 206.
- the clipper 308 will be called a number of times to model clip each view clipped triangle forming the view clipped polygon. Each time that the clipper 308 is called to model clip a view clipped triangle, the view-clipped vertices of the view clipped polygon may be overwritten by the model-clipped vertices.
- the clipping control unit 302 will call the clipper 308 to view clip the input primitive, once again writing the view-clipped vertices defining the view clipped polygon in the VRAM 306 and updating the VLUT 304.
- the clipping control unit 302 will then call the clipper 308 to model clip the next view clipped triangle forming the view clipped polygon, and provide the model-clipped vertices to the plane equation machine 206. This process is repeated until all of the view clipped triangles forming the view clipped polygon have be model clipped and the resulting model-clipped vertices output to the plane equation machine 206, wherein the next input primitive is processed.
- the clipping control unit 302 may call the clipper 308 to view clip the same input primitive a number of times, depending upon the number of view-clipped vertices formed by the intersections of the edges of the input primitive with the view clipping boundaries.
- re-calculating the view-clipped vertices of the input primitive is needed only when the intersection of the edges of the input primitive and the view clipping planes generate multiple triangles, and then, only when both view clipping and model clipping are required.
- most input primitives will not need to be both view clipped and model clipped, as most input primitives will either be trivially accepted or trivially rejected.
- the reduction in the amount of memory that is required to both view and model clip an input primitive permits the clipping machine 204 to be implemented in hardware, and to fit within a single geometry accelerator 120 without sacrificing some other function.
- the clipping control unit 302 may include means for determining an amount of VRAM 306 that is designated to storing vertex data for clipping. If the amount of memory for storing vertex data is sufficient to store the view-clipped vertex data and determine the model-clipped vertices without overwriting the view-clipped vertex data, then the clipping control unit 302 need not call the clipper 308 to re-determine the view-clipped vertices.
- the clipping control unit 302 may proceed as described above. This could be implemented, for example, by means of a register within the clipping control unit 302 that stores the amount of VRAM 306 allocated for clipping.
- the clipping control unit can also include means for dynamically determining the amount of memory needed to store vertex data for clipping and compare this to the amount of VRAM 306 that is designated to storing vertex data for clipping. As mentioned previously, when a triangle intersects a clipping plane a new vertex may be created. However, dependent on the number of model clipping planes that have been defined by the user, the number of possible new vertices may be much fewer than six. Accordingly, the clipping control unit can include means for determining a maximum number of possible new vertices that may be created prior to calling the clipper.
- the clipping control unit 302 need not call the clipper 308 to re-determine the view-clipped vertices.
- the clipping control unit 302 may proceed as described above.
- FIGS. 4 and 5 are used to describe how the use of vertex indices and the VLUT 304 dramatically reduce the amount of data manipulation performed by the clipping machine 204 according to an embodiment of the present invention.
- FIG. 4 illustrates a diagram of a input triangle being clipped to a two-dimensional clipping boundary defined by the planes Xmin, Xmax, Ymin, and Ymax
- FIG. 5 depicts exemplary contents of the VLUT 304 and VRAM 306 during the clipping of the input triangle to the two-dimensional clipping boundary.
- the clipping of the input triangle V0-V1-V2 is illustrated for convenience in only two dimensions, as the extension to three-dimensions will be apparent to one of ordinary skill in the art.
- FIG. 4 illustrates a diagram of a input triangle being clipped to a two-dimensional clipping boundary defined by the planes Xmin, Xmax, Ymin, and Ymax
- FIG. 5 depicts exemplary contents of the VLUT 304 and VRAM 306 during the
- FIGS. 4A-4E illustrate the resulting clipped geometry formed by clipping the input triangle to clipping planes Xmin, Xmax, Ymin, and Ymax, respectively.
- a preferred embodiment of the VLUT 304 includes an input list of vertex indices I0-I7, and an output list of vertex indices O0-O7.
- each vertex index is a four bit nibble, and for a given vertex, the input and output vertex indices are included in the most significant and least significant portions of a byte.
- the output vertex indices can be transformed to input indices by shifting the output vertex index by four bits.
- the VLUT 304 is preferably implemented in a double buffered RAM.
- FIG. 5A shows the contents of the VLUT 304 for the initial state as well as subsequent states during which the clipping of the input triangle V0-V1-V2 to each of the 4 clipping planes is performed.
- FIG. 5B illustrates the contents of VRAM 306 initially and during the clipping of triangle V0-V1-V2 to the 4 clipping planes.
- the clipping control unit 302 When the clipping control unit 302 receives light-enhanced vertex data V0, V1, and V2, the vertex data is written into the VRAM 306 at predetermined locations, and the output list of the VLUT 304 is initialized to point to the memory locations where these vertices may be found.
- the first four memory locations of the VRAM 306 store the input vertices of the input primitive, and are not overwritten during view and/or model clipping of the input primitive. Four memory locations are reserved for the input vertices, in the event that the input primitive is a quadrilateral.
- the clipping control unit 302 always knows the memory locations that containing the original input vertices of the input primitive.
- the clipper 308 may overwrite any vertex locations in memory that are no longer needed, and updates the VLUT 304 to point to the location in the VRAM 306 where the vertex may be found.
- the clipper 308 When the clipper 308 is called, the vertices in the output list are shifted into corresponding locations in the input list and the output list is cleared.
- the input vertex indices I0-I2 contain vertices V0-V2 in the Clip Xmin column.
- the clipper 308 determines the intersection of the edges of the input triangle with the clipping plane Xmin, writes the output vertices into the VRAM 306, and updates the vertex indices in the output list of the VLUT 304 to point to the appropriate locations.
- FIG. 4B the intersection of edge V0-V1 results in a new vertex.
- This new vertex is written into VRAM 306 at any available location (e.g., vertex 4-vertex 11), and an index to this vertex is written into the VLUT 304. As shown in FIGS. 4 and 5, this new intersection value is written into vertex 4, and the output list of the VLUT 304 is updated to point to V4 as the first output vertex (O0).
- the clipper 308 then processes the next edge V1-V2 of the input triangle. This edge does not intersect the Xmin plane, thus indices V1 and V2 are written into the output list of the VLUT 304 (O1, O2). Because the vertices of V1 and V2 are known, no writing to VRAM 306 is needed.
- the clipper 308 then processes edge V2-V0 and determines that a new vertex is created. This new intersection value is written into an available memory location (e.g., vertex 5-vertex 11) at vertex 5, and an index to this vertex is written into the output list of the VLUT 304 (V5), and the clipper 308 then processes the next clipping plane.
- an available memory location e.g., vertex 5-vertex 11
- an index to this vertex is written into the output list of the VLUT 304 (V5), and the clipper 308 then processes the next clipping plane.
- V4-V1 When clipping plane Xmax is processed, the vertices in the output list (V4, V1, V2, V5) are shifted into corresponding locations in the input list as shown in FIG. 5A, and the output list is cleared.
- the clipper 308 determines the intersection of edge V4-V1 with the clipping plane Xmax, and writes the output vertices into the VRAM 306 and the output list of the VLUT 304. This results in V4 being written into the output list of the VLUT 304 (no write to VRAM 306 is required) and a new intersection value is written into VRAM 306 at any available location (e.g., vertex 6-vertex 11) for the intersection of edge V4-V1.
- the clipper 308 processes the next edge V1-V2 and determines that a new intersection value is created. This intersection value is written into vertex 7, and an index to this location is written into the output list of the VLUT 304.
- the clipper 308 then processes edge V2-V5 and then edge V5-V4, and determines that no new intersection values are created. Thus, no further writing to VRAM 306 is required, the vertices V2 and V5 are written into the output list of the VLUT 304, and the clipper 308 then processes the next clipping plane.
- V4-V6 When clipping plane Ymin is processed, the vertices in the output list (V4, V6, V7, V2, V5) are shifted into corresponding locations in the input list, and the output list is cleared.
- the clipper 308 determines the intersection of edge V4-V6 with the clipping plane Ymin, and writes the output vertices into the VRAM 306 and the output list of the VLUT 304. This results in V4 being written into the output list of the VLUT 304 (no write to VRAM 306 is required) and a new intersection value is written into VRAM 306 at any available location (e.g., vertex 8-vertex 11) for the intersection of edge V4-V6 with the Ymin plane.
- VLUT 304 As the new intersection value was written into vertex 8, an index to this vertex is written into the VLUT 304.
- the clipper 308 then processes the next edge V6-V7 and determines that a new intersection value is created. This intersection value is written into VRAM 306 at any available location (e.g., vertex 9-vertex 11). However, because the vertex V6 is not one of the original input vertices (e.g., V0-V4), and because this vertex is no longer needed to determine intersections of other edges, this intersection value may also be written to vertex 6. As shown in FIG. 5A, the new intersection value of edge V6-V7 with the Ymin plane is written to vertex 6 and an index to this location is written into the output list of the VLUT 304.
- the clipper 308 then processes edge V7-V2, then edge V2-V5, and then edge V5-V4, and determines that no new intersection values are created. Thus, no further writing to VRAM 306 is required, the vertices V7, V2, and V5 are written into the output list of the VLUT 304, and the clipper 308 then processes the next clipping plane.
- V4-V8-V6-V7-V2-V5 results in two new vertices (V9, V10) being written into the VRAM 306 and the output list of the VLUT 304, whereupon control is returned to the clipping control unit 302.
- the clipping control unit 302 then outputs the clipped vertices V4, V8, V6, V7, V9, V10, and V5 as triangles (e.g., V5-V10-V4, and V10-V4-V9, etc.) to the plane equation machine 206.
- VRAM 306 In the example of FIGS. 4 and 5, only 11 writes to VRAM 306 were required, including the writing of the original input vertices. In contrast, were the results of each clip written directly to memory, then 25 writes to memory would have been required, each write including up to 16 32-bit words.
- FIG. 6 illustrates a three-dimensional diagram of input triangle defined by vertices V0, V1, and V2 that is clipped by 6 orthogonal view clipping planes Xmin, Xmax, Ymin, Ymax, and Zmin and Zmax.
- FIG. 7 illustrates a two-dimensional diagram of the same input triangle that is model clipped by two user defined model clipping planes, Model Clip 0 and Model Clip 1. As shown in FIG. 7, Model Clip 0 is set to exclude data below and to the left of the clipping plane, and Model Clip 1 is set to exclude data to the right of the plane.
- FIG. 7 will be used in conjunction with FIGS. 8 and 9 to describe the operation of the clipping machine 204 according to various aspects of the present invention.
- FIG. 8 is a high level flowchart exemplifying the operation of a clipping machine 204 according to an embodiment of the present invention.
- the clipping control unit 302 receives the light-enhanced vertex data from the light machine 202 and control information from the transform machine 200 at block 800.
- the clipping control unit determines whether a multi-pass clipping routine will be performed based on the state of the control signals view -- accept and model -- accept.
- the clipping control unit proceeds to block 804.
- the clipper 308 is called and instructed to clip the input triangle according to the mode of clipping specified by the state of control signals view -- accept and model -- accept. More specifically, when only the view -- accept signal is not asserted, the clipper will determine the intersections of the input triangle with each of the view clipping planes based on intersection equations for view clipping. When only the model -- accept signal is not asserted, the clipper will determine the intersections of the input triangle with each of the model clipping planes based on intersection equations for model clipping. As is well known to those of ordinary skill in the art, intersection equations are generally different for view clipping and model clipping, even though both generate intersection values based on a method of linear interpolation.
- the clipping control unit proceeds to block 806, wherein the clipped vertices, if any, are output to the plane equation machine.
- the clipped output vertices will be output as triangles when the clipped triangle results in a polygon.
- the clipping control unit proceeds to block 816, and processing of the input triangle is finished.
- the control information received by the clipping control unit indicates that the primitive does not require any clipping, then the light-enhanced vertex data may simply be provided to the plane equation machine directly.
- the clipping control unit proceeds to block 808.
- the clipper is called and instructed to view clip the input triangle that is defined by the input vertices, wherein the clipping control unit proceeds to block 810.
- the clipping control unit calls the clipper and instructs the clipper to model clip one of the view clipped triangles defined by the view-clipped vertices, wherein the clipping control unit proceeds to block 812.
- the model-clipped vertices are output to the plane equation machine and the clipping control unit proceeds to block 814.
- the clipping control unit proceeds to block 816, and processing of the input triangle is finished.
- the clipping control unit returns to block 808.
- the clipping control unit calls the clipper and instructs the clipper to view clip the original input triangle. This step is necessary since the view-clipped vertices may have been overwritten by the clipper at block 810.
- a multi-pass clipping routine will be performed.
- the clipping control unit will first call the clipper to determine the intersection of the input triangle V0-V1-V2 with each of the view clipping boundaries.
- the resulting view clipped polygon will be defined by V0-V4a-V5a-V6a-V7a.
- the clipping control unit will then call the clipper to determine the intersection of one of the triangles formed by the view clipped polygon, for example, view clipped triangle V0-V4a-V5a, with each of the user defined model clipping planes.
- the vertices of the resulting model clipped polygon V6b-V8a-V4b-V7b will then be output to the plane equation machine as triangles. Because some of the output vertices of the view clipped polygon V0-V4a-V5a-V6a-V7a may have been overwritten by the model clipping (in fact, as illustrated in FIG. 7, vertices V4a, V6a, and V7a have been overwritten), the clipping control unit will call the clipper to re-calculate the view clipped polygon V0-V4a-V5a-V6a-V7a based on the original input vertices V0, V1, and V2.
- the next view clipped triangle for instance, triangle V0-V5a-V6a
- triangle V4c-V8b-V5c-V7c will then be model clipped against the model clipping planes to generate model clipped polygon V4c-V8b-V5c-V7c, and the vertices output to the plane equation machine as triangles.
- the clipping control unit will call the clipper to re-calculate the view clipped polygon V0-V4a-V5a-V6a-V7a based on the original input vertices V0, V1, and V2.
- FIG. 9 is a more detailed flowchart exemplifying the operation of a clipping machine 204 according to a preferred embodiment of the present invention.
- the clipping control unit 302 is implemented as a state machine in cell logic. Of course, such a state machine may also be implemented in any other type of logic mechanism, or in microcode.
- the clipping control unit receives light-enhanced vertex data from the light machine 202 and control information from the transform machine 200 at block 900.
- the clipping control unit initializes some counters that are used to store variables indicative of the state of the clipping control unit.
- a variable designated "current triangle” is initialized to indicate which view clipped triangle will be model clipped first, if multiple view clipped triangles are generated.
- current triangle is set to 1 to indicate that the first view clipped triangle will be model clipped first, and first pass is set to 1 to indicate that this is the first pass through the clipper.
- the clipping control unit selects the intersection equations and the clip code equations that will be used by the clipper based on the state of two variables, designated clip -- mode and clip -- code -- mode.
- the clipping control unit proceeds to block 906.
- the clipping control unit loads the input vertices of the original input triangle (for example, triangle V0-V1-V2 in FIG. 7) into the VRAM 306 and updates the vertex indices in output list of the VLUT 304 to point to the appropriate locations in VRAM.
- the clipping control unit also clears a usage array to allow the clipper to overwrite any vertex locations in VRAM other than those of the original input vertices.
- the clipping control unit proceeds to block 908, wherein the clipping control unit calls the clipper 308 to clip the vertices designated in the output list of the VLUT (e.g., the input triangle V0-V1-V2) according to clip -- mode and clip -- code -- mode.
- the result of this clipping is a new list of clipped vertices in the VLUT and the corresponding vertex data stored in VRAM.
- the clipping control unit then proceeds to block 910 wherein a determination is made as to whether this is the first pass through the clipper. Because the variable first pass is true, the clipping control unit proceeds to block 912, wherein the number of view clipped triangles that will be model clipped is determined. This determination may be made based upon the number of vertices in the output list of the VLUT. For instance, when the number of output vertices is 4, then two triangles will be model clipped. In the present example, the VLUT contains pointers to 5 vertices, V0, V4a, V5a, V6a, V7a, and thus, the number of view clipped triangles to be processed will be 3. In general, the number of view clipped triangles to be processed will equal the number of view-clipped vertices minus two.
- the clipping control unit determines whether multi-pass clipping is required and whether this is the first pass through the clipper. Multi-pass clipping is determined based on a variable designated "multi-pass", that is true when both view clipping and model clipping are required. That is, the variable multi-pass equals the logical AND of NOT view -- accept and NOT model -- accept. Because multi-pass clipping is required, and because this is the first pass through the clipper, the clipping control unit proceeds to block 916. At block 916, the clipping control unit clears the usage array to allow the clipper to overwrite any vertex locations in VRAM other than those of the original input vertices, and sets the variable first pass equal to 0.
- the clipping control unit adjusts the VLUT to point to the vertices of the current triangle (e.g. V0-V4a-V5a), the clipping control unit then proceeding to block 920.
- the clipping control unit sets the variables clip -- mode and clip -- code -- mode to 1 so that the next time the clipper is called, the clipper will use model clipping equations to determine intersections and clip codes, the clipping control unit then proceeding to block 908.
- the clipping control unit calls the clipper to clip the vertices designated in the output list of the VLUT (e.g., the view clipped triangle V0-V4a-V5a) according to clip -- mode and clip -- code -- mode.
- the result of this clipping is a new list of clipped vertices in the VLUT (e.g., V6b, V8a, V4b, V7b) and the corresponding vertex data stored in VRAM.
- the clipping control unit then proceeds to block 910 wherein a determination is made as to whether this is the first pass through the clipper.
- the clipping control unit proceeds to block 922, wherein the variable indicating the current triangle is incremented to point to the second view clipped triangle.
- the model-clipped vertices if any, are output to the plane equation machine.
- the model clipped output vertices V6b, V8a, V4b, V7b
- the clipping control unit proceeds to block 926, wherein a determination is made as to whether the last view clipped triangle has been model clipped and the resulting model-clipped vertices output to the plane equation machine.
- This determination may be made by comparing the value of the variable current triangle to the number of view clipped triangles determined at block 912. When last view clipped triangle has been model clipped and the resulting model-clipped vertices output to the plane equation machine, processing of the input triangle is complete, and the next input primitive will be processed. Alternatively, and as in this example, when additional view clipped triangles remain to be processed, the clipping control unit returns to block 904.
- the clipping control unit again selects the intersection equations and the clip code equations that will be used by the clipper based on the state of clip -- mode and clip -- code -- mode.
- the variables clip -- mode and clip -- code -- mode will be based on the state of the control signals view -- accept model -- accept.
- view -- accept model -- accept For the input triangle V0-V1-V2, clip -- mode and clip -- code -- mode will again be set to VIEW.
- the clipping control unit proceeds to block 906.
- the clipping control unit loads the input vertices of the original input triangle (e.g., V0, V1, V2) into the VRAM and sets the vertex indices in output list of the VLUT to point to the appropriate locations in VRAM.
- the clipping control unit simply updates the vertex indices in the VLUT to point to the original input vertex data for V0, V1, and V2 in VRAM.
- the vertices of the original view clipped polygon may have been, and in this case were, overwritten during model clipping.
- the clipping control unit After updating the VLUT, the clipping control unit proceeds to block 908, wherein the clipping control unit calls the clipper to clip the vertices designated in the output list of the VLUT (e.g., the input triangle V0-V1-V2) according to clip -- mode and clip -- code -- mode.
- the result of this clipping is a new list of clipped vertices in the VLUT (e.g., V0, V4a, V5a, V6a, V7a) and the corresponding vertex data stored in VRAM.
- the clipping control unit then proceeds to block 910 wherein a determination is made as to whether this is the first pass through the clipper.
- the clipping control unit proceeds to block 912, wherein the number of view clipped triangles that will be model clipped is again determined. Once again, the number of view clipped triangles to be processed will be 3, and clipping control unit proceeds to block 914.
- the clipping control unit again determines whether multi-pass clipping is required and whether this is the first pass through the clipper. Because multi-pass clipping is required and because this is the first pass through the clipper, the clipping control unit proceeds to block 916.
- the clipping control unit clears the usage array to allow the clipper to overwrite any vertex locations in VRAM other than those of the original input vertices, and sets the variable first pass equal to 0.
- the clipping control unit adjusts the VLUT to point to the vertices of the current triangle (e.g., V0-V5a-V6a), the clipping control unit then proceeding to block 920.
- the clipping control unit sets the variables clip -- mode and clip -- code -- mode to 1 so that the next time the clipper is called, the clipper will use model clipping equations to determine intersections and clip codes, the clipping control unit then proceeding to block 908.
- the clipping control unit calls the clipper to clip the vertices designated in the output list of the VLUT (e.g., the view clipped triangle V0-V5a-V6a) according to clip -- mode and clip -- code -- mode.
- the result of this clipping is a new list of clipped vertices in the VLUT (e.g., V4c, V8b, V5c, V7c) and the corresponding vertex data stored in VRAM.
- the clipping control unit then proceeds to block 910 wherein a determination is made as to whether this is the first pass through the clipper.
- the clipping control unit proceeds to block 922, wherein the variable indicating the current triangle is incremented to point to the third, and last, view clipped triangle.
- the model-clipped vertices if any, are output to the plane equation machine.
- the clipping control unit proceeds to block 926, wherein a determination is made as to whether the last view clipped triangle has been model clipped and the resulting model-clipped vertices output to the plane equation machine. Because an additional view clipped triangle (e.g., V0-V6a-V7a) remains to be processed, the clipping control unit returns to block 904.
- the clipping control unit proceeds through blocks 904-916 as before, again re-calculating the view clipped polygon V0-V4a-V5a-V6a-V7a.
- the clipping control unit adjusts the VLUT to point to the vertices of the current triangle (e.g., V0-V6a-V7a), the clipping control unit then proceeding to block 920.
- the clipping control unit sets the variables clip -- mode and clip -- code -- mode to 1 so that the next time the clipper is called, the clipper will use model clipping equations to determine intersections and clip codes, the clipping control unit then proceeding to block 908.
- the clipping control unit calls the clipper to clip the vertices designated in the output list of the VLUT (e.g., the view clipped triangle V0-V6a-V7a) according to clip -- mode and clip -- code -- mode.
- the result of this clipping is a new list of clipped vertices in the VLUT (e.g., V4d, V8c, V6c, V5b) and the corresponding vertex data stored in VRAM.
- the clipping control unit then proceeds to block 910 wherein a determination is made as to whether this is the first pass through the clipper. Because the variable first pass is false, the clipping control unit proceeds to block 922, wherein the variable indicating the current triangle is incremented.
- the model-clipped vertices V4d, V8c, V6c, V5b are output to the plane equation machine, the clipping control unit proceeding to block 926.
- the clipping control unit determines that all view clipped triangles have been processed and the resulting model-clipped vertices output to the plane equation machine, and the processing of the input triangle is complete.
- the clipping machine 204 is provided with light-enhanced vertex data.
- the clipping machine 204 may instead be provided with vertex data provided directly from the transform machine, whereupon clipped vertex data may then be provided to the light equation machine.
- the clipper 308 is provided with light-enhanced vertex data or view clipped light-enhanced vertex data directly via the VLUT 304 and the VRAM 306, independent of whether the clipper is to perform view clipping or model clipping. This is possible because in the preferred embodiment described with respect to FIG.
- view clipping and model clipping are both performed in the same coordinate space.
- view clipping and model clipping are defined in different coordinate spaces, as in a conventional graphics system, then a transformation of the vertex data to be used by the clipper can be provided which is dependent on the mode of clipping that is to be performed and the coordinate space in which the vertex data is received by the clipping machine.
- the clipping of the input triangle V0-V1-V2 required a number of passes through the clipper.
- an input primitive will not require both view and model clipping.
- the input primitive may be a line, in which case the clipper would only be called twice; once for view clipping, and once for model clipping.
- the determination of the intersections of a view clipped polygon with the user-defined model clipping planes may not be required.
- the clipper will first determine whether the view clipped primitive may be trivially accepted or trivially rejected, based on the model clip codes of the view-clipped vertices defining the view clipped polygon. Thus, when the view clipped primitive can be trivially accepted or rejected, the clipper will simply update the VLUT to point to the original view-clipped vertices (trivial acceptance), or will update the VLUT to indicate that no vertices remain (trivial rejection).
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